1
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
WED7PxxxCFA70xxI25
July 2005
Rev. 1
White Electronic Designs Corp. reserves the right to change products or specifi cations without notice.
FEATURES
CompactFlashTM
Compatibility
3.3V or 5.0V single power supply.
50 pin two piece connector with Type-I form
factor (3.3mm thickness)
Support for CIS implementation with 256 bytes of
attribute memory
Interface
modes
PC card memory mode
PC card I/O mode
True IDE mode
High
performance
Interface Transfer speed in PIO mode 4 or Multi
Word DMA mode 2 cycle timing, 16.6 Mbytes/
second (theoretical)
Sustained write: max 6.0 Mbytes/s in ATA PIO
mode 4 cycle timing
Sustained read: max 6.5 Mbytes/s in ATA PIO
mode 4 cycle timing
W/E Endurance: 100,000cycles
1
/300,000cycles
2
Notes:
1.
T
A
= -40 to 85C
2. T
A
= 0 to 70C
DESCRIPTION
The WED7PxxxCFA70xxI25 series CompactFlashTM card
is an ATA interface fl ash memory card based on fl ash
technology. The CompactFlashTM card is constructed with
a fl ash disk controller chip and NAND-type fl ash memory
device. Operates from a single 5-Volt or 3.3-Volt power
source. The card is available in CompactFlashTM type-I
form factor with 128MB, 256MB, 512MB and 1.02GB
unformatted capacity. Being able to emulate IDE hard disk
drives and certifi ed in accordance with the CompactFlashTM
Certifi cation Plan, WEDC's CompactFlashTM card is a
CompactFlash
TM
Card
perfect choice for solid-state mass-storage in industrial
applications and applications that require performance and
extended environmental tolerances. Other applications
include handheld devices such as Digital Cameras, Audio
Players, and PDAs.
Dimensions:
Type I card : 36.4mm(L) x 42.8mm (W) x 3.3mm (H)
Lead free and RoHS compliant
Storage
Capacities:
128MB, 256MB, 512MB and 1.02GB (unformatted)
Operating
Voltage:
3.3V
5%
5.0V 0.5V
Power
consumption:
5V operation
Active
mode:
Write operation: 28 mA (Typ.)
Read operation: 23 mA (Typ.)
Power down mode: 1.2mA (Typ.) 2.0mA (max.)
3.3V operation
Active
mode:
Write operation: 25 mA (Typ.)
Read operation: 21 mA (Typ.)
Power down mode: 1.0mA (Typ.) 1.5mA (max.)
Environment
conditions:
Operating temperature: -40C to 85C
Storage temperature: -45C to 90C
Storage humidity: 95% (max) (No condensation)
* This product is subject to change without notice.
Notes: CompactFlashTM is a trademark of SanDisk Corporation and is licensed royalty-
free to the CFA, which in turn will license it royalty-free to CFA members.
CFA: CompactFlashTM Association.
PRODUCT TYPES
Card Density
Model No.
Cylinder
Head
Sector
Memory capacity
1
128MB
7P128CFA70xxI25
978
8
32
128,188,416 Byte
256MB
7P256CFA70xxI25
978
16
32
256,376,832 Byte
512MB
7P512CFA70xxI25
993
16
63
512,483,328 Byte
1.02GB
7P1G0CFA70xxI25
1985
16
63
1024,450,560 Byte
1: It is the logical address capacity including the area used for File System.
2
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
WED7PxxxCFA70xxI25
July 2005
Rev. 1
White Electronic Designs Corp. reserves the right to change products or specifi cations without notice.
PIN ASSIGNMENTS AND PIN TYPE
PC Card Memory Mode
PC Card I/O Mode
True IDE Mode
Pin
Signal
Name
Pin Type
In, Out
Type
Pin
Signal
Name
Pin Type
In, Out
Type
Pin
Signal
Name
Pin Type
In, Out
Type
1
GND
Ground
1
GND
Ground
1
GND
Ground
2
D03
I/O
I4Z,OZ1
2
D03
I/O
I4Z,OZ1
2
D03
I/O
I4Z,OZ1
3
D04
I/O
I4Z,OZ1
3
D04
I/O
I4Z,OZ1
3
D04
I/O
I4Z,OZ1
4
D05
I/O
I4Z,OZ1
4
D05
I/O
I4Z,OZ1
4
D05
I/O
I4Z,OZ1
5
D06
I/O
I4Z,OZ1
5
D06
I/O
I4Z,OZ1
5
D06
I/O
I4Z,OZ1
6
D07
I/O
I4Z,OZ1
6
D07
I/O
I4Z,OZ1
6
D07
I/O
I4Z,OZ1
7
CE1#
I
I3U
7
CE1#
I
I3U
7
CS0#
I
I3U
8
A10
I
I3Z
8
A10
I
I3Z
8
A10
2
I
I3Z
9
OE#
I
I4U
9
OE#
I
I4U
9
ATA# SEL
I
I4U
10
A09
I
I3Z
10
A09
I
I3Z
10
A09
2
I
I3Z
11
A08
I
I3Z
11
A08
I
I3Z
11
A08
2
I
I3Z
12
A07
I
I3Z
12
A07
I
I3Z
12
A07
2
I
I3Z
13
V
CC
Power
13
V
CC
Power
13
V
CC
Power
14
A06
I
I3Z
14
A06
I
I3Z
14
A06
2
I
I3Z
15
A05
I
I3Z
15
A05
I
I3Z
15
A05
2
I
I3Z
16
A04
I
I3Z
16
A04
I
I3Z
16
A04
2
I
I3Z
17
A03
I
I3Z
17
A03
I
I3Z
17
A03
2
I
I3Z
18
A02
I
I3Z
18
A02
I
I3Z
18
A02
I
I3Z
19
A01
I
I3Z
19
A01
I
I3Z
19
A01
I
I3Z
20
A00
I
I3Z
20
A00
I
I3Z
20
A00
I
I3Z
21
D00
I/O
I4Z,OZ1
21
D00
I/O
I4Z,OZ1
21
D00
I/O
I4Z,OZ1
22
D01
I/O
I4Z,OZ1
22
D01
I/O
I4Z,OZ1
22
D01
I/O
I4Z,OZ1
23
D02
I/O
I4Z,OZ1
23
D02
I/O
I4Z,OZ1
23
D02
I/O
I4Z,OZ1
24
WP
O
OT1
24
IOIS16#
O
OT1
24
IOIS16#
O
ON1
25
CD2#
O
Ground
25
CD2#
O
Ground
25
CD2#
O
Ground
26
CD1#
O
Ground
26
CD1#
O
Ground
26
CD1#
O
Ground
27
D11
1
I/O
I4Z,OZ1
27
D11
1
I/O
I4Z,OZ1
27
D11
1
I/O
I4Z,OZ1
28
D12
1
I/O
I4Z,OZ1
28
D12
1
I/O
I4Z,OZ1
28
D12
1
I/O
I4Z,OZ1
29
D13
1
I/O
I4Z,OZ1
29
D13
1
I/O
I4Z,OZ1
29
D13
1
I/O
I4Z,OZ1
30
D14
1
I/O
I4Z,OZ1
30
D14
1
I/O
I4Z,OZ1
30
D14
1
I/O
I4Z,OZ1
31
D15
1
I/O
I4Z,OZ1
31
D15
1
I/O
I4Z,OZ1
31
D15
1
I/O
I4Z,OZ1
32
CE21#
I
I3U
32
CE21#
I
I3U
32
CS1
1
#
I
I3U
33
VS1#
O
Ground
33
VS1#
O
Ground
33
VS1#
O
Ground
34
IORD#
I
I4U
34
IORD#
I
I4U
34
DIOR#
I
I4U
35
IOWR#
I
I4U
35
IOWR#
I
I4U
35
DIOW#
I
I4U
36
WE#
I
I4U
36
WE#
I
I4U
36
WE
3
#
I
I4U
37
READY
O
OT1
37
IREQ#
O
OT1
37
INTRQ
O
OZ1
38
V
CC
Power
38
V
CC
Power
38
V
CC
Power
39
CSEL#
I
I1U
39
CSEL#
I
I1U
39
CSEL#
I
I1U
40
VS2#
O
OPEN
40
VS2#
O
OPEN
40
VS2#
O
OPEN
41
RESET
I
I3U
41
RESET
I
I3U
41
RESET#
I
I3U
3
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
WED7PxxxCFA70xxI25
July 2005
Rev. 1
White Electronic Designs Corp. reserves the right to change products or specifi cations without notice.
PIN ASSIGNMENTS AND PIN TYPE (cont'd)
PC Card Memory Mode
PC Card I/O Mode
True IDE Mode
Pin
Signal
Name
Pin Type
In, Out
Type
Pin
Signal
Name
Pin Type
In, Out
Type
Pin
Signal
Name
Pin Type
In, Out
Type
42
WAIT#
O
OT1
42
WAIT#
O
OT1
42
IORDY
O
ON1
43
INPACK#
O
OT1
43
INPACK#
O
OT1
43
DMARQ
O
OZ1
44
REG#
I
I3U
44
REG#
I
I3U
44
DMACK#
I
I3U
45
BVD
2
I/O
I4U,OT1
45
SPKR#
I/O
I4U,OT1
45
DASP#
I/O
I4U,ON1
46
BVD
1
I/O
I4U,OT1
46
STSCHG#
I/O
I4U,OT1
46
PDIAG#
I/O
I4U,ON1
47
D08
1
I/O
I4Z,OZ1
47
D08
1
I/O
I4Z,OZ1
47
D08
1
I/O
I4Z,OZ1
48
D09
1
I/O
I4Z,OZ1
48
D09
1
I/O
I4Z,OZ1
48
D09
1
I/O
I4Z,OZ1
49
D10
1
I/O
I4Z,OZ1
49
D10
1
I/O
I4Z,OZ1
49
D10
1
I/O
I4Z,OZ1
50
GND
Ground
50
GND
Ground
50
GND
Ground
Notes: 1. These signals are required only for 16 bit access and not required when installed in 8 bit systems. Devices allow for 3-state signals to consume no current.
2. Should be grounded by the host.
3. Should be tied to V
CC
by the host.
ACCESS SPECIFICATIONS
1. Attribute access specifi cations
When CIS-ROM region or Confi guration register region is accessed, read and write operations are executed under the
condition of REG# = "L" as follows. That region can be accessed by Byte/Word/Odd-byte modes, which are defi ned by
PC card standard specifi cations.
Attribute Read Access Mode
Mode
REG#
CE2#
CE1#
A0
OE#
WE#
D8 to D15
D0 to D7
Standby mode
X
H
H
X
X
X
High-Z
High-Z
Byte access (8bit)
L
H
L
L
L
H
High-Z
even byte
L
H
L
H
L
H
High-Z
Invalid
Word access (16bit)
L
L
L
X
L
H
invalid
even byte
Odd byte access (8bit)
L
L
H
X
L
H
invalid
High-Z
Note: X L or H
Attribute Write Access Mode
Mode
REG#
CE2#
CE1#
A0
OE#
WE#
D8 to D15
D0 to D7
Standby mode
X
H
H
X
X
X
Don't care
Don't care
Byte access (8bit)
L
H
L
L
H
L
Don't care
even byte
L
H
L
H
H
L
Don't care
Don't care
Word access (16bit)
L
L
L
X
H
L
Don't care
even byte
Odd byte access (8bit)
L
L
H
X
H
L
Don't care
Don't care
Note: X L or H
Write CIS-ROM region is invalid.
4
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
WED7PxxxCFA70xxI25
July 2005
Rev. 1
White Electronic Designs Corp. reserves the right to change products or specifi cations without notice.
2. Task File register access specifi cations
There are two types of Task File register mapping, one is mapped I/O address area, the other is mapped Memory address
area. Each type of Task File register read and write operation is executed under the condition as follows. That area can
be accessed by Byte/Word/Odd Byte modes, which are defi ned by PC card standard specifi cations.
(1) I/O address map Task File Register Read Access Mode (1)
Mode
REG#
CE2#
CE1#
A0
IORD#
IOWR#
OE#
WE#
D8 to D15
D0 to D7
Standby mode
X
H
H
X
X
X
X
X
High-Z
High-Z
Byte access (8bit)
L
H
L
L
L
H
H
H
High-Z
even byte
L
H
L
H
L
H
H
H
High-Z
odd byte
Word access (16bit)
L
L
L
X
L
H
H
H
odd byte
even byte
Odd byte access (8bit)
L
L
H
X
L
H
H
H
odd byte
High-Z
Note: X L or H
Task File Register Write Access Mode (1)
Mode
REG#
CE2#
CE1#
A0
IORD#
IOWR#
OE#
WE#
D8 to D15
D0 to D7
Standby mode
X
H
H
X
X
X
X
X
Don't care
Don't care
Byte access (8bit)
L
H
L
L
H
L
H
H
Don't care
even byte
L
H
L
H
H
L
H
H
Don't care
odd byte
Word access (16bit)
L
L
L
X
H
L
H
H
odd byte
even byte
Odd byte access (8bit)
L
L
H
X
H
L
H
H
odd byte
Don't care
Note: X L or H
(2) Memory address map Task File Register Read Access Mode (2)
Mode
REG#
CE2#
CE1#
A0
OE#
WE#
IORD#
IOWR#
D8 to D15
D0 to D7
Standby mode
X
H
H
X
X
X
X
X
High-Z
High-Z
Byte access (8bit)
H
H
L
L
L
H
H
H
High-Z
even byte
H
H
L
H
L
H
H
H
High-Z
odd byte
Word access (16bit)
H
L
L
X
L
H
H
H
odd byte
even byte
Odd byte access (8bit)
H
L
H
X
L
H
H
H
odd byte
High-Z
Note: X L or H
Task File Register Write Access Mode (2)
Mode
REG#
CE2#
CE1#
A0
OE#
WE#
IORD#
IOWR#
D8 to D15
D0 to D7
Standby mode
X
H
H
X
X
X
X
X
Don't care
Don't care
Byte access (8bit)
H
H
L
L
H
L
H
H
Don't care
even byte
H
H
L
H
H
L
H
H
Don't care
odd byte
Word access (16bit)
H
L
L
X
H
L
H
H
odd byte
even byte
Odd byte access (8bit)
H
L
H
X
H
L
H
H
odd byte
Don't care
Note: X L or H
5
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
WED7PxxxCFA70xxI25
July 2005
Rev. 1
White Electronic Designs Corp. reserves the right to change products or specifi cations without notice.
3. TRUE IDE MODE
The card can be confi gured in a True IDE. This card is confi gured in this mode only when the OE# input signal is asserted
to GND by the host during power on . In this True IDE mode Attribute Registers are not accessible from the host. Only
I/O operation to the task fi le and data register is allowed. If this card is confi gured during power on sequence, data
register is accessed in word (16-bit). The card permits 8-bit accesses if the user issues a Set Feature Command to put
the device in 8-bit mode.
True IDE Mode Read I/O Function
Mode
CE2#
CE1#
A0~A2
DMACK#
DIOR#
DIOW#
D8~D15
D0~D7
Invalid mode
L
L
X
X
X
X
High-Z
High-Z
Standby mode
H
H
X
H
X
X
High-Z
High-Z
PIO Data register access
H
L
0
H
L
H
Odd byte
even byte
Multiword DMA Data register access
H
H
X
L
L
H
Odd byte
even byte
Alternate status access
L
H
6H
H
L
H
High-Z
Status out
Other task fi le access
H
L
1~7H
H
L
H
High-Z
Data
Note: X L or H
True IDE Mode Write I/O Function
Mode
CE2#
CE1#
A0~A2
DMACK#
DIOR#
DIOW#
D8~D15
D0~D7
Invalid mode
L
L
X
X
X
X
Don't care
Don't care
Standby mode
H
H
X
H
X
X
Don't care
Don't care
PIO Data register access
H
L
0
H
H
L
Odd byte
even byte
Multiword DMA Data register access
H
H
X
L
H
L
Odd byte
even byte
Control register access
L
H
6H
H
H
L
Don't care
Control in
Other task fi le access
H
L
1~7H
H
H
L
Don't care
Data
Note: X L or H
CARD SYSTEM PERFORMANCE
ITEM
PERFORMANCE
Set up time (Reset to Ready)
250 ms (max.)
Set up time (Power down to Ready)
5.5 ms (max.)
Data transfer rate to / from host
16.6 M byte / s burst (max.), theoretically
Sustained read transfer rate
6.5 M byte / s (max.), actually *1
Sustained write transfer rate
6.0 M byte / s (max.), actually *1
Command to DRQ (Sector Re ad at Ready state)
4 ms (max.)
Command to DRQ (Sector Write at Ready state)
700 ms (max.)
Data transfer cycle end to ready (Sector write)
2 ms (typ.), 200 ms (max.)
Auto Power down time
1.5s (min.), 1.8s (typ.)
Notes:
1. The actual transfer rate is measured under ATA PIO mode 4 with single cycle time as 120ns.
6
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
WED7PxxxCFA70xxI25
July 2005
Rev. 1
White Electronic Designs Corp. reserves the right to change products or specifi cations without notice.
ELECTRICAL SPECIFICATION
SYMBOL
PARAMETER
MIN
MAX
TYP
UNIT
V
IN
, V
OUT
All input / output voltage
-0.3
V
CC
+0.3
--
V
V
CC
Power Supply Voltage
(Absolute Maximum Ratings)
-0.6
6.0
--
V
V
CC
Power Supply Voltage
(Recommended Operation Condition)
4.5
5.5
5.0
V
3.135
3.465
3.3
V
T
OPR
Operating Temperature
-40
85
--
C
T
STG
Storage Temperature
-45
90
--
C
Input Leakage Current
Type
SYMBOL
PARAMETER
CONDITION
MIN
MAX
TYP
UNIT
NOTES
IxZ
IL
Input leakage current
V
IH
= Vcc / V
IL
= GND
-1
1
--
A
*1
IxU
RPU1
Pull Up Resistor
Vcc = 5.0V
50
500
--
k
*1
IxD
RPD1
Pull Down Resister
Vcc = 5.0V
50
500
--
k
*1
Notes:
1. x refers to the characteristics described in section "DC Characteristics ( Input Characteristics)". For example, I1U indicates a pull up resister with a type 1 input characteristics.
Output Drive Type
Type
OUTPUT TYPE
VALID CONDITIONS
NOTES
OTx
Totempole
I
OH
& I
OL
*1
OZx
Tri-State N-P Channel
I
OH
& I
OL
*1
OPx
P-Channel only
I
OH
Only
*1
ONx
N-Channel only
I
OL
Only
*1
Notes:
1. x refers to the characteristics described in section "DC Characteristics ( Output Drive Characteristics)". Fo r example, OT1 refers to Totempole output with a type 1 Output drive
characteristics.
7
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
WED7PxxxCFA70xxI25
July 2005
Rev. 1
White Electronic Designs Corp. reserves the right to change products or specifi cations without notice.
DC CHARACTERISTICS
V
CC
= 3.3 V 5%, 5 V 0.5V, -40C T
A
85C
SYMBOL
PARAMETER
MIN
MAX
TYP.
UNIT
TEST CONDITIONS
I
LI
Input leakage current
--
1
--
A
--
I
LO
Output leakage current
--
1
--
A
V
OUT
= high impedance
I
PU
Pull-up current (Resistivity)
--
--
43 (75)
A (k)
V
FORCE
= 3.3V
I
PD
Pull-down current (Resistivity)
--
--
-43 (75)
A (k)
V
FORCE
= 0V
I
CCS
Power down mode current
--
--
1.5
2.0
1.0
1.2
mA
V
CC
= 3.3V
V
CC
= 5V
I
CCO
Operating current @ 3.3V
Write operation
Read operation
--
--
--
--
25
21
mA
V
CC
= 3.3V operation
Operating current @ 5V
Write operation
Read operation
--
--
--
--
28
23
mA
V
CC
= 5V operation
Input Characteristics
Type
SYMBOL
PARAMETER
MIN
MAX
TYP
UNIT
CONDITION
1
V
IH
Input High Voltage CMOS
2.0
2.0
--
--
V
V
CC
= 3.3 V
V
CC
= 5 V
V
IL
Input Low Voltage CMOS
--
1.0
1.0
--
V
CC
= 3.3 V
V
CC
= 5 V
2
V
IH
Input High Voltage
2.0
2.0
--
--
V
CC
= 3.3 V
V
CC
= 5 V
V
IL
Input Low Voltage CMOS
--
1.0
0.8
--
V
CC
= 3.3 V
V
CC
= 5 V
3
V
T+
Input Low to High threshold
Schmitt trigger
--
2.5
2.5
2.1
2.1
V
CC
= 3.3 V
V
CC
= 5 V
V
T-
Input High to Low threshold
Schmitt trigger
0.9
0.9
--
1.2
1.2
V
CC
= 3.3 V
V
CC
= 5 V
V
t
Hysteresis voltage
0.5
0.8
V
CC
= 3.3 V
V
CC
= 5 V
4
V
T+
Input Low to High threshold
Schmitt trigger
--
2.3
2.0
2.1
1.8
V
CC
= 3.3 V
V
CC
= 5 V
V
T-
Input High to Low threshold
Schmit trigger
1.0
0.8
1.2
1.1
V
CC
= 3.3 V
V
CC
= 5 V
V
t
Hysteresis voltage
0.5
0.8
V
CC
= 3.3 V
V
CC
= 5 V
Output Drive Characteristics
Type
SYMBOL
PARAMETER
MIN
MAX
TYP
UNIT
CONDITION
1
V
OH
Output High Voltage
V
CC
- 0.8
--
--
V
I
OH
= -4mA
I
OL
= 4mA
V
OL
Output Low Voltage
--
Gnd + 0.4
--
8
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
WED7PxxxCFA70xxI25
July 2005
Rev. 1
White Electronic Designs Corp. reserves the right to change products or specifi cations without notice.
AC CHARACTERISTICS
V
CC
= 3.3 V 5%, 5 V 0.5V, -40C T
A
85C
Attribute Memory Read AC Characteristics
SYMBOL
PARAMETER
MIN
MAX
UNIT
t
C
Read cycle time
250
--
ns
t
A
Address access time
--
250
t
A
CE# access time
--
250
t
A
OE# access time
--
125
t
DIS
Output disable time (CE#)
--
100
t
DIS
Output disable time (OE#)
--
100
t
EN
Output enable time (CE#)
5
--
t
EN
Output enable time (OE#)
5
--
t
V
Data valid time (A)
0
--
t
SU
Address setup time
30
--
Attribute Memory Write AC Characteristics
SYMBOL
PARAMETER
MIN
MAX
UNIT
t
C
Write cycle time
250
--
ns
t
W
Write pulse time
150
--
t
SU
Address setup time
30
--
t
SU
Data setup time (-WE)
80
--
t
H
Data hold time
30
--
t
REC
Write recover time
30
--
I/O Access Read AC Characteristics
SYMBOL
PARAMETER
MIN
MAX
UNIT
t
D
Data delay after IORD#
--
100
ns
t
H
Data hold following IORD#
0
--
t
W
IORD# pulse width
165
--
t
SU
A
Address setup before IORD#
70
--
t
H
A
Address hold following IORD#
20
--
t
SU
CE
CE# setup before IORD#
5
--
t
H
CE
CE# hold following IORD#
20
--
t
SU
REG
REG# setup before IORD#
5
--
t
H
REG
REG# hold following -IORD
0
--
t
DF
INPACK
INPACK# delay failing from IORD#
0
45
t
DR
INPACK
INPACK# delay rising from IORD#
--
45
t
DF
IOIS1
6
IOIS#16 delay failing from address
--
35
t
DR
IOIS16
IOIS#16 delay rising from address
--
35
9
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
WED7PxxxCFA70xxI25
July 2005
Rev. 1
White Electronic Designs Corp. reserves the right to change products or specifi cations without notice.
I/O Access Write AC Characteristics
SYMBOL
PARAMETER
MIN
MAX
UNIT
t
SU
Data setup before IOWR#
60
--
ns
t
H
Data hold following IOWR#
30
--
t
W
IOWR# pulse width
165
--
t
SU
A
Address setup before IOWR#
70
--
t
H
A
Address hold following IOWR#
20
--
t
SU
CE
CE# setup before IOWR#
5
--
t
H
CE
CE# hold following IOWR#
20
--
t
SU
REG
REG# setup before IOWR#
5
--
t
H
REG
REG# hold following IOWR#
0
--
t
DF
IOIS16
IOIS16# delay failing from address
--
35
t
DR
IOIS16
IOIS16# delay rising from address
--
35
Common Memory Access Read AC Characteristics
SYMBOL
PARAMETER
MIN
MAX
UNIT
t
A
OE# access time
--
125
ns
t
DIS
Output disable time (OE#)
--
100
t
SU
Address setup time
30
--
t
H
Address hold time
20
--
t
SU
CE# setup before OE#
0
--
t
H
OE# hold following OE#
20
--
Common Memory Access Write AC Characteristics
SYMBOL
PARAMETER
MIN
MAX
UNIT
t
SU
Data setup before WE#
80
--
ns
t
H
Data hold following WE#
30
--
t
W
Write pulse width
150
--
t
H
Address hold time
20
--
t
SU
Address setup time
30
--
t
SU
CE# setup time
0
--
t
REC
Write recover time
30
--
t
H
CE# hold following WE#
20
--
10
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
WED7PxxxCFA70xxI25
July 2005
Rev. 1
White Electronic Designs Corp. reserves the right to change products or specifi cations without notice.
True IDE Mode IO Read/Write AC Characteristics
SYMBOL
PARAMETER
MIN
MAX
UNIT
t0
Cycle time
120
--
ns
t1
Address valid to -DIOW/-DIOR setup
25
--
t2
DIOW#/-DIOR
70
--
t2
DIOW#/-DIOR Register (8bit)
70
--
t2i
DIOW#/-DIOR recoverry time
25
--
t3
DIOW# data setup
20
--
t4
DIOW# data hold
10
--
t5
DIOR# data setup
20
--
t6
DIOR# data hold
5
--
t6z
DIOR# data tristate
--
30
t7
Address valid to -IOIS16 assertion
--
35
t8
Address valid to -IOIS16 released
--
35
t9
DIOW#/-DIOR to address valid hold
10
--
True IDE Mode Multiword DMA Read/Write AC Characteristics
SYMBOL
PARAMETER
MIN
MAX
UNIT
t0
Cycle time
120
--
ns
tD
DIOR#/DIOW# assert width
70
--
tE
DIOR# data access
--
50
tF
DIOR# data hold
5
--
tG
DIOW#/DIOR# data setup
20
--
tH
DIOW# data hold
10
--
tI
DMACK# to DIOR#/DIOW# setup
0
--
tJ
DIOR#/DIOW# to DMACK hold
5
--
tKR
DIOR# negated width
25
--
tKW
DIOW# negated width
25
--
tLR
DIOR# to DMARQ delay
--
35
tLW
DIOW# to DMARQ delay
--
35
tM
CS0#/CS1# valid to -DIOR#/-DIOW#
25
--
tN
CS0#/CS1# hold
10
--
tZ
DMACK# to read data released
--
25
11
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
WED7PxxxCFA70xxI25
July 2005
Rev. 1
White Electronic Designs Corp. reserves the right to change products or specifi cations without notice.
Reset Characteristics (only Memory Card Mode or I/O Card Mode)
SYMBOL
PARAMETER
MIN
MAX
UNIT
t
SU
Reset setup time
100
--
m s
t
REC
CE# recover time
1
--
s
t
PR
V
CC
rising up time
0.1
100
m s
t
PF
V
CC
falling down time
3
300
m s
t
W
Reset pulse width
10
--
s
t
H
1
--
m s
t
S
0
--
m s
Power on Reset Characteristics
Power on reset sequence must need by PORST# at the rising edge of V
CC
.
SYMBOL
PARAMETER
MIN
MAX
UNIT
t
SU
CE# setup time
100
--
m s
t
PR
V
CC
rising up time
0.1
100
m s
12
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
WED7PxxxCFA70xxI25
July 2005
Rev. 1
White Electronic Designs Corp. reserves the right to change products or specifi cations without notice.
PACKAGE DIMENSIONS
4xR 0.5mm
.1
(4xR.020 in
.004)
41.66mm
.13(1.640 in . 005)
42.80mm
.10(1.685 in .004)
0.63mm
.07(.025 in .003)
.01mm
.07(.039 in .003)
26
50
1
25
.99mm
.05
(.039 in
.002)
.01mm
.07(.039 in .003)
3.30mm
.10
(.130 in
.004)
1.60mm
.05
(.063 in
.002)
0.76mm
.07(0.30 in .003)
m
m
0
0
.
3
x
2
7
0
.
n
i
8
1
1
.
x
2
(
.
)
3
0
0
m
m
0
4
.
6
3
n
i
3
3
4
.
1
(
5
1
.
.
)
6
0
0
2.44mm
.07
(.096 in
.003)
m
m
8
7
.
5
2
x
2
5
1
0
.
1
x
2
(
7
0
.
.
)
3
0
0
m
m
0
0
.
2
1
x
2
0
1
.
n
i
2
7
4
x
2
(
.
)
4
0
0
2.15mm
.07
(.085 in x .003)
Optional Configuration
(See Note)
Top View
Note: The optional notched confi guration was shown in the CF Specifi cation Rev.1.0. In Specifi cation
Rev. 1.2. The notch was removed for ease of tooling. This optional confi guration can be used
but it is not recommended.
13
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
WED7PxxxCFA70xxI25
July 2005
Rev. 1
White Electronic Designs Corp. reserves the right to change products or specifi cations without notice.
ATTENTION FOR CARD USE
In the reset or power off mode, the information in all registers are cleared.
Note that the card insertion/removal should not be executed while host is active if the card is used in True IDE
mode.
After the hard reset, soft reset or power-on reset or ATA reset command is applied the card cannot be accessed
while READY pin is "low." Flash card can't be operated in this mode.
Before
insertion
V
CC
cannot be supplied to the card. After confi rmation that CD1#, CD2# pins are set, V
CC
may
be supplied to the card.
OE# must be kept at the VCC level during power on reset in memory card mode and I/O card mode. OE must be
kept constantly at the GND level in True IDE mode.
Do not turn off the power or remove WED7PxxxCFA70xxI25 Series from the slot before read/write operation is
complete. Avoid using WED7PxxxCFA70xxI25 Series when the battery is low. Power shortage, power failure
and/or removal of WED7PxxxCFA70xxI25 Series from the slot before read/write operation is complete may
cause malfunction of WED7PxxxCFA70xxI25 Series, data loss and/or damage to data.
Routine performance of backing-up data (or taking back-up of data) is strongly recommended.
14
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
WED7PxxxCFA70xxI25
July 2005
Rev. 1
White Electronic Designs Corp. reserves the right to change products or specifi cations without notice.
PART NUMBERING GUIDE
WED 7P xxx CFA 70 xx I 25
WEDC
Flash
Memory Size
Compact Flash
Industrial Flash
Housing:
00 = WEDC Logo
01 = Blank Housing
Enhanced Industrial Temp
Speed
15
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
WED7PxxxCFA70xxI25
July 2005
Rev. 1
White Electronic Designs Corp. reserves the right to change products or specifi cations without notice.
Document Title
128MB to 1GB Industrial Compact Flash
Revision History
Rev #
History
Release Date
Status
Rev 0
Initial Release
March 2005
Final
Rev 1
1.1 Added "ED" to part marking
July 2005
Final
PDF 
ZIP