1
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
W764M32V-XSBX
March 2006
Rev. 2
ADVANCED*
White Electronic Designs Corp. reserves the right to change products or specifi cations without notice.
64Mx32 Flash Multi-Chip Package
3.0V Page Mode Flash Memory
Single power supply operation
3 volt read, erase, and program operations
I/O Control
All input levels (address, control, and DQ input
levels) and outputs are determined by voltage on
V
IO
input. V
IO
range is 1.65 to
V
CC
Secured Silicon Sector region
128-word/256-byte sector for permanent, secure
identifi cation through an 8-word/16-byte random
Electronic Serial Number, accessible through a
command sequence
May be programmed and locked at the factory or
by the customer
Flexible sector architecture
Five hundred twelve 64 Kword (128 Kbyte) sectors
Two hundred fi fty-six 64 Kword (128 Kbyte)
sectors
One hundred twenty-eight 64 Kword (128 Kbyte)
sectors
Compatibility with JEDEC standard
Provides software compatibility for single-power
supply fl ash, and superior inadvertent write
protection
100,000 erase cycles per sector typical
20-year data retention typical
PERFORMANCE CHARACTERISTICS
High Performance
100, 120 ns
8-word/16-byte page read buffer
25 ns page read times
16-word/32-byte write buffer reduces overall
programming time for multiple-word updates
Package option
107 BGA, 14mm x 17mm
1.0mm pitch
Software features
Program Suspend and Resume: read other
sectors before programming operation is
completed
Erase Suspend and Resume: read/program other
sectors before an erase operation is completed
Data# polling and toggle bits provide status
Unlock Bypass Program command reduces overall
multiple-word programming time
CFI (Common Flash Interface) compliant: allows
host system to identify and accommodate multiple
fl ash devices
Hardware features
Advanced Sector Protection
WP#/ACC input accelerates programming
time (when high voltage is applied) for greater
throughput during system production. Protects
fi rst or last sector regardless of sector protection
settings
Hardware reset input (RESET#) resets device
Ready/Busy# output (RY/BY#) detects program or
erase cycle completion
* This product is under development, is not qualifi ed or characterized and is subject to
change or cancellation without notice.
FEATURES
2
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
W764M32V-XSBX
March 2006
Rev. 2
ADVANCED*
White Electronic Designs Corp. reserves the right to change products or specifi cations without notice.
GENERAL DESCRIPTION
The W764MB2V-XSBX device is a 3.0V single power
flash memory. The device utilizes four organized as
33,554,432 words or 67, 108,864 bytes. The device has
64 -bit wide data bus that can also function as an 32-bit
wide data bus by using the BYTE# input. The device can
be programmed either in the host system or in standard
EPROM programmers.
Each device requires a single 3.0 volt power supply for
both read and write functions. In addition to a V
CC
input, an
high-voltage accelerated program (WP / ACC) input provides
shorter programming times through increased current. This
feature is intended to facilitate factory throughput during
system production, but may also be used in the fi eld if
desired.
The devices are entirely command set compatible with the
JEDEC single power-supply Flash standard. Commands
are written to the device using standard microprocessor write
timing. Write cycles also internally latch addresses and data
needed for the programming and erase operations.
The sector erase architecture allows memory sectors to
be erased and reprogrammed without affecting the data
contents of other sectors. The device is fully erased when
shipped from the factory.
Device programming and erasure are initiated through
command sequences. Once a program or erase operation
has begun, the host system need only poll the DQ7 (Data#
Polling) or DQ6 (toggle) status bits or monitor the Ready /
Busy# (RY / BY#) output to determine whether the operation
is complete. To facilitate programming, an Unlock Bypass
mode reduces command sequence over head by requiring
only two write cycles to program data instead of four.
The I/O (V
IO
) control allows the host system to set the
voltage levels that the device generates and tolerates on
all input levels (address, chip control, and DQ input levels)
to the same voltage level that is asserted on the V
IO
pin.
This allows the device to operate in a 1.8 V or 3 V system
environment as required.
Hardware data protection measures include a low V
CC
detector that automatically inhibits write operations during
power transitions. Persistent Sector Protection provides
in-system, comand-enabled protection of any combination
of sectors using a single power supply at V
CC
. Password
Sector Protection prevents unauthorized write and erase
operations in any combination of sectors through a user-
defi ned 64-bit password.
The erase Suspend / Erase Resume feature allows the host
system to pause and erase operation in a given sector to
read or program any other sector and then complete the
erase operation. The Program Suspend / Program Resume
feature enables the host system to pause the program
operation in a given sector to read any other sector and
then complete the program operation.
The hardware RESET# pin terminates any operation in
progress and resets the device, after which it is then ready
for a new operation. The RESET# pin may be tied to the
system reset circuitry. A system reset would thus also
reset the device, enabling the host system to read boot-up
fi rmware from the Flash memory device.
The device reduces power consumption in the standby
mode when it detects specifi c voltage levels on CS# and
RESET#, or when addresses have been stable for a
specifi ed period of time.
The Secured Silicon Sector provides a 128-work/256-byte
area for code or data that can be permanently protected.
Once this sector is protected, no further changes within the
sector can occur.
The Write Protect (WP# / ACC) feature protects the fi rst or
last sector by asserting a logic low on the WP# pin.
3
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
W764M32V-XSBX
March 2006
Rev. 2
ADVANCED*
White Electronic Designs Corp. reserves the right to change products or specifi cations without notice.
WE0#
WE1#
CS1#
CS0#
RY/BY#
RESET#
OE#
A-1,A
0-24
WP#/ACC
DQ
8-15
DQ
16-23
DQ
24-31
DQ
0-7
64M X 8
64M X 8
64M X 8
64M X 8
VCC
VI0
DQ12
DQ13
DQ14
DQ15
DQ0
DQ1
DQ18
DQ19
VIO
GND
DQ24
DQ8
GND
A0
A3
VCC
GND
DQ10
DQ25
DQ9
GND
A1
A4
A6
RY/BY#
VIO
DQ27
DQ11
DQ26
GND
OE#
A5
A7
DQ29
DQ28
DNU
GND
A2
VIO
VCC
RESET#
WP/ACC#
A14
DQ30
DQ31
VIO
GND
CS0#
WE1#
A15
GND
VIO
VCC
GND
VIO
GND
A22
A23
A17
A18
A8
VIO
GND
VCC
GND
VIO
VCC
GND
VIO
GND
VIO
DQ17
DQ16
VIO
GND
CS1#
WE0#
A19
DQ2
DQ3
DNU
GND
A20
A21
A-1
DQ4
DQ20
DQ21
GND
A10
A9
A16
DQ5
DQ6
DQ23
GND
A12
A11
A24
VCC
DQ22
DQ7
GND
A13
VCC
A
B
C
D
E
F
G
H
J
K
L
M
1
2
3
4
5
6
7
8
9
BLOCK DIAGRAM
PIN DESCRIPTION
DQ
0-63
Data Inputs/Outputs
A
0-24, A-1*
Address Inputs
WE#
0-1
Write Enables
CS#
0-1
Chip Selects
OE#
Output Enable
RESET#
Hardware Reset
WP#/ACC
Hardware Write
Protection/Acceleration
RY/BY#
Ready/Busy Output
V
CC
Power Supply
V
IO
I/O Power Supply
GND
Ground
DNU
Do Not Use
* A-1 is the least signifi cant address.
FIG 1: PIN CONFIGURATION (TOP VIEW)
4
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White Electronic Designs
W764M32V-XSBX
March 2006
Rev. 2
ADVANCED*
White Electronic Designs Corp. reserves the right to change products or specifi cations without notice.
ABSOLUTE MAXIMUM RATINGS
Parameter
Unit
Operating Temperature
-55 to +125
C
Supply Voltage Range (V
CC
)
-0.5 to +4.0
V
Signal Voltage Range
-0.5 to Vcc +0.5
V
Storage Temperature Range
-55 to +125
C
Endurance (write/erase cycles)
1,000,000 min.
cycles
NOTES:
1.
Minimum DC voltage on input or input or I/Os is -0.5V. During voltage transitions,
inputs or I/Os may overshoot V
SS
to -2.0V for periods of up to 20ns. Maximum DC
voltage on input or I/Os us VCC + 0.5V. During voltage transitions, input or I/O pins
may overshoot to V
CC
+ 2.0V for periods up to 20ns
2.
Minimum DC input voltage on pins A9, OE#, and ACC is 0.5V. During voltage
transitions, A9, OE#, and ACC may overshoot V
SS
to -2.0V for periods of up to 20ns.
Maximum DC input voltage on pin A9, OE#, and ACC is +12.5V which may overshoot
to +14.0V for periods up to 20ns
3.
No more than one output may be shorted to ground at a time. Duration of the short
circuit should not be greater than one second.
4.
Stresses above those listed under Absolute Maxium Ratings may cause permanent
damage to the device. This is a stress rating only; functional operation of the device
at these or any other conditions above those indicated in the operational sections
of the data sheet is not implied. Exposure of the device to absolute maxium rating
conditons for extended peroids may affect device reliability
RECOMMENDED OPERATING CONDITIONS
Parameter
Symbol
Min
Max
Unit
Supply Voltage
V
CC
3.0
3.6
V
Operating Temp. (Mil.)
T
A
-55
+125
C
Operating Temp. (Ind.)
T
A
-40
+85
C
CAPACITANCE
T
A
= +25C, F = 1.0MHz
Parameter
Symbol
Max
Unit
WE1-4# capacitance
C
WE
TBD
pF
CS1-4# capacitance
C
CS
TBD
pF
Data I/O capacitance
C
I/O
TBD
pF
Address input capacitance
C
AD
TBD
pF
RESET# capacitance
C
RS
TBD
pF
RY/BY# capacitance
C
RB
TBD
pF
OE# capacitance
C
OE
TBD
pF
This parameter is guaranteed by design but not tested.
DATA RETENTION
Parameter
Test Conditions
Min
Unit
Pattern Data
Retention Time
150C
10
Years
125C
20
Years
5
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White Electronic Designs
W764M32V-XSBX
March 2006
Rev. 2
ADVANCED*
White Electronic Designs Corp. reserves the right to change products or specifi cations without notice.
DC CHARACTERISTICS CMOS COMPATIBLE
V
CC
= 3.3V 0.3V, -55C T
A
+125C
Parameter
Symbol
Conditions
Min
Typ
Max Unit
Input Load Current (1)
I
LI
V
IN
= V
SS
to V
CC
, #V
CC =
V
CC(MAX)
WP/ACC: 2.0
A
Others: 1.0
A9 Input Load Current
I
LIT
V
CC
= to V
CC(MAX)
; A9 = 12.5V
35
A
Output Leakage Current
I
LO
V
OUT
= V
SS
to V
CC
, # V
CC
=
V
CC(MAX)
1.0
A
V
CC
Active Current for Read (1)
I
CC1
CE# = V
IL
#, OE# = V
IH
, V
CC
=
V
CC(MAX)
; # f = 1 MHz, Byte Mode
24
80
mA
CE# = V
IL
#, OE# = V
IH
, V
CC
=
V
CC(MAX)
; # f = 5MHz, Word Mode
120
200
mA
V
CC
Intra-Page Read Current (1)
I
CC2
CE# = V
IL
#, OE# = V
IH
, V
CC
=
V
CC(MAX)
; f = 10MHz
1
10
mA
V
CC
Active Erase/Program Current (2,3)
I
CC3
CE# = V
IL
#, OE# = V
IH
, V
CC
=
V
CC(MAX)
200
320
mA
V
CC
Standby Current
I
CC4
V
CC
= V
CC(MAX);
V
IO
= V
CC
; OE# =
V
IH
; # V
IL
= V
SS
+ 0.3V/-0.1V; #
CE#, RESET# = V
SS
0.3V
4
20
A
V
CC
Reset Current
I
CC5
V
CC
= V
CC(MAX);
V
IO
= V
SS
+ 0.3V/-
0.1V; RESET# = V
SS
0.3V
4
20
A
Automatic Sleep Mode (4)
I
CC6
V
CC
= V
CC(MAX);
V
IO
= V
CC
; V
IH =
V
CC
0.3V; #V
IL
= V
SS +
0.3V/-
0.1V; WP#/A
CC
= V
IH
4
20
A
A
CC
Accelerated Program Current
I
ACC
CE# = V
IL
, OE# = V
IH
, V
CC
=
V
CC(MAX)
, #WP#/A
CC
= V
IH
WP#/A
CC
pin
40
80
mA
V
CC
pin
200
320
Input Low Voltage (5)
V
IL
-0.1
0.3 x V
IO
V
Input High Voltage (5)
V
IH
0.7 x V
IO
V
IO
+ 0.3
V
Voltage for ACC Erase/Program
Acceleration
V
HH
V
CC
= 2.7 - 3.6V
11.5
12.5
V
Voltage for Autoselect and Temporary
Sector Unprotect
V
ID
V
CC
= 2.7 - 3.6V
11.5
12.5
V
Output Low Voltage (5)
V
OL
I
OL
= -100 A
0.15 x V
IO
V
Output High Voltage (5)
V
OH
I
OH
= -100 A
0.85 x V
IO
V
Low V
CC
Lock-Out Voltage
V
LKO
2.3
2.5
V
NOTES:
1. The
I
CC
current is typically less than 2 mA/MHz, with OE# at V
IH
2. I
CC
active while Embedded Erase or Embedded Program or Write Buffer Programming is in progress.
3. Not
100%
tested.
4.
Automatic sleep mode enables the lower power mode when addresses remain stable for t
ACC
+ 30ns.
5. V
IO
= 1.65-1.95V or 2.7-3.6V.
6. V
CC
= 3 V and V
IO
= 3V or 1.8V. When V
IO
is at 1.8V, I/O pins cannot operate at 3V.
6
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
W764M32V-XSBX
March 2006
Rev. 2
ADVANCED*
White Electronic Designs Corp. reserves the right to change products or specifi cations without notice.
AC CHARACTERISTICS WRITE/ERASE/PROGRAM OPERATIONS WE# CONTROLLED
V
CC
= 3.3V 0.3V, -55C T
A
+125C
Parameter
Symbol
-100
-120
Unit
Min
Max
Min
Max
Write Cycle Time (3)
t
AVAV
t
WC
100
120
ns
Chip Select Setup Time (3)
t
ELWL
t
CS
0
0
ns
Write Enable Pulse Width
t
WLWH
t
WP
35
50
ns
Address Setup Time
t
AVWL
t
AS
0
0
ns
Data Setup Time
t
DVWH
t
DS
45
50
ns
Data Hold Time
t
WHDX
t
DH
0
0
ns
Address Hold Time
t
WLAX
t
AH
45
50
ns
Write Enable Pulse Width High (3)
t
WHWL
t
WPH
30
30
ns
Duration of Byte Programming Operation (1)
t
WHWH1
500
500
s
Sector Erase (2)
t
WHWH2
3.5
5
sec
Read Recovery Time before Write (3)
t
GHWL
0
0
ns
VCC Setup Time
t
VCS
50
50
s
Address Setup Time to OE# low during toggle bit
polling
t
ASO
15
15
ns
Write Recovery Time from RY/BY# (3)
t
RB
0
0
ns
Program/Erase Valid to RY/BY#
t
BUSY
90
90
ns
NOTES:
1.
Typical value for t
WHWH
1
is 60 s.
2.
Typical value for t
WHWH
2
is 0.5 sec.
3.
Guaranteed by design, but not tested.
AC CHARACTERISTICS READ-ONLY OPERATIONS
V
CC
= 3.3V 0.3V, -55C T
A
+125C
Parameter
Symbol
-100
-120
Unit
Min
Max
Min
Max
Read Cycle Time (1)
t
AVAV
t
RC
100
120
ns
Address Access Time
t
AVQV
t
ACC
100
120
ns
Chip Select Access Time
t
ELQV
t
CE
100 120
ns
Page Access Time
t
PACC
25
30
ns
Output Enable to Output Valid
t
GLQV
t
OE
25
35 ns
Chip Select High to Output High Z
t
EHQZ
t
DF
20 20
ns
Output Enable High to Output High Z
t
GHQZ
t
DF
20 20
ns
Output Hold from Addresses, CS# or OE# Change,
Whichever occurs fi rst
t
AXQX
t
OH
0
0
ns
Output Enable Hold Time (1)
Read
t
OEH
0
0
ns
Toggle and
Data# Polling
10
10
ns
1.
Guaranteed by design, not tested.
7
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White Electronic Designs
W764M32V-XSBX
March 2006
Rev. 2
ADVANCED*
White Electronic Designs Corp. reserves the right to change products or specifi cations without notice.
FIGURE 2: AC WAVEFORMS FOR READ OPERATIONS
Addresses
CS#
OE#
WE#
Outputs
High Z
Addresses Stable
t
OE
t
RC
Output Valid
t
CE
t
ACC
t
OH
High Z
t
DF
RESET#
RY/BY#
OV
t
OEH
FIGURE 3: PAGE READ TIMING
Amax-A2
CE#
OE#
A
2
-A
-1
Data Bus
Same Page
Aa
Ab
Ac
Ad
Qa
Qb
Qc
Qd
t
ACC
t
PACC
t
PACC
t
PACC
8
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White Electronic Designs
W764M32V-XSBX
March 2006
Rev. 2
ADVANCED*
White Electronic Designs Corp. reserves the right to change products or specifi cations without notice.
AC CHARACTERISTICS HARDWARE RESET (RESET#)
Parameter
Symbol
Unit
Min
Max
RESET# Pin Low (During Embedded Algorithms)
to Read Mode (1)
t
ready
20
s
RESET# Pin Low (NOT During Embedded Algorithms)
to Read Mode (1)
t
ready
500
ns
RESET# Pulse Width
t
RP
500
ns
RESET# High Time Before Read (1)
t
RH
50
ns
RESET# Low to Standby Mode (1)
t
RPD
20
s
RY/BY# Recovery Time
t
RB
0
ns
NOTE: 1. Not tested.
RY/BY#
CS#, OE#
RESET#
tRP
tReady
tRH
tReady
tRP
tRH
tRB
RY/BY#
CS#, OE#
RESET#
FIGURE 4: RESET TIMINGS NOT DURING EMBEDDED ALGORITHMS
FIGURE 5: RESET TIMINGS DURING EMBEDDED ALGORITHMS
9
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White Electronic Designs
W764M32V-XSBX
March 2006
Rev. 2
ADVANCED*
White Electronic Designs Corp. reserves the right to change products or specifi cations without notice.
FIGURE 6: PROGRAM OPERATIONS
Addresses
CS#
OE#
WE#
Data
RY/BY#
V
CC
555h
PA
PA
t
WC
t
AH
t
WHWH1
PD
Status
D
OUT
A0h
t
BUSY
PA
t
AS
t
CH
t
WP
t
CS
t
WPH
t
DS
t
DH
t
VCS
t
RB
NOTES:
1.
PA is the address of the memory location to be programmed.
2.
PD is the data to be programmed at byte address.
3. D
OUT
is the output of the data written to the device.
4.
Figure indicates last two bus cycles of four bus cycle sequence.
10
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White Electronic Designs
W764M32V-XSBX
March 2006
Rev. 2
ADVANCED*
White Electronic Designs Corp. reserves the right to change products or specifi cations without notice.
FIGURE 7: ACCELERATED PROGRAM TIMING DIAGRAM
FIGURE 8: CHIP/SECTOR ERASE OPERATION TIMINGS
V
HH
t
VHH
t
VHH
V
IL
or V
IH
WP#/A
CC
V
IL
or V
IH
t
DH
2AAh
SA
VA
t
WC
t
AH
t
WHWH2
30h
In
Progress
Complete
55h
t
BUSY
VA
t
AS
t
CH
t
WP
t
CS
t
WPH
t
DS
t
VCS
t
RB
10 for Chip Erase
555h for
chip erase
Addresses
CS#
OE#
WE#
Data
RY/BY#
V
CC
NOTES: 1. SA = Sector Address (for Sector Erase), VA = Valid Address for reading status data
11
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White Electronic Designs
W764M32V-XSBX
March 2006
Rev. 2
ADVANCED*
White Electronic Designs Corp. reserves the right to change products or specifi cations without notice.
FIGURE 9: DATA POLLING TIMINGS (DURING EMBEDDED ALGORITHMS)
Addresses
VA
VA
VA
t
RC
CS#
Complement
Complement
True
DQ
0
-DQ
6
t
CE
t
CH
t
OE
OE#
WE#
t
OEH
t
DF
t
OH
Valid Data
High Z
RY/BY#
t
BUSY
DQ
7
t
ACC
Status Data
Status Data
True
Valid Data
High Z
NOTE: VA = Valid address. Illustration shows fi rst status cycle after command sequence, last status read cycle, and array data read cycle.
12
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White Electronic Designs
W764M32V-XSBX
March 2006
Rev. 2
ADVANCED*
White Electronic Designs Corp. reserves the right to change products or specifi cations without notice.
FIGURE 10: TOGGLE BIT TIMINGS (DURING EMBEDDED ALGORITHMS)
FIGURE 11: DQ2 Vs. DQ6
RY/BY#
DQ
6
/DQ
2
OE#
CS#
Addresses
WE#
t
AS
t
AHT
t
AHT
t
ASO
t
CEPH
t
OEH
t
OEPH
t
DH
Valid Data
Valid
Status
Valid
Data
t
OE
(First Read)
(Second Read)
(Stops Toggling)
Valid
Status
Valid
Status
NOTE: VA = Valid address, not required for DQ
6
. Illustration shows fi rst two status cycle after command sequence, last status read cycle, and array data read cycle.
WE#
DQ
6
DQ
2
Enter
Embedded
Erasing
Erase
Suspend
Enter Erase
Suspend Program
Erase
Resume
Erase
Erase Suspend
Read
Erase
Suspend
Program
Erase Suspend
Read
Erase
Erase
Complete
NOTE: DQ
2
toggles only when read at an address within an erase-suspended sector. The system may use OE# or CS# to toggle DQ
2
and DQ
6
.
13
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White Electronic Designs
W764M32V-XSBX
March 2006
Rev. 2
ADVANCED*
White Electronic Designs Corp. reserves the right to change products or specifi cations without notice.
AC CHARACTERISTICS ALTERNATE CS# CONTROLLED ERASE AND PROGRAM OPERATIONS
Parameter
Description
Speed Options
Unit
JEDEC Std
100
120
t
AVAV
t
WC
Write
Cycle
Time
(1)
Min
100
120
ns
t
AVWL
t
AS
Address
Setup
Time
Min
0
0
ns
t
ELAX
t
AH
Address
Hold
Time
Min
45
50
ns
t
DVEH
t
DS
Data
Setup
Time
Min
45
50
ns
t
EHDX
t
DH
Data
Hold
Time
Min
0
0
ns
t
GHEL
t
GHEL
Read Recovery Time Before Write (OE# High to WE# Low)
Min
0
0
ns
t
WLEL
T
WS
WE# Setup Time
Min
0
0
ns
t
EHWH
t
WH
WE#
Hold
Time
Min
0
0
ns
t
ELEH
t
CP
CS#
Pulse
Width
Min
35
35
ns
t
EHEL
t
CPH
CS#
Pulse
Width
High
Min
30
30
ns
t
WHWH1
t
WHWH1
Programming Operation
Typ
60
6
s
t
WHWH1
t
WHWH1
Accelerated Programming Operation
Typ
54
54
s
t
WHWH2
t
WHWH2
Sector Erase Operation
Typ
0.5
05
sec
NOTE: 1. Not tested.
14
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
W764M32V-XSBX
March 2006
Rev. 2
ADVANCED*
White Electronic Designs Corp. reserves the right to change products or specifi cations without notice.
FIGURE 12: ALTERNATE CS# CONTROLLED WRITE (ERASE/PROGRAM) OPERATION TIMINGS
Addresses
555 for Program
2AA for Erase
PA
t
WC
WE#
OE#
CS#
Data
t
AS
t
AH
t
CPH
t
WS
DQ
7
#
RESET#
t
DH
t
DS
PD for Program
30 for Sector Erase
10 for Chip Erase
PA for Program
SA for Sector Erase
555 for Chip Erase
Data# Polling
t
WH
t
GHEL
t
WHWH1 OR 2
t
BUSY
t
HR
A0 for Program
55 for Erase
RY/BY#
t
CP
D
OUT
NOTES:
1.
Figure indicates last two bus cycles of a program or erase operation.
2.
PA = program address, SA = sector address, PD = program data.
3.
DQ7 is the complement of the data written to the device. D
OUT
is the data written to the device.
15
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
W764M32V-XSBX
March 2006
Rev. 2
ADVANCED*
White Electronic Designs Corp. reserves the right to change products or specifi cations without notice.
PACKAGE: 107 PBGA (PLASTIC BALL GRID ARRAY)
9 8 7 6 5 4 3 2 1
A
B
C
D
E
F
G
H
J
K
L
M
17.10 (0.673) MAX
11.00 (0.433) NOM
1.00 (0
.039) NOM
1.00
(0.039)NOM
8.00 (0.315) NOM
14.10 (0.555) MAX
0.50 (0.020) NOM
2.32 (0.091) MAX
107 X 0.60 (0.024)NOM
BOTTOM VIEW
ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES
ORDERING INFORMATION
W 7 64M32 V XXX SB X
White Eletronic Designs Corp.
Flash:
Organization, 64M x 32:
3.3V Power Supply:
Access Time (ns):
100
=
100ns
120
=
120ns
ES = Non-qualifi ed product
1
Package Type:
SB = 107 PBGA, 14mm x 17mm
Devise Grade:
M = Military
-55C to +125C
I
=
Industrial
-40C
to
+85C
C = Commercial
0C to +70C
Blank = No temperature range specifi ed for non-qualifi ed product
NOTE 1: W764M32V-ESSB is only available product until completion of qualifi cation.
16
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
W764M32V-XSBX
March 2006
Rev. 2
ADVANCED*
White Electronic Designs Corp. reserves the right to change products or specifi cations without notice.
Document Title
64Mx32 Flash 3.3V
Revision History
Rev #
History
Release Date
Status
Rev 0
Initial Release
November 2005
Advanced
Rev 1
Changes (All Pages)
1.1 Add AC + DC characteristics and timing diagrams
1.2
Update package dimensions
1.3 Add preliminary pinout
February 2006
Advanced
Rev 2
Changes (Pg. 1, 3, 16)
2.1
Correct typographical error in pinout on page 3, ball 'B4' is
DQ9
March 2006
Advanced
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