US3021B
4-1
Rev. 1.4
12/8/00
TYPICAL APPLICATION
TYPICAL APPLICATION
DESCRIPTION
DESCRIPTION
The US3021B controller IC is specifically designed to
meet Intel specification for next generation micropro-
cessor applications requiring multiple on board regula-
tors . The US3021B provides a single chip control-
ler IC for the Vcore , 3LDO controllers, one with the
automatic select pin that connects to the TYPE DE-
TECT pin of the AGP slot for the AGP Vddq supply,
one for GTL+ and the other for the 1.8V chip set
regulator as required for the next generation PC
applications. The US3021B typically uses Bipolar
transistors for Vout3(1.5V) and Vout4(1.8V) however
if Vaux pin is connected to 12V, then MOSFETs can
also be used as external pass elements. No exter-
nal resistor divider is necessary for any of the regu-
lators. The switching regulator feature a patented topol-
ogy that in combination with a few external components
as shown in the typical application circuit ,will provide
well in excess of 20A of output current for an on- board
DC/DC converter while automatically providing the right
output voltage via the 5 bit internal DAC .The US3021B
also features, loss less current sensing for both
switcher by using the Rds-on of the high side Power
MOSFET as the sensing resistor, an output under
voltage shutdown that detects short circuit condi-
tion for the linear outputs and latches the system
off, and a Power Good window comparator that switches
its open collector output low when any one of the out-
puts is outside of a pre programmed window.
Provides Single Chip Solution for Vcore,
GTL+ ,AGP Bus, and 1.8V
Automatic Voltage Selection for AGP slot
Vddq supply
Linear regulator controller on board for 1.8V
Designed to meet Intel Latest VRM specifica-
tion for next generation micrprocessors
On board DAC programs the output voltage
from 1.3V to 3.5V
Linear regulator controller on board for 1.5V
GTL+ supply
Loss less Short Circuit Protection for all
outputs
Synchronous operation allows maximum
efficiency
Patented architecture allows fixed frequency
operation as well as 100% duty cycle during
dynamic load
Minimum part count
Soft Start
High current totem pole driver for direct
driving of the external Power MOSFET
Power Good function Monitors all Outputs
OVP Circuitry Protects the Switcher Output
and generates a Fault output
PACKAGE ORDER INFORMATION
PACKAGE ORDER INFORMATION
PRELIMINARY DATASHEET
FEATURES
FEATURES
5 BIT PROGRAMMABLE SYNCHRONOUS BUCK
PLUS TRIPPLE LDO CONTROLLER
APPLICATIONS
APPLICATIONS
Total Power Soloution for Next Generation Intel
Processor application
Ta (
C) Device Package
0 TO 70 US3021BCW 28 pin Plastic SOIC WB
3021Bapp3-1.1
LINEAR
CONTROL
LINEAR
CONTROL
SWITCHER
CONTROL
US3021B
Vout3
5V
Vout1
Vout4
LINEAR
CONTROL
Vout2
3.3V
4-2
Rev. 1.4
12/8/00
US3021B
ELECTRICAL SPECIFICATIONS
ELECTRICAL SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS
ABSOLUTE MAXIMUM RATINGS
V5 supply Voltage ........................................... 7V
V12 Supply Voltage ............................................ 20V
Storage Temperature Range ................................. -65 TO 150
C
Operating Junction Temperature Range .......... 0 TO 125
C
PACKAGE INFORMATION
PACKAGE INFORMATION
28 PIN WIDE BODY PLASTIC SOIC (W)
JA
=80
C/W
Unless otherwise specified ,these specifications apply over ,V12 = 12V, V5 = 5V and Ta=0 to 70
C. Typical values
refer to Ta =25
C. Low duty cycle pulse testing are used which keeps junction and case temperatures equal to the
ambient temperature.
PARAMETER
SYM
TEST CONDITION
MIN
TYP
MAX
UNITS
Supply UVLO Section
UVLO Threshold-12V
Supply ramping up
10
V
UVLO Hysterises-12V
0.6
V
UVLO Threshold-5V
Supply ramping up
4.4
V
UVLO Hysterises-5V
0.3
V
Supply Current
Operating Supply Current
V12
6
mA
V5
30
Switching Controllers; Vcore (Vsen 1) and AGP (Vsen 2)
VID Section (Vcore only)
DAC output voltage (note 1)
0.99Vs
Vs
1.01Vs
V
DAC Output Line Regulation
0.1
%
DAC Output Temp Variation
0.5
%
VID Input LO
0.8
V
VID Input HI
2
V
VID input internal pull-up
resistor to V5
27
k
Vsen2 Voltage
Select<0.8V
1.5
V
Select>2V
3.3
V
4
3
2
1
25
26
27
28
14
7
6
5
15
22
23
24
TOP VIEW
13
16
12
17
11
18
10
19
9
20
8
21
Drive2
Fix
VID4
VID3
VID2
VID1
VID0
PGood
SD
Vsen2
Select
SS
Fault / Rt
Vsen4
Drive4
Vaux
Gnd
Drive3
Vsen3
V5
Fb
Vsen1
OCSet
PGnd
LGate
Phase
UGate
V12
US3021B
4-3
Rev. 1.4
12/8/00
Error Comparator Section
Input bias current
2
uA
Input Offset Voltage
-2
+2
mV
Delay to Output
Vdiff=10mV
100
nS
Current Limit Section
C.S Threshold Set Current
200
uA
C.S Comp Offset Voltage
-5
+5
mV
Hiccup Duty Cycle
Css=0.1 uF
10
%
Output Drivers Section
Rise Time
CL=3000pF
70
nS
Fall Time
CL=3000pF
70
nS
Dead band Time Between
High side and Synch Drive
(Vcore Switcher Only)
CL=3000pF
200
nS
Oscillator Section (internal)
Osc Frequency
Rt=Open
217
Khz
1.8V Regulator (Vsen 4)
Vsense Voltage
Vo4
Ta=25, Drive4 = Vsen4
1.800
V
Vsense Voltage
1.800
V
Input bias current
2
uA
Output Drive Current
Vaux-Vdrive>0.6V
50
mA
1.5V Regulator (Vsen 3)
Vsense Voltage
Vo3
Ta=25, Drive3 = Vsen3
1.500
V
Vsense Voltage
1.500
V
Input bias current
2
uA
Output Drive Current
Vaux-Vdrive>0.6V
50
mA
Power Good Section
Vsen1 UV lower trip point
Vsen1 ramping down
0.90Vs
V
Vsen1 UV upper trip point
Vsen1 ramping up
0.92Vs
V
Vsen1 UV Hysterises
.02Vs
V
Vsen1 HV upper trip point
Vsen1 ramping up
1.10Vs
V
Vsen1 HV lower trip point
Vsen1 ramping down
1.08Vs
V
Vsen1 HV Hysterises
.02Vs
V
Vsen2 trip point
Select<0.8V
1.100
V
Select>2V
2.560
V
Vsen4 trip point
Fix=GND
0.920
V
Fix=Open
1.320
V
Vsen3 trip point
Fix=GND
0.920
V
Fix=Open
1.140
V
Power Good Output LO
RL=3mA
0.4
V
Power Good Output HI
RL=5K pull up to 5V
4.8
V
Fault (Overvoltage) Section
Core O.V. upper trip point
Vsen1 ramping up
1.17Vs
V
Core O.V. lower trip point
Vsen1 ramping down
1.15Vs
V
FAULT Output HI
Io=3mA
10
V
Soft Start Section
Soft Start Current
OCset=0V , Phase=5V
20
uA
4-4
Rev. 1.4
12/8/00
US3021B
Note 1: Vs refers to the set point voltage given in Table 1.
D4
D3
D2
D1
D0
Vs
D4
D3
D2
D1
D0
Vs
0
1
1
1
1
1.30
1
1
1
1
1
2.0
0
1
1
1
0
1.35
1
1
1
1
0
2.1
0
1
1
0
1
1.40
1
1
1
0
1
2.2
0
1
1
0
0
1.45
1
1
1
0
0
2.3
0
1
0
1
1
1.50
1
1
0
1
1
2.4
0
1
0
1
0
1.55
1
1
0
1
0
2.5
0
1
0
0
1
1.60
1
1
0
0
1
2.6
0
1
0
0
0
1.65
1
1
0
0
0
2.7
0
0
1
1
1
1.70
1
0
1
1
1
2.8
0
0
1
1
0
1.75
1
0
1
1
0
2.9
0
0
1
0
1
1.80
1
0
1
0
1
3.0
0
0
1
0
0
1.85
1
0
1
0
0
3.1
0
0
0
1
1
1.90
1
0
0
1
1
3.2
0
0
0
1
0
1.95
1
0
0
1
0
3.3
0
0
0
0
1
2.00
1
0
0
0
1
3.4
0
0
0
0
0
2.05
1
0
0
0
0
3.5
Table 1 - Set point voltage vs. VID codes
Pin Description
LSB input to the DAC that programs the output voltage. This pin is TTL compatible that
realizes a logic "1" as either HI or Open. When left open,his pin is pulled up internally by
a 27k
resistor to 5V supply.
Input to the DAC that programs the output voltage. This pin is TTL compatible that real-
izes a logic "1" as either HI or Open. When left open,his pin is pulled up internally by a
27k
resistor to 5V supply.
Input to the DAC that programs the output voltage. This pin is TTL compatible that real-
izes a logic "1" as either HI or Open. When left open,his pin is pulled up internally by a
27k
resistor to 5V supply.
MSB input to the DAC that programs the output voltage. This pin is TTL compatible that
realizes a logic "1" as either HI or Open. When left open,his pin is pulled up internally by
a 27k
resistor to 5V supply.
This pin selects a range of output voltages for the DAC.When in the LOW state the range
is 1.3V to 2.05V and when it switches to HI state the range is 2.0V to 3.5V. This pin is
TTL compatible that realizes a logic "1" as either HI or Open. When left open,his pin is
pulled up internally by a 27k
resistor to 5V supply.
This pin is an open collector output that switches LO when any of the outputs are outside
of the specified under voltage trip point. It also switches low when Vsen1 pin is more than
10% above the DAC voltage setting.
This pin provides the feedback for the synchronous switching regulator. Typically this pin
can be connected directly to the output of the switching regulator. However, a resistor
divider is recommended to be connected from this pin to vout1 and GND to adjust the
output voltage for any drop in the output voltage that is caused by the trace resistance.
The value of the resistor connected from Vout1 to FB1 must be less than 1000
.
This pin controls the gate of an external MOSFET for the AGP linear regulator.
This pin provides shutdown for all the regulatos. A TTL compatible, logic level high applied
to this pin disables all the outputs and discharges the soft start capacitor. The SD signal
turns off the synchronous allowing body diode to conduct and discharge the output cap.
PIN# PIN SYMBOL
7
VID0
6
VID1
5
VID2
4
VID3
3
VID4
8
PGOOD
21
FB
1
Drive2
9
SD
PIN DESCRIPTIONS
PIN DESCRIPTIONS
US3021B
4-5
Rev. 1.4
12/8/00
Pin Description
This pin is internally connected to the undervoltage and overvoltage comparators sensing
the Vcore status. It must be connected directly to the Vcore supply.
This pin provides the feedback for the AGP linear regulator. The Select pin when con-
nected to the "Type Detect" pin of the AGP slot automatically selects the right voltage for
the AGP Vddq.
This pin controls the gate of an external MOSFET for the 1.8V chip set linear regulator.
This pin is connected to the Drain of the power MOSFET of the Core supply and it
provides the positive sensing for the internal current sensing circuitry. An external resis-
tor programs the C.S threshold depending on the Rds of the power MOSFET. An external
capacitor is placed in parallel with the programming resistor to provide high frequency
noise filtering.
This pin is connected to the Source of the power MOSFET for the Core supply and it
provides the negative sensing for the internal current sensing circuitry.
This pin provides the soft start for all the regulators. An internal current source charges
an external capacitor that is connected from this pin to GND which ramps up the outputs
of the regulators, preventing the outputs from overshooting as well as limiting the input
current. The second function of the Soft Start cap is to provide long off time (HICCUP) for
the synchronous MOSFET during current limiting.
This pin has dual function. It acts as an output of the OVP circuitry or it can be used to
program the frequency using an external resistor . When used as a fault detector, if any
of the switcher outputs exceed the OVP trip point, the FAULT pin switches to 12V and
the soft start cap is discharged. If the FAULT pin is to be connected to any external
circuitry, it needs to be buffered.
This pin controls the gate of an external transistor for the 1.5V GTL+ linear regulator.
This pin provides the feedback for the linear regulator that its output drive is Drive3.
This pin is normally connected to 3.3V or 5V input. When connected to the 12V supply,
it provides gate drive voltage for the # 3 and #4 (Drive 3 and 4) linear regulator's pass
transistors in case MOSFET transistors are being used instead of Bipolars.
This pin provides the feedback for the linear regulator that its output drive is Drive4.
This pin serves as the ground pin and must be connected directly to the ground plane.
This pin serves as the Power ground pin and must be connected directly to the GND
plane close to the source of the synchronous MOSFET. A high frequency capacitor
(typically 1 uF) must be connected from V12 pin to this pin for noise free operation.
Output driver for the synchronous power MOSFET for the Core supply.
Output driver for the high side power MOSFET for the Core supply.
This pin is connected to the 12 V supply and serves as the power Vcc pin for the output
drivers. A high frequency capacitor (typically 1 uF) must be placed close to this pin and
PGND pin and be connected directly from this pin to the GND plane for the noise free
operation.
5V supply voltage. A high frequency capacitor (0.1 to 1 uF) must be placed close to this
pin and connected from this pin to the GND plane for noise free operation.
This pin provides automatic voltage selection for the AGP switching regulator. When it is
pulled LO, the voltage is 1.5V and when left open or pulled to HI, the voltage is 3.3V.
Leaving this pin open provides fixed output voltages of the 1.5V and 1.8V for the #3 and #4
linear regulators. When this pin is grounded the reference to the linear regulators are set
to 1.26V and therefore the output of the regulators can be programmed to any voltages
above the 1.26V using; Vout=1.26*(1+Rtop/Rbot)
Where:
Rtop=Top resistor connected from the output to the Vsense pin
Rbot=Bottom resistor connected from the Vsense pin to ground.
PIN# PIN SYMBOL
22
Vsen1
10
Vsen2
15
Drive4
23
OCSET
26
PHASE
12
SS
13
FAULT/Rt
18
Drive3
19
Vsen3
16
Vaux
14
Vsen4
17
GND
24
PGND
25
LGATE
27
UGATE
28
V12
20
V5
11
Select
2
FIX