UCC1806
UCC2806
UCC3806
Low Power, Dual Output, Current Mode PWM Controller
FEATURES
BiCMOS Version of UC1846 Families
1.4mA Maximum Operating Current
100
A Maximum Startup Current
1.0A Peak Output Current
125nsec Circuit Delay
Easier Parallelability
Improved Benefits of Current Mode
Control
DESCRIPTION
The UCC1806 family of BiCMOS PWM controllers offers exceptionally im-
proved performance with a familiar architecture. With the same block dia-
gram and pinout of the popular UC1846 series, the UCC1806 line features
increased switching frequency capability while greatly reducing the bias
current used within the device. With a typical startup current of 50
A and a
well defined voltage threshold for turn-on, these devices are favored for ap-
plications ranging from off-line power supplies to battery operated portable
equipment. Dual high current, FET driving outputs and a fast current sense
loop further enhance device versatility.
All the benefits of current mode control including simpler loop closing, volt-
age feed-forward, parallelability with current sharing, pulse-by-pulse current
limiting, and push-pull symmetry correction are readily achievable with the
UCC1806 series.
(continued)
10
7
3
8
SYNC
9
RT
4.4V
1.5V
OSC
LO
CT
3X
4
5
EA
6
120
A
1
S
1
QB
R
S
2
13
VC
11
AOUT
14
BOUT
12
GND
T
Q
QB
SHUTDOWN
LOCK OUT
S
1
Q
R
S
2
200
A
Q
R
S
16
200k
1.00V
0.35V
Q
R
S
CURRENT LIMIT
RESTART
UNDER VOLTAGE LOCKOUT
15
15V
5.1V
REFERENCE
REGULATOR
REFERENCE LOW
4.25V
2
CURLIM
SHUTDOWN
VREF
0.5V
+
COMP
7.0V
7.5V
CS
CS+
NI
INV
COMP
VIN
BLOCK DIAGRAM
SLUS272A - FEBRUARY 2000
UDG-99035
application
INFO
available
Pin numbers refer to DIL-16 package.
2
UCC1806
UCC2806
UCC3806
Supply Voltage, Low Impedance (Pin 15) . . . . . . . . . . . . . +15V
Supply Current, High Impedance (Pin 15) . . . . . . . . . . . +25mA
Output Supply Voltage (Pin 13) . . . . . . . . . . . . . . . . . . . . . +18V
Output Current, Continuous Source or Sink . . . . . . . . .
200mA
Output Current, Gate Drive. . . . . . . . . . . . . . . . . . . . . .
500mA
Analog Input Voltage (Pin 3, 4, 5, 6, 16) . .
-
0.3V to +V
IN
+0.3V
Sync Output Current (Pin 10) . . . . . . . . . . . . . . . . . . . . .
30mA
Error Amplifier Output Current (Pin 7) . +10mA/
-
(Self Limiting)
Power Dissipation at T
A
= 25C (Note 3) . . . . . . . . . . . 1000mW
Power Dissipation at T
C
= 25C (Note 3). . . . . . . . . . . 2000mW
Storage Temperature Range . . . . . . . . . . . . . . 65C to +150
C
Lead Temperature (soldering, 10 seconds) . . . . . . . . . . +300
C
Note 1. All voltages are with respect to Ground, Pin 12.
Note 2. Currents are positive into, negative out of the specified
terminal.
Note 3. Consult packaging section of databook for thermal limi-
tations and considerations of package.
Note 4. Pin numbers refer to DIL-16 package.
ABSOLUTE MAXIMUM RATINGS
CONNECTION DIAGRAMS
DIL-16 (Top View)
J or N, DW PACKAGE
ELECTRICAL CHARACTERISTICS: Unless otherwise stated, these specifications hold for T
A
= 55C to +125C for the
UCC1806,
-
40C to +85C for the UCC2806, and 0C to +70C for the UCC3806; V
IN
= 12V, R
T
= 33k, C
T
= 330pF,
C
BYPASS
on V
REF
= 0.01
F, T
A
= T
J
.
PARAMETER
TEST CONDITION
UCC1806 / UCC2806
UCC3806
UNITS
MIN
TYP
MAX
MIN
TYP
MAX
Reference Section
Output Voltage
T
J
= 25C, I
O
= 0.2mA
5.02
5.10
5.17
5.00
5.10
5.20
V
Load Regulation
0.2mA < I
O
< 5mA
3
25
3
25
mV
Total Output Variation
Line, Load, Temperature (Note 7)
-
150
150
-
150
150
mV
Output Noise Voltage
10Hz
f
10kHz, T
J
= 25C
(Note 5)
70
70
V
Long Term Stability
T
A
= 125C, 1000 Hours (Note 5)
5
25
5
25
mV
Output Short Circuit
-
10
-
30
-
10
-
30
mA
PLCC-20, LCC-20 (Top View)
Q, L PACKAGE
These devices are available with multiple package op-
tions for both through-hole and surface mount applica-
tions;
and
in
commercial,
industrial,
and
military
temperature ranges. Contact factory for availability.
The UCC1806 is specified for operation from 55C to
+125C, the UCC2806 is specified for operation from
40C to +85C, and the UCC3806 is specified for oper-
ation from 0C to +70C. The part is available in DIP and
SOIC packages.
DESCRIPTION (continued)
3
UCC1806
UCC2806
UCC3806
ELECTRICAL CHARACTERISTICS: Unless otherwise stated, these specifications hold for T
A
= 55C to +125C for the
UCC1806,
-
40C to +85C for the UCC2806, and 0C to +70C for the UCC3806; V
IN
= 12V, R
T
= 33k, C
T
= 330pF,
C
BYPASS
on V
REF
= 0.01
F, T
A
= T
J
.
PARAMETER
TEST CONDITION
UCC1806 / UCC2806
UCC3806
UNITS
MIN
TYP
MAX
MIN
TYP
MAX
Oscillator Section
Initial Accuracy
T
J
= 25
C
42
47
52
42
47
52
kHz
Temperature Stability
T
MIN
< T
A
< T
MAX
(Note 5)
2
2
%
Amplitude
2.35
2.35
V
SYNC Delay to Outputs
Pin 8 = 0V, Pin 9 = V
REF
,
V
SYNC
= 0.8V to 2.0V
50
125
50
100
ns
Discharge Current
T
J
= 25C, V
PIN
8 = 2.0V
2
2
mA
SYNC, V
OL
I
OUT
= +1mA
0.4
0.4
V
SYNC, V
OH
I
OUT
= 4mA
2.4
2.4
V
SYNC, V
IL
Pin 8 = 0V, Pin 9 = V
REF
0.8
0.8
V
SYNC, V
IH
Pin 8 = 0V, Pin 9 = V
REF
2.0
2.0
V
SYNC Input Current
-
1
+1
-
1
+1
A
Error Amplifier Section
Input Offset Voltage
5
10
mV
Input Bias Current
-
1
-
1
A
Input Offset Current
500
500
nA
Common Mode Range
0
V
IN
-2
0
V
IN
-
2
V
Open Loop Gain
V
O
= 1.0 to 4.0
80
100
80
100
dB
Unity Gain Bandwidth
1
1
MHz
Output Sink Current
V
ID
< 20mV, V
PIN 7
= 1.0V
1
1
mA
Output Source Current
V
ID
< 20mV, V
PIN 7
= 3.0V
-
80
-
120
-
80
-
120
A
Output High Level
V
ID
= 50mV
4.5
4.5
V
Output Low Level
V
ID
= 50mV
0.5
0.5
V
Current Sense Amplifier Section
Amplifier Gain
V
PIN 3
= 0V, V
PIN 1
= V
REF
(Notes 3,4)
2.75
3
3.35
2.75
3
3.35
V/V
Maximum Differential Input
Signal (V
PIN 4
- V
PIN 3
)
V
PIN 1
= V
REF
, V
PIN 5
= V
REF
,
V
PIN 6
= 0V
1.1
1.1
V
Input Offset Voltage
V
PIN 1
= 0.5V, V
PIN 7
= OPEN
10
30
10
50
mV
CMRR
V
CM
= 0 to V
IN
3.5
60
60
dB
PSRR
56
56
dB
Input Bias Current
V
PIN 1
= 0.5V, PIN 7 OPEN (Note 3)
-
1
-
1
A
Input Offset Current
V
PIN 1
= 0.5V, PIN 7 OPEN (Note 3)
1
1
A
Delay to Outputs
V
PIN 5
= V
REF
, PIN 6 = 0, PIN 1 = 2.75V,
PIN 4 PIN 3 = 0 to 1.5V step (Note 6)
125
175
125
175
ns
Current Limit Adjust Section
Current Limit Offset
V
PIN 3
= 0, V
PIN 4
= 0, PIN 7 = open
0.40
0.50
0.60
0.40
0.50
0.60
V
Input Bias Current
1
1
A
Minimum Latching Current
300
200
300
200
A
Maximum Non-Latching
Current
200
80
200
80
A
Shutdown Terminal Section
Threshold Voltage
0.94
1.00
1.06
0.9
1.0
1.1
V
Input Voltage Range
0
V
IN
0
V
IN
V
Delay to Outputs
V
PIN 16
= 0 to 1.3V
75
150
75
150
ns
4
UCC1806
UCC2806
UCC3806
ELECTRICAL CHARACTERISTICS: Unless otherwise stated, these specifications hold for T
A
= 55C to +125C for the
UCC1806,
-
40C to +85C for the UCC2806, and 0C to +70C for the UCC3806; V
IN
= 12V, R
T
= 33k, C
T
= 330pF,
C
BYPASS
on V
REF
= 0.01
F, T
A
= T
J
.
PARAMETER
TEST CONDITION
UCC1806 / UCC2806
UCC3806
UNITS
MIN
TYP
MAX
MIN
TYP
MAX
Output Section
Output Supply Voltage
2.5
15
2.5
15
V
Output Low Level
I
SINK
= 20mA
100
300
100
200
mV
I
SINK
= 100mA
0.40
1.1
0.40
1.1
V
Output High Level
I
SOURCE
=
-
20mA
11.6
11.9
11.6
11.9
V
I
SOURCE
=
-
100mA
11
11.6
11
11.6
V
Rise Time
T
J
= 25
C, C
LOAD
= 1000pF
35
65
35
65
ns
Fall Time
T
J
= 25
C, C
LOAD
= 1000pF
35
65
35
65
ns
Under Voltage Lockout Section
Startup Current
V
IN
< Start Threshold
50
100
50
100
A
Operating Supply Current
1
1.4
1
1.4
mA
V
IN
Shunt Voltage
I
VIN
= 10mA
15
17.5
15
17.5
V
Startup Threshold
6.5
7.5
8
6.5
7.5
8
V
Threshold Hysteresis
0.75
0.75
V
Note 1: All voltages are with respect to Ground, Pin 12.
Note 2: Currents are positive into, negative out of the specified terminal.
Note 3: Parameters measured at trip point of latch with V
PIN 5
= V
REF
, V
PIN 6
= 0V.
Note 4: Amplifier gain defined as: G = delta change at Pin 7/delta change forced at Pin 4 delta voltage at Pin 4 = 0 to 1V.
Note 5: Guaranteed by design. Not 100% tested in production.
Note 6: Current Sense Amp output is slew rate limited to provide noise immunity.
Note 7: Line Range = 10V to 15V, Load Range = 0.2mA to 5mA.
PIN DESCRIPTIONS
AOUT and BOUT: AOUT and BOUT provide alternating
high current gate drive for the external MOSFETs. Duty
cycle can be varied from 0 to 50% where minimum dead
time is a function of CT. Both outputs use MOS transistor
switches with inherent anti-parallel body diodes to clamp
voltage swings to the supply rails, allowing operation
without the use of clamp diodes.
COMP: COMP is the output of the error amplifier and the
input of the PWM comparator. The error amplifier is a low
output impedance, 2MHz operational amplifier which al-
lows sinking or sourcing of current at the COMP pin. The
error amplifier is internally current limited, so that zero
duty cycle can be commanded by externally forcing
COMP to GND.
CS: CS- is the inverting input of the 3X, differential cur-
rent sense amplifier.
CS+: CS+ is the non-inverting input of the 3X, differential
current sense amplifier.
CT: CT is the oscillator timing capacitor connection point,
which is charged by the current set by RT. CT is dis-
charged to GND through a 2.6mA current sink. This
causes a linear discharge of CT to zero volts which then
initiates the next switching cycle. Dead time occurs dur-
ing the discharge of CT, forcing AOUT and BOUT low.
Switching frequency (fs) and dead time (td) are approxi-
mated by:
fs
RT CT
td
and td
CT
=
+
=
1
2
961
CURLIM: CURLIM programs the primary current limit
threshold and determines whether the device will latch
off or retry after an overcurrent condition. When a shut-
down signal is generated, a 200
A current source to
ground pulls down on CURLIM. If the voltage on the pin
remains above 350mV the device remains latched and
the power must be cycled to restart. If the voltage on the
pin falls below 350mV, the device attempts a restart. The
voltage threshold is typically set by a resistor divider from
5
UCC1806
UCC2806
UCC3806
V
REF
to ground. To calculate the current limit adjust volt-
age threshold the following equations can be used;
Current Limit Adjust Latching Mode Voltage:
V
V
R
A
R
R
mV
REF
=
+
>
(
)
1 300
1
1
2
350
Current Limit Adjust Non-Latching Mode Voltage:
V
V
R
A
R
R
mV
REF
=
+
>
(
)
1 80
1
1
2
350
where R1 is the resistance from the V
REF
to CURLIM
and R2 is the resistance from CURLIM to GND.
GND: GND is the reference ground and power ground for
all functions of this part. Bypass and timing capacitors
should be connected as close as possible to GND.
INV: INV is the inverting input of the error amplifier and
has a common mode range from 0V to V
IN
2V.
NI: NI is the non-inverting input of the error amplifier and
has a common mode range from 0V to V
IN
2V.
RT: RT is the connection point for the oscillator timing re-
sistor. It has a low impedance input and is nominally at
1.25V. The current through RT is mirrored to the timing
capacitor pin, CT. This causes a linear charging of CT
from 0V to 2.35V. Note that the current mirror is limited to
a maximum of 100
A so RT must be greater than 12.5k.
SHUTDOWN: The SHUTDOWN pin is provided for en-
hanced protection. When SHUTDOWN is driven above
1V, AOUT and BOUT are forced low.
SYNC: SYNC is a bi-directional pin, allowing or providing
external synchronization with TTL compatible thresholds.
In a typical application RT is connected through a timing
resistor to GND which allows the internal oscillator to
free run. In this mode SYNC outputs a TTL compatible
pulse during the oscillator dead time (when CT is being
discharged). If RT is forced above 4.4V, SYNC acts as an
input with TTL compatible thresholds and the internal os-
cillator is disabled. When SYNC is high, greater than 2V
the outputs are held active low. When SYNC returns low,
the outputs may be high until the on-time is terminated
by the normal peak current signal, a fault seen at SHUT-
DOWN or the next high assertion of SYNC. Multiple
UCC3806s can be synchronized by a single master
UCC3806 or external clock.
VC: VC is the input supply connection for the FET drive
outputs and has an input range of 2.5V to 15V. VC
should be capacitively bypassed for proper operation.
V
IN
: V
IN
is the input supply connection for this device.
The UCC1806 has a maximum startup threshold of 8V
and internally limited by means of a 15V shunt regulator.
The shunted supply current must be limited to 2.5mA.
For proper operation, VIN must be bypassed to GND with
at least a 0.01
F ceramic capacitor.
V
REF
: V
REF
is a 5.1V
1% trimmed reference output with
a 5mA maximum available current. V
REF
must be by-
passed to GND with at least a 0.1
F ceramic capacitor
for proper operation.
PIN DESCRIPTIONS (continued)
40
42
44
46
48
50
52
54
56
58
60
-55 -50
-25
0
25
50
75
100
125
Temperature (C)
Oscillator
Frequency
(kH
z)
Figure 2. Oscillator frequency vs. temperature.
-20
0
20
40
60
80
1k
10k
100k
1M
Frequency (Hz)
G
ain (dB)
10M
Phase (
)
0
45
90
135
Figure 1. Error amplifier gain and phase response.
TYPICAL CHARACTERISTICS
6
UCC1806
UCC2806
UCC3806
47pF
100pF
220pF
330pF
470pf
1.0nF
2.2nF
10k
100k
1M
10k
1
100k
1M
CT=
Figure 3. Oscillator frequency vs. RT and CT.
TYPICAL CHARACTERISTICS (continued)
Design Equations
for Oscillator:
F
T
T
OSC
RAMP
FALL
=
+
1
T
RT CT
RAMP
=
1 9 2
.
T
CT
RT
FALL
=
2 4
0 002
125
.
.
.
Dead Time T
FALL
=
0
5
10
15
20
25
0
500k
1M
1.5M
Oscillator Frequency (Hz)
I
@ Load or No Load
IN
I
@
Output Load = 1nF
, 10
Ser
ies Resistance
C
I @ No Load
C
Supply Current (mA)
Figure 4. Supply current vs. oscillator frequency.
25
30
35
40
45
50
1k
10k
C=
1
n
F
T
C=
3
3
0
p
F
T
C
=100pF
T
100k
1M
Oscillator Frequency (Hz)
Maxim
um Duty Cycle (%)
Figure 5. Maximum duty cycle vs. frequency.
7
UCC1806
UCC2806
UCC3806
UNITRODE CORPORATION
7 CONTINENTAL BLVD. MERRIMACK, NH 03054
TEL. (603) 424-2410 FAX (603) 424-3460
TYPICAL APPLICATION
UDG-95036
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