PBS PACKAGE

(TOP VIEW)

PCMO
PCMI
DV

SCL
SDA
NC
NC

PLLV

EARV

EAR1ON

EARV

EAR1OP

EARV

EAR2O

MBIAS

MIC1P

MIC1N

MIC2P

24 23 22 21 20 19 18 17

MIC2N

REXT

MCLK

PLL

RESET

PWRUPSEL

BUZZCON

PCMSYN

PCMCLK

NC No internal connection

TWL1103T-Q1

VOICE-BAND AUDIO PROCESSOR (VBAP

)

SGLS120A APRIL 2002 REVISED MAY 2002

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

Qualification in Accordance With
AEC-Q100

Qualified for Automotive Applications

Customer-Specific Configuration Control
Can Be Supported Along With
Major-Change Approval

ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C

= 200 pF, R

= 0)

2.7-V Operation

Two Differential Microphone Inputs, One
Differential Earphone Output, and One
Single-Ended Earphone Output

Programmable Gain Amplifiers for
Transmit, Receive, Sidetone, and Volume
Control

Contact factory for details. Q100 qualification data available on

request.

Earphone Mute and Microphone Mute

On-Chip I

C Bus, Which Provides a Simple,

Standard, Two-Wire Serial Interface With
Digital ICs

Programmable for 15-Bit Linear Data or
8-Bit Companded (

-Law or A-Law) Data

Available in a 32-Pin Thin Quad Flatpack
(TQFP) Package

Designed for Analog and Digital Wireless
Handsets and Telecommunications
Applications

Dual-Tone Multifrequency (DTMF) and
Single Tone Generator

Pulse Density Modulated (PDM) Buzzer
Output

description

The voice-band audio processor (VBAP) is
designed to perform transmit encoding analog/
digital (A/D) conversion, receive decoding
digital/analog (D/A) conversion, and transmit and
receive filtering for voice-band communications
systems. The device operates in either the 15-bit
linear or 8-bit companded

(µ

-law or A-Law) mode,

which is selectable through the I

C interface. The

VBAP generates its own internal clocks from a
2.048-MHz master clock input.

AVAILABLE OPTIONS

TQFP PBS
PACKAGE

PART NO.

TOP-SIDE

MARKING

C to

105

Tube
Tape and Reel

TWL1103TPBSQ1

TWL1103TPBSRQ1

TWL1103T
TWL1103T

2002, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

VBAP is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.

TWL1103T-Q1
VOICE-BAND AUDIO PROCESSOR (VBAP

)

SGLS120A APRIL 2002 REVISED MAY 2002

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

functional block diagram

PCMI (15)

PCMSYN (18)

PCMCLK (17)

MIC1P (2)

MIC1N (3)

MIC2P (4)

MIC2N (5)

MIC

Amplifier

1 g =

23.5 dB

MIC

Amplifier 2

g = 12 dB

or 0 dB

Analog

Modulator

TX Filter

and PGA

g = 10 dB

to 0 dB

PCM

Interface

Sidetone

g = 24 dB

12 dB

Control

g = 18 dB

to 0 dB

RX Filter

and PGA

g = 6 dB

to +6 dB

Digital

Modulator

and Filter

Ear

Amp1

Ear

Amp2

DTMF

Generator

Control Bus

I 2 C

I/F

REF

PLL

Buzzer

Control

Power

SCL

SDA

MBIAS

REXT

MCLK

RESET

EARV

PLLV

PWRUPSEL (20)

PCMO (16)

EAR1OP (29) EAR1ON (27) EAR2O (31)

BUZZCON (19)

Volume

and

RESET

(23)

(32)

(8)

(13)

(14)

(25)

(24)

(28)

(30, 26)

(21)

(22)

(6)

(1)

(11)

(12)

TWL1103T-Q1

VOICE-BAND AUDIO PROCESSOR (VBAP

)

SGLS120A APRIL 2002 REVISED MAY 2002

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

functional description

power on/reset

The power for the various digital and analog circuits is separated to improve the noise performance of the
device. An external reset must be applied to the active low RESET terminal to guarantee reset upon power on.
After the initial power-on sequence the TWL1103 can be functionally powered up and down by writing to the
power control register through the I

C interface. There is a hardwired selectable power-up terminal in default

mode option. The PWRUPSEL function allows the VBAP to power up in the default mode and allows use without
a microcontroller.

reference

A precision band gap reference voltage is generated internally and supplies all required voltage references to
operate the transmit and receive channels. The reference system also supplies bias voltage for use with an
electret microphone at terminal MBIAS. An external precision resistor is required for reference current setting
at terminal REXT.

control interface

The I

C interface is a two-wire bidirectional serial interface that controls the VBAP by writing data to the six

control registers:

Power control

Mode control

Transmit PGA and sidetone control

Receive PGA gain and volume control

DTMF high tone

DTMF low tone

There are two power-up modes which may be selected at the PWRUPSEL terminal:

The PWRUPSEL state (V

at terminal 20) causes the device to power up in the default mode when power

is applied. In the default mode, the I

C interface is not required, and the device may be used without an I

interface. The programmable functions are fixed in the default modes.

The PWRUPSEL state (ground at terminal 20) causes the device to go to a power-down state when power
is applied. In this mode an I

C interface is required to power up the device.

phase-locked loop

The internal digital filters and modulators require a 10.24-MHz clock that is generated by phase locking to the
2.048-MHz master clock input.

PCM interface

The PCM interface transmits and receives data at the PCMO and PCMI terminals respectively. The data is
transmitted or received at the PCMCLK speed once every PCMSYN cycle. The PCMCLK can be tied directly
to the 2.048-MHz master clock (MCLK). The PCMSYN can be driven by an external source or derived from the
master clock and used as an interrupt to the host controller.

microphone amplifiers

The microphone input is a switchable interface for two differential microphone inputs. The first stage is a low-
noise differential amplifier that provides a gain of 23.5 dB. The second stage amplifier has a selectable gain of
0 dB or 12 dB.

TWL1103T-Q1
VOICE-BAND AUDIO PROCESSOR (VBAP

)

SGLS120A APRIL 2002 REVISED MAY 2002

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

functional description (continued)

analog modulator

The transmit channel modulator is a third-order sigma-delta design.

transmit filter and PGA

The transmit filter is a digital filter designed to meet CCITT G.714 requirements. The device operates in either
the 15-bit linear or 8-bit companded

-law or A-law mode that is selectable through the I

C interface. The

transmit PGA defaults to 0 dB.

sidetone

A portion of the transmitted audio is attenuated and fed back to the receive channel through the sidetone path.
The sidetone path defaults to 12 dB. The sidetone path can be enabled by writing to the power control register.

receive volume control

The receive volume control block acts as an attenuator with a range of 18 dB to 0 dB in 2 dB steps for control
of the receive channel volume. The receive volume control gain defaults to 0 dB.

receive filter and PGA

The receive filter is a digital filter that meets CCITT G.714 requirements with a high-pass filter that is selectable
through the I

C interface. The device operates in either the 15-bit linear or 8-bit

-law or A-law companded

mode, which is selectable through the I

C interface. The gain defaults to 1 dB representing a 3-dBm0 level

for a 32-

load impedance and the corresponding digital full scale PCMI code. The gain may be set to 2 dB

for the respective 3-dBm0 level for a 16-

load impedance.

digital modulator and filter

The second-order digital modulator and filter convert the received digital PCM data to the analog output required
by the earphone interface.

earphone amplifiers

The analog signal can be routed to either of two earphone amplifiers, one with differential output (EAR1ON and
EAR1OP) and one with single-ended output (EAR2O). Clicks and pops are suppressed for EAR1 differential
output only.

tone generator

The tone generator provides generation of standard DTMF tones and single tone frequencies which are output
to the following devices: 1) The buzzer driver, as a pulse density modulation (PDM) signal 2) The receive path
digital/analog converter (DAC) for outputting through the earphone. There are 255 possible single tones. The
tone integer value is determined by the following formula:

Round (Tone Freq (Hz)/7.8135 Hz)

The value is loaded into one of two 8-bit registers, the high-tone register (04), or the low-tone register (05). The
tone output is 2 dB higher when applied to the high-tone register (04). When generating DTMF tones, the high
DTMF tone must be applied to the high-tone register and the low frequency tone to the low-tone register.

TWL1103T-Q1

VOICE-BAND AUDIO PROCESSOR (VBAP

)

SGLS120A APRIL 2002 REVISED MAY 2002

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

Terminal Functions

TERMINAL

NAME

NO.

I/O

DESCRIPTION

NAME

BGA

PBS

AVDD

Analog positive power supply

AVSS

Analog negative power supply

BUZZCON

Buzzer output, a pulse-density modulated signal to apply to external buzzer driver

DVDD

Digital positive power supply

DVSS

Digital negative power supply

EAR1ON

Earphone 1 amplifier output ()

EAR1OP

Earphone 1 amplifier output (+)

EAR2O

Earphone 2 amplifier output

EARVDD

Analog positive power supply for the earphone amplifiers

EARVSS

A3, A7

30, 26

Analog negative power supply for the earphone amplifiers

MBIAS

Microphone bias supply output, no decoupling capacitors

MCLK

Master system clock input (2.048 MHz) (digital)

MIC1P

MIC1 input (+)

MIC1N

MIC1 input ()

MIC2P

MIC2 input (+)

MIC2N

MIC2 input ()

PCMI

Receive PCM input

PCMO

Transmit PCM output

PCMSYN

PCM frame synchronization

PCMCLK

PCM data clock

PLLVSS

PLL negative power supply

PLLVDD

PLL digital power supply

PWRUPSEL

Selects the power-up default mode

REXT

I/O

Internal reference current setting terminal--use precision 100

resistor and no filtering capacitors

RESET

Active low reset

SCL

I2C-bus serial clock--this input is used to synchronize the data transfer from and to the VBAP

SDA

I/O

I2C-bus serial address/data input/output--this is a bidirectional terminal used to transfer register
control addresses and data into and out of the CODEC. It is an open

drain terminal and therefore

requires a pullup resistor to VDD (typical 10 k

for 100 kHz)

VSS

Ground return for bandgap internal reference

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