SN74AVCH24T245
24 BIT DUAL SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3 STATE OUTPUTS
SCES588B AUGUST 2004 - REVISED MARCH 2005
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D
Control Inputs V
IH
/V
IL
Levels Are
Referenced to V
CCA
Voltage
D
V
CC
Isolation Feature - If Either V
CC
Input
Is at GND, All Outputs Are in the
High-Impedance State
D
Overvoltage-Tolerant Inputs/Outputs Allow
Mixed-Voltage-Mode Data Communications
D
Fully Configurable Dual-Rail Design Allows
Each Port to Operate Over the Full 1.2-V to
3.6-V Power-Supply Range
D
I
off
Supports Partial-Power-Down Mode
Operation
D
I/Os Are 4.6-V Tolerant
D
Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors
D
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
D
ESD Protection Exceeds JESD 22
- 8000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
description/ordering information
This 24-bit noninverting bus transceiver uses two separate configurable power-supply rails. The
SN74AVCH24T245 is optimized to operate with V
CCA
/V
CCB
set at 1.4 V to 3.6 V. It is operational with V
CCA
/V
CCB
as low as 1.2 V. The A port is designed to track V
CCA
. V
CCA
accepts any supply voltage from 1.2 V to 3.6 V. The
B port is designed to track V
CCB
. V
CCB
accepts any supply voltage from 1.2 V to 3.6 V. This allows for universal
low-voltage bidirectional translation between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.
The SN74AVCH24T245 is designed for asynchronous communication between data buses. The device
transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the
direction-control (DIR) input. The output-enable (OE) input can be used to disable the outputs so the buses are
effectively isolated.
The SN74AVCH24T245 is designed so that the control pins (1DIR, 2DIR, 3DIR, 4DIR, 5DIR, 6DIR, 1OE, 2OE,
3OE, 4OE, 5OE, and 6OE) are supplied by V
CCA
.
This device is fully specified for partial-power-down applications using I
off
. The I
off
circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
The V
CC
isolation feature ensures that if either V
CC
input is at GND, then both ports are in the high-impedance
state.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors
with the bus-hold circuitry is not recommended.
To ensure the high-impedance state during power up or power down, OE should be tied to V
CCA
through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION
TA
PACKAGE
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
-40
C to 85
C
LFBGA - GRG
Tape and reel
74AVCH24T245GRGR
WL245
-40
C to 85
C
LFBGA - ZRG (Pb-free)
Tape and reel
74AVCH24T245ZRGR
WL245
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Copyright
2005, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
SN74AVCH24T245
24 BIT DUAL SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3 STATE OUTPUTS
SCES588B AUGUST 2004 - REVISED MARCH 2005
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
terminal assignments
1
2
3
4
5
6
A
6OE
5OE
4OE
3OE
2OE
1OE
B
1B1
1B2
VCCB
VCCA
1A2
1A1
C
1B3
1B4
GND
GND
1A4
1A3
D
2B1
2B2
VCCB
VCCA
2A2
2A1
E
2B3
2B4
GND
GND
2A4
2A3
F
3B1
3B2
GND
GND
3A2
3A1
G
3B3
3B4
GND
3A4
3A3
H
4B1
4B2
VCCB
VCCA
4A2
4A1
J
4B3
4B4
GND
GND
4A4
4A3
K
5B1
5B2
GND
GND
5A2
5A1
L
5B3
5B4
VCCB
VCCA
5A4
5A3
M
6B1
6B2
GND
GND
6A2
6A1
N
6B3
6B4
VCCB
VCCA
6A4
6A3
P
6DIR
5DIR
4DIR
3DIR
2DIR
1DIR
FUNCTION TABLE
(each 4-bit section)
INPUTS
OPERATION
OE
DIR
OPERATION
L
L
B data to A bus
L
H
A data to B bus
H
X
Isolation
GRG OR ZRG PACKAGE
(TOP VIEW)
J
H
G
F
E
D
C
B
A
2
1
3
4
6
5
P
N
M
L
K
SN74AVCH24T245
24 BIT DUAL SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3 STATE OUTPUTS
SCES588B AUGUST 2004 - REVISED MARCH 2005
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
logic diagram (positive logic)
To Three Other Channels
1DIR
1A1
1B1
1OE
To Three Other Channels
2DIR
2A1
2B1
2OE
P6
B6
P5
D6
A6
B1
A5
D1
To Three Other Channels
3DIR
3A1
3B1
3OE
To Three Other Channels
4DIR
4A1
4B1
4OE
P4
F6
P3
H6
A4
F1
A3
H1
To Three Other Channels
5DIR
5A1
5B1
5OE
To Three Other Channels
6DIR
6A1
6B1
6OE
P2
K6
P1
M6
A2
K1
A1
M1
SN74AVCH24T245
24 BIT DUAL SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3 STATE OUTPUTS
SCES588B AUGUST 2004 - REVISED MARCH 2005
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
CCA
and V
CCB
-0.5 V to 4.6 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, V
I
(see Note 1): I/O ports (A port)
-0.5 V to 4.6 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I/O ports (B port)
-0.5 V to 4.6 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Control inputs
-0.5 V to 4.6 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range applied to any output in the high-impedance or power-off state, V
O
(see Note 1): A port
-0.5 V to 4.6 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
B port
-0.5 V to 4.6 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range applied to any output in the high or low state, V
O
(see Notes 1 and 2): A port
-0.5 V to V
CCA
+ 0.5 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
B port
-0.5 V to V
CCB
+ 0.5 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, I
IK
(V
I
< 0)
-50 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, I
OK
(V
O
< 0)
-50 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, I
O
50 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through each V
CCA
, V
CCB
, and GND
100 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance,
JA
(see Note 3): GRG/ZRG package
50
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
-65
C to 150
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES:
1. The input voltage and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
2. The output positive-voltage rating may be exceeded up to 4.6 V maximum if the output current rating is observed.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
SN74AVCH24T245
24 BIT DUAL SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3 STATE OUTPUTS
SCES588B AUGUST 2004 - REVISED MARCH 2005
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
recommended operating conditions (see Notes 4 through 6)
VCCI
VCCO
MIN
MAX
UNIT
VCCA
Supply voltage
1.2
3.6
V
VCCB
Supply voltage
1.2
3.6
V
High-level input
Data inputs
1.2 V to 1.95 V
VCCI
0.65
VIH
High-level input
voltage
Data inputs
(see Note 7)
1.95 V to 2.7 V
1.6
V
VIH
voltage
(see Note 7)
2.7 V to 3.6 V
2
V
Low-level input
Data inputs
1.2 V to 1.95 V
VCCI
0.35
VIL
Low-level input
voltage
Data inputs
(see Note 7)
1.95 V to 2.7 V
0.7
V
VIL
voltage
(see Note 7)
2.7 V to 3.6 V
0.8
V
High-level input
DIR
1.2 V to 1.95 V
VCCA
0.65
VIH
High-level input
voltage
DIR
(referenced to VCCA)
1.95 V to 2.7 V
1.6
V
VIH
voltage
(referenced to VCCA)
(see Note 8)
2.7 V to 3.6 V
2
V
Low-level input
DIR
1.2 V to 1.95 V
VCCA
0.35
VIL
Low-level input
voltage
DIR
(referenced to VCCA)
1.95 V to 2.7 V
0.7
V
VIL
voltage
(referenced to VCCA)
(see Note 8)
2.7 V to 3.6 V
0.8
V
VI
Input voltage
0
3.6
V
VO
Output voltage
Active state
0
VCCO
V
VO
Output voltage
3-state
0
3.6
V
1.2 V
-3
1.4 V to 1.6 V
-6
IOH
High-level output current
1.65 V to 1.95 V
-8
mA
IOH
High-level output current
2.3 V to 2.7 V
-9
mA
3 V to 3.6 V
-12
1.2 V
3
1.4 V to 1.6 V
6
IOL
Low-level output current
1.65 V to 1.95 V
8
mA
IOL
Low-level output current
2.3 V to 2.7 V
9
mA
3 V to 3.6 V
12
t/
v
Input transition rise or fall rate
5
ns/V
TA
Operating free-air temperature
-40
85
C
NOTES:
4. VCCI is the VCC associated with the data input port.
5. VCCO is the VCC associated with the output port.
6. All unused data inputs of the device must be held at VCCI or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
7. For VCCI values not specified in the data sheet, VIH min = VCCI
0.7 V, VIL max = VCCI
0.3 V.
8. For VCCI values not specified in the data sheet, VIH min = VCCA
0.7 V, VIL max = VCCA
0.3 V.
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