SN74AVCAH164245
16-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
SCES396 JULY 2002
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D
Member of the Texas Instruments
Widebus
Family
D
DOC
Circuitry Dynamically Changes
Output Impedance, Resulting in Noise
Reduction Without Speed Degradation
D
Dynamic Drive Capability Is Equivalent to
Standard Outputs With I
OH
and I
OL
of
24 mA at 2.5-V V
CC
D
Control Inputs V
IH
/V
IL
Levels are
Referenced to V
CCA
Voltage
D
If Either V
CC
Input Is at GND, Both Ports
Are in the High-Impedance State
D
Overvoltage-Tolerant Inputs/Outputs Allow
Mixed-Voltage-Mode Data Communications
D
I
off
Supports Partial-Power-Down Mode
Operation
D
Fully Configurable Dual-Rail Design Allows
Each Port to Operate Over the Full 1.4-V to
3.6-V Power-Supply Range
D
Bus Hold on Data Inputs Eliminates the
Need for External Pullup / Pulldown
Resistors
D
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
D
ESD Protection Exceeds JESD 22
2000-V Human-Body Model (A114-A)
200-V Machine Model (A115-A)
1000-V Charged-Device Model (C101)
description/ordering information
This 16-bit (dual-octal) noninverting bus transceiver uses two separate configurable power-supply rails. The
A-port is designed to track V
CCA
. V
CCA
accepts any supply voltage from 1.4 V to 3.6 V. The B-port is designed
to track V
CCB
. V
CCB
accepts any supply voltage from 1.4 V to 3.6 V. This allows for universal low-voltage
bidirectional translation between any of the 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.
The SN74AVCAH164245 is designed for asynchronous communication between data buses. The device
transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the
direction-control (DIR) input. The output-enable (OE) input can be used to disable the outputs so the buses are
effectively isolated.
The SN74AVCAH164245 is designed so that the control pins (1DIR, 2DIR, 1OE, and 2OE) are supplied by
V
CCA
.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. Use of pullup
or pulldown resistors with the bus-hold circuitry is not recommended.
To ensure the high-impedance state during power up or power down, OE should be tied to V
CCA
through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
This device is fully specified for partial-power-down applications using I
off
. The I
off
circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down. If either V
CC
input is at GND,
then both ports are in the high-impedance state.
ORDERING INFORMATION
TA
PACKAGE
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
TSSOP DGG
Tape and reel
SN74AVCAH164245GR
AVCAH164245
40
C to 85
C
TVSOP DGV
Tape and reel
SN74AVCAH164245VR
WAH4245
VFBGA GQL
Tape and reel
SN74AVCAH164245KR
WAH4245
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
Copyright
2002, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
DOC and Widebus are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
SN74AVCAH164245
16-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
SCES396 JULY 2002
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
terminal assignments
DGG OR DGV PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1DIR
1B1
1B2
GND
1B3
1B4
V
CCB
1B5
1B6
GND
1B7
1B8
2B1
2B2
GND
2B3
2B4
V
CCB
2B5
2B6
GND
2B7
2B8
2DIR
1OE
1A1
1A2
GND
1A3
1A4
V
CCA
1A5
1A6
GND
1A7
1A8
2A1
2A2
GND
2A3
2A4
V
CCA
2A5
2A6
GND
2A7
2A8
2OE
terminal assignments
1
2
3
4
5
6
A
1DIR
NC
NC
NC
NC
1OE
B
1B2
1B1
GND
GND
1A1
1A2
C
1B4
1B3
VCCB
VCCA
1A3
1A4
D
1B6
1B5
GND
GND
1A5
1A6
E
1B8
1B7
1A7
1A8
F
2B1
2B2
2A2
2A1
G
2B3
2B4
GND
GND
2A4
2A3
H
2B5
2B6
VCCB
VCCA
2A6
2A5
J
2B7
2B8
GND
GND
2A8
2A7
K
2DIR
NC
NC
NC
NC
2OE
NC No internal connection
GQL PACKAGE
(TOP VIEW)
J
H
G
F
E
D
C
B
A
2
1
3
4
6
5
K
SN74AVCAH164245
16-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
SCES396 JULY 2002
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
FUNCTION TABLE
(each 8-bit section)
INPUTS
OPERATION
OE
DIR
OPERATION
L
L
B data to A bus
L
H
A data to B bus
H
X
Isolation
logic diagram (positive logic)
To Seven Other Channels
1DIR
1A1
1B1
1OE
To Seven Other Channels
2DIR
2A1
2B1
2OE
1
47
24
36
48
2
25
13
Pin numbers shown are for the DGG and DGV packages.
SN74AVCAH164245
16-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
SCES396 JULY 2002
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
CCA
and V
CCB
0.5 V to 4.6 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, V
I
(see Note 1): I/O ports (A port)
0.5 V to 4.6 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I/O ports (B port)
0.5 V to 4.6 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Control inputs
0.5 V to 4.6 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range applied to any output in the high-impedance or power-off state, V
O
(see Note 1): (A port)
0.5 V to 4.6 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(B port)
0.5 V to 4.6 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range applied to any output in the high or low state, V
O
(see Notes 1 and 2): (A port)
0.5 V to V
CCA
+ 0.5 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(B port)
0.5 V to V
CCB
+ 0.5 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, I
IK
(V
I
< 0)
50 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, I
OK
(V
O
< 0)
50 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, I
O
50 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through V
CCA
, V
CCB
, or GND
100 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance,
JA
(see Note 3): DGG package
70
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DGV package
58
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
GQL package
28
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
65
C to 150
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES:
1. The input voltage and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
2. The output positive-voltage rating may be exceeded up to 4.6 V maximum if the output current rating is observed.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
SN74AVCAH164245
16-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
SCES396 JULY 2002
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
recommended operating conditions (see Notes 4 through 6)
VCCI
VCCO
MIN
MAX
UNIT
VCCA
Supply voltage
1.4
3.6
V
VCCB
Supply voltage
1.4
3.6
V
Hi h l
l i
t
1.4 V to 1.95 V
VCCI
0.65
VCCI
VIH
High-level input
voltage
Data inputs
1.95 V to 2.7 V
1.7
VCCI
V
voltage
2.7 V to 3.6 V
2
VCCI
L
l
l i
t
1.4 V to 1.95 V
0
VCCI
0.35
VIL
Low-level input
voltage
Data inputs
1.95 V to 2.7 V
0
0.7
V
voltage
2.7 V to 3.6 V
0
0.8
Hi h l
l i
t
C
t l i
t
1.4 V to 1.95 V
VCCA
0.65
VCCA
VIH
High-level input
voltage
Control inputs
(Referenced to VCCA)
1.95 V to 2.7 V
1.7
VCCA
V
voltage
(Referenced to VCCA)
2.7 V to 3.6 V
2
VCCA
L
l
l i
t
C
t l i
t
1.4 V to 1.95 V
0
VCCA
0.35
VIL
Low-level input
voltage
Control inputs
(Referenced to VCCA)
1.95 V to 2.7 V
0
0.7
V
voltage
(Referenced to VCCA)
2.7 V to 3.6 V
0
0.8
VO
Output voltage
0
VCCO
V
1.4 V to 1.6 V
2
IOH
High level output current
1.65 V to 1.95 V
4
mA
IOH
High-level output current
2.3 V to 2.7 V
8
mA
3 V to 3.6 V
12
1.4 V to 1.6 V
2
IOL
Low level output current
1.65 V to 1.95 V
4
mA
IOL
Low-level output current
2.3 V to 2.7 V
8
mA
3 V to 3.6 V
12
t/
v
Input transition rise or fall rate
5
ns/V
TA
Operating free-air temperature
40
85
C
NOTES:
4. VCCI is the VCC associated with the data input port.
5. VCCO is the VCC associated with the output port.
6. All unused data inputs of the device must be held at VCCI or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
SN74AVCAH164245
16-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
SCES396 JULY 2002
6
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted) (see Notes 7 and 8)
PARAMETER
TEST CONDITIONS
VCCA
VCCB
MIN
TYP
MAX
UNIT
IOH = 100
A
VI = VIH
1.4 V to 3.6 V
1.4 V to 3.6 V
VCCO0.2 V
IOH = 2 mA
VI = VIH
1.4 V
1.4 V
1.05
VOH
IOH = 4 mA
VI = VIH
1.65 V
1.65 V
1.2
V
IOH = 8 mA
VI = VIH
2.3 V
2.3 V
1.75
IOH = 12 mA
VI = VIH
3 V
3 V
2.3
IOH = 100
A
VI = VIL
1.4 V to 3.6 V
1.4 V to 3.6 V
0.2
IOH = 2 mA
VI = VIL
1.4 V
1.4 V
0.35
VOL
IOH = 4 mA
VI = VIL
1.65 V
1.65 V
0.45
V
IOH = 8 mA
VI = VIL
2.3 V
2.3 V
0.55
IOH = 12 mA
VI = VIL
3 V
3 V
0.7
II
Control inputs
VI = VCCA or GND
1.4 V to 3.6 V
3.6 V
2.5
A
VI = 0.49 V
1.4 V
1.4 V
11
IBHL
VI = 0.57 V
1.65 V
1.65 V
30
A
IBHL
VI = 0.7 V
2.3 V
2.3 V
45
A
VI = 0.8 V
3 V
3 V
75
VI = 0.49 V
1.4 V
1.4 V
11
IBHH
VI = 1.07 V
1.65 V
1.65 V
30
A
IBHH
VI = 1.7 V
2.3 V
2.3 V
45
A
VI = 2 V
3 V
3 V
75
1.6 V
1.6 V
100
IBHLO
VI = 0 to VCC
1.95 V
1.95 V
200
A
IBHLO
VI = 0 to VCC
2.7 V
2.7 V
300
A
3.6 V
3.6 V
525
#
1.6 V
1.6 V
100
IBHHO#
VI = 0 to VCC
1.95 V
1.95 V
200
A
IBHHO#
VI = 0 to VCC
2.7 V
2.7 V
300
A
3.6 V
3.6 V
525
I ff
A port
VI or VO = 0 to 3 6 V
0 V
0 to 3.6 V
10
A
Ioff
B port
VI or VO = 0 to 3.6 V
0 to 3.6 V
0 V
10
A
||
A or B ports
V
V
GND
OE = VIH
3.6 V
3.6 V
12.5
IOZ||
B port
VO = VCCO or GND,
VI = VCCI or GND
OE
d
't
0 V
3.6 V
12.5
A
A port
VI = VCCI or GND
OE = don't care
3.6 V
0 V
12.5
All typical values are at TA = 25
C.
The bus-hold circuit can sink at least the minimum low sustaining current at VIL max. IBHL should be measured after lowering VIN to GND and
then raising it to VIL max.
The bus-hold circuit can source at least the minimum high sustaining current at VIH min. IBHH should be measured after raising VIN to VCC and
then lowering it to VIH min.
An external driver must source at least IBHLO to switch this node from low to high.
# An external driver must sink at least IBHHO to switch this node from high to low.
|| For I/O ports, the parameter IOZ includes the input leakage current.
NOTES:
7. VCCO is the VCC associated with the output port.
8. VCCI is the VCC associated with the input port.
SN74AVCAH164245
16-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
SCES396 JULY 2002
7
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (continued)
(unless otherwise noted) (see Note 9)
PARAMETER
TEST CONDITIONS
VCCA
VCCB
MIN
TYP
MAX
UNIT
1.6 V
1.6 V
20
1.95 V
1.95 V
20
ICCA
VI = VCCI or GND
IO = 0
2.7 V
2.7 V
30
A
ICCA
VI = VCCI or GND,
IO = 0
0 V
3.6 V
40
A
3.6 V
0 V
40
3.6 V
3.6 V
40
1.6 V
1.6 V
20
1.95 V
1.95 V
20
ICCB
VI = VCCI or GND
IO = 0
2.7 V
2.7 V
30
A
ICCB
VI = VCCI or GND,
IO = 0
0 V
3.6 V
40
A
3.6 V
0 V
40
3.6 V
3.6 V
40
Ci
Control inputs
VI = 3.3 V or GND
3.3 V
3.3 V
4
pF
Cio
A or B ports
VO = 3.3 V or GND
3.3 V
3.3 V
5
pF
All typical values are at TA = 25
C.
NOTE 9: VCCI is the VCC associated with the input port.
switching characteristics over recommended operating free-air temperature range,
V
CCA
= 1.5 V
0.1 V (see Figure 2)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCCB = 1.5 V
0.1 V
VCCB = 1.8 V
0.15 V
VCCB = 2.5 V
0.2 V
VCCB = 3.3 V
0.3 V
UNIT
(INPUT)
(OUTPUT)
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
t d
A
B
1.7
6.7
1.9
6.3
1.8
5.5
1.7
5.8
ns
tpd
B
A
1.8
6.8
2.2
7.4
2.1
7.6
2.1
7.3
ns
t
OE
A
2.6
8.4
2.7
8.2
2.3
6.3
2.1
5.6
ns
ten
OE
B
2.7
8.6
3.2
10.2
3.2
10.8
3.2
10.7
ns
tdi
OE
A
2.1
7
2.5
7
1.7
5.3
2
6.1
ns
tdis
OE
B
2.1
7.1
2.5
7.1
2.1
6.5
2.1
6.4
ns
switching characteristics over recommended operating free-air temperature range,
V
CCA
= 1.8 V
0.15 V (see Figure 2)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCCB = 1.5 V
0.1 V
VCCB = 1.8 V
0.15 V
VCCB = 2.5 V
0.2 V
VCCB = 3.3 V
0.3 V
UNIT
(INPUT)
(OUTPUT)
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
t d
A
B
1.7
6.4
1.8
6
1.7
4.7
1.6
4.3
ns
tpd
B
A
1.4
5.5
1.8
6
1.8
5.8
1.8
5.5
ns
t
OE
A
2.5
8
2.7
7.8
2.2
5.8
2
5.1
ns
ten
OE
B
1.8
6.7
2.7
7.8
2.7
8.1
2.7
8.1
ns
tdi
OE
A
2.1
6.4
2.5
6.4
1.5
4.5
1.8
5
ns
tdis
OE
B
2.1
6.6
2.5
6.4
2
5.5
2
5.5
ns
SN74AVCAH164245
16-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
SCES396 JULY 2002
8
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
switching characteristics over recommended operating free-air temperature range,
V
CCA
= 2.5 V
0.2 V (see Figure 2)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCCB = 1.5 V
0.1 V
VCCB = 1.8 V
0.15 V
VCCB = 2.5 V
0.2 V
VCCB = 3.3 V
0.3 V
UNIT
(INPUT)
(OUTPUT)
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
t d
A
B
1.6
6
1.8
5.6
1.5
4
1.4
3.4
ns
tpd
B
A
1.3
4.6
1.7
4.4
1.5
4
1.4
3.7
ns
t
OE
A
2.6
7.4
2.7
7.2
2.2
5.3
2
4.5
ns
ten
OE
B
1.2
4.1
2.2
5.1
2.2
5.3
2.2
5.3
ns
tdi
OE
A
2
5.7
2.3
5.7
1.4
3.7
1.6
4
ns
tdis
OE
B
0.9
4.5
1.7
4.5
1.4
3.7
1.4
3.7
ns
switching characteristics over recommended operating free-air temperature range,
V
CCA
= 3.3 V
0.3 V (see Figure 2)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCCB = 1.5 V
0.1 V
VCCB = 1.8 V
0.15 V
VCCB = 2.5 V
0.2 V
VCCB = 3.3 V
0.3 V
UNIT
(INPUT)
(OUTPUT)
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
t d
A
B
1.5
5.9
1.7
5.4
1.5
3.7
1.4
3.1
ns
tpd
B
A
1.3
4.5
1.6
3.8
1.5
3.3
1.4
3.1
ns
t
OE
A
2.5
7
2.6
6.9
2.1
5
1.9
4.1
ns
ten
OE
B
0.8
2.6
1.9
4
2
4.1
1.9
4.1
ns
tdi
OE
A
1.2
5.4
2.2
5.2
1.2
3.3
1.5
3.6
ns
tdis
OE
B
1.2
5.4
1.7
4.4
1.5
3.6
1.5
3.6
ns
operating characteristics, V
CCA
and V
CCB
= 3.3 V, T
A
= 25
C
PARAMETER
TEST CONDITIONS
TYP
UNIT
Power dissipation capacitance per transceiver,
Outputs enabled
14
CpdA
A port input, B port output
Outputs disabled
CL = 0
f = 10 MHz
7
pF
CpdA
Power dissipation capacitance per transceiver,
Outputs enabled
CL = 0,
f = 10 MHz
20
F
B port input, A port output
Outputs disabled
7
Power dissipation capacitance per transceiver,
Outputs enabled
14
C dB
A port input, B port output
Outputs disabled
CL = 0
f = 10 MHz
7
pF
CpdB
Power dissipation capacitance per transceiver,
Outputs enabled
CL = 0,
f = 10 MHz
20
pF
,
B port input, A port output
Outputs disabled
7
SN74AVCAH164245
16-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
SCES396 JULY 2002
9
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
output description
The DOC
circuitry is implemented, which, during the transition, initially lowers the output impedance to
effectively drive the load and, subsequently, raises the impedance to reduce noise. Figure 1 shows typical V
OL
vs I
OL
and V
OH
vs I
OH
curves to illustrate the output impedance and drive capability of the circuit. At the
beginning of the signal transition, the DOC circuit provides a maximum dynamic drive that is equivalent to a
high-drive standard-output device. For more information, refer to the TI application reports, AVC Logic Family
Technology and Applications, literature number SCEA006, and Dynamic Output Control (DOC
) Circuitry
Technology and Applications, literature number SCEA009.
136
128
144
160
0.4
0.8
1.2
1.6
2.0
2.4
2.8
170
153
119
102
85
68
51
34
17
0
0.4
0.8
1.2
1.6
2.0
2.4
2.8
3.2
TA = 25
C
Process = Nominal
IOL Output Current mA
VCC = 3.3 V
VCC = 2.5 V
VCC = 1.8 V
Output V
oltage
V
OL
V
TA = 25
C
Process = Nominal
IOH Output Current mA
VCC = 3.3 V
VCC = 2.5 V
VCC = 1.8 V
Output V
oltage
V
OH
V
80
96
112
32
48
64
0
16
Figure 1. Output Voltage vs Output Current
SN74AVCAH164245
16-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
SCES396 JULY 2002
10
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
VOH
VOL
From Output
Under Test
CL
(see Note A)
LOAD CIRCUIT
S1
2
VCCO
Open
GND
RL
RL
tPLH
tPHL
Output
Control
(low-level
enabling)
Output
Waveform 1
S1 at 2
VCCO
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
tPZL
tPZH
tPLZ
tPHZ
VCCB/2
VCCB/2
VCCI/2
VCCI/2
VCCI
0 V
VCCO/2
VCCO/2
VOH
VOL
0 V
VCCO/2
VOL + VTP
VCCO/2
VOH VTP
0 V
VCCI
0 V
VCCI/2
VCCI/2
tw
Input
VCCB
VCCO
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
Output
Input
tpd
tPLZ/tPZL
tPHZ/tPZH
Open
2
VCCO
GND
TEST
S1
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR
v
10 MHz, ZO = 50
, dv/dt
1 V/ns,
dv/dt
1 V/ns.
D. The outputs are measured one at a time with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
H. VCCI is the VCC associated with the input port.
I. VCCO is the VCC associated with the output port.
1.5 V
0.1 V
1.8 V
0.15 V
2.5 V
0.2 V
3.3 V
0.3 V
2 k
1 k
500
500
VCCO
RL
0.1 V
0.15 V
0.15 V
0.3 V
VTP
CL
15 pF
30 pF
30 pF
30 pF
Figure 2. Load Circuit and Voltage Waveforms
MECHANICAL DATA
MPDS006C FEBRUARY 1996 REVISED AUGUST 2000
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
DGV (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
24 PINS SHOWN
14
3,70
3,50
4,90
5,10
20
DIM
PINS **
4073251/E 08/00
1,20 MAX
Seating Plane
0,05
0,15
0,25
0,50
0,75
0,23
0,13
1
12
24
13
4,30
4,50
0,16 NOM
Gage Plane
A
7,90
7,70
38
24
16
4,90
5,10
3,70
3,50
A MAX
A MIN
6,60
6,20
11,20
11,40
56
9,60
9,80
48
0,08
M
0,07
0,40
0
8
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.
D. Falls within JEDEC: 24/48 Pins MO-153
14/16/20/56 Pins MO-194
MECHANICAL DATA
MTSS003D JANUARY 1995 REVISED JANUARY 1998
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
DGG (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
4040078 / F 12/97
48 PINS SHOWN
0,25
0,15 NOM
Gage Plane
6,00
6,20
8,30
7,90
0,75
0,50
Seating Plane
25
0,27
0,17
24
A
48
1
1,20 MAX
M
0,08
0,10
0,50
0
8
56
14,10
13,90
48
DIM
A MAX
A MIN
PINS **
12,40
12,60
64
17,10
16,90
0,15
0,05
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
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