HV110
Initial Release
Power-over-Ethernet Interface PD Controller
meets IEEE802.3af
TM
Standard
Features
Implements IEEE802.3af Standard for PD
400mA Inrush Current Limit
350mA Operating Current
400mA Fault Current Limit
Fast Response Current Limit when Over Current
or Step Voltage at Input Supply
Programmable UVLO/ENABLE pin
9 seconds Auto Restart
Built in Thermal Shutdown with Hysteresis
90V Open Drain PWRGD (active low) output.
Optional Turn on Timeout Disable
On Board 90V, 1
MOSFET
Input Voltage Surge ratings up to 90V
IOL Tested
Applications
IP Phones
Wireless Access Points
End-Spans and Mid-Spans
PoE Routers, Switches
Chargers
Security Peripherals & Cameras
Description
HV110 provides complete power management and
protection for Powered Devices (PDs) utilizing the
IEEE802.3af protocol. As the most complete PD
Power Manager available, HV110 features a 400mA
inrush limit and fault current limit, as well as
minimum current shutdown to ensure additional
protection and reliability to expensive equipments
connected to the PD switch. The internal power
switch uses scaled current-mirror technology which
eliminates the need for an external sense resistor
and provides highly accurate current sensing at the
high and low end operating conditions.
HV110 uses rugged high voltage junction isolated
process, which eliminates the need for any external
high voltage protection devices at the input of these
controllers. Circuit isolation also reduces the chance
of tripping on system noise. A 90V open drain
PWRGD pin provides status information and can be
used to enable the DC/DC power supplies.
HV110 is available in a thermally rugged DPAK-5
package that provides improved thermal resistance
when compared to SO-8 based solutions
.
Typical Application
Figure 1. Typical Application Circuit
Supertex, Inc.
1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: (408) 222-8888 FAX: (408) 222-4895 www.supertex.com
A061104
HV110
Electrical Characteristics
(at 0
C < T
A
<
+75
C, unless otherwise specified)
Symbol Parameter Min
Typ
Max
Units
Conditions
V
PP
Supply Voltage (1)
36
57
V
V
PP
referenced to V
NN
I
PP
Supply Current
1
mA
V
PP
= -48V, Standby Mode.
MOSFET off.
V
UVLO
Internal UVLO Threshold (Turn OFF) (2)
30
32
34
V
V
PP
referenced to V
NN
V
UVHO
Internal UVLO Threshold (Turn ON) (2)
38
40
42
V
V
PP
referenced to V
NN
V
HYS
UVLO Comparator Hysteresis
8
V
V
UVTH
UVLO Comparator Threshold
1.1
1.2
1.3
V
Referenced to V
NN
R
UVLO
UVLO Input Resistance
100
k
R
DS
MOSFET On Resistance
1
1.6
Measured at 25
o
C and Ids =
200mA
I
LEAK
Output
Leakage
Current
10
A
Internal MOSFET off
I
OUT
Operating Output Current
350
mA
I
INRUSH
Inrush Current Limit
300
350
400
mA
I
OC
Over Load Current Limiting
300
350
400
mA
I
MIN
Minimum Current Threshold
1
10
20
mA
V
SLEW
Slew Rate to Enable Turn on Timers
4.25
V/ms
Enables Timers
VOL
PWRGD
PWRGD Output Low Voltage
0.4
V
I=3mA; Referenced to V
NN
IOH
PWRGD
PWRGD Output Leakage Current
10
A
V=5V; Referenced to V
NN
t
SC
Shorted-Circuit Timer (3)
60
ms
Measured at T
A
= 25
C
t
UC
Under-Current Timer (4)
350
ms
Measured at T
A
= 25
C
t
OC
Over-Current Timer (5)
60
ms
Measured at T
A
= 25
C
t
LIMIT
Current Limit Delay Time (6)
10
s
Measured at T
A
= 25
C
t
POR
POR Timer
3.5
ms
Measured at T
A
= 25
C
t
RESTART
Restart
Timer
9
sec
Measured at T
A
= 25
C
T
OT
Over Temperature Trip Limit
140
o
C
T
HYS
Temperature
Hysteresis
20
o
C
Absolute Maximum Ratings*
Supply Voltage, V
pp
(1)
-0.5V to 90V
Operating Temperature Range
-40C to +85C
Storage Temperature Range
-65 to +150C
5-Pin DPAK Thermal Resistance R
JA
(minimum footprint)
110C/W
UVLO/Enable Input
(1)
6V
PWRGD Open Collector Input
(1)
90V
Ordering Information
Package Options
DEVICE
DPAK-5
HV110
HV110K4
* Absolute Maximum Ratings are those values beyond which damage to device
may occur. Functional operation under these conditions is not implied.
Continuous operation of the device at the absolute rating level my affect
reliability. All voltages are references to V
NN
pin.
( 1 ): HV110 will work in both Positive and Negative voltage applications, the maximum differential voltage between the V
PP
and V
NN
pins must not be exceeded.
( 2 ): UVLO Threshold to be modified using external resistors, when a zener diode is connected to V
PP
pin. (See Signature Detection)
( 3 ): Shorted-circuit timer starts after POR timer. If V
OUT
does not charge at least 90% V
in
before t
SC
then a shorted-circuit condition exists.
( 4 ): Under-current timer starts when I
OUT
goes below I
MIN
. If I
OUT
stays below I
MIN
longer than t
UC
then MOSFET is turned off due to under current condition.
( 5 ): If the output current is in an overload or shorted load condition then the output immediately goes to current limit and starts the over-current timer. If I
OUT
does
not drop back below I
LIMIT
before the timer expires then an over current condition exists. The timer is immediately reset when a fault is cleared.
( 6 ): Time for fast return to limit circuit to react.
2
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HV110
3
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Pin Description
V
PP
Positive voltage supply input
V
NN
Negative voltage power supply input
DRAIN Internal N-channel MOSFET drain output
UV/ENABLE Under Voltage Lockout Input
PWRGD Active-Low Power Good Output
POR
Timer
UVLO
Regulator
Restart
Timer
Temperature
Sensor
Control
Logic
2
.
4
M
1
1
6
k
Vnn
Vpp
UVLO
PWRGD
DRAIN
HV110
Figure 3. Package Drawing: DPAK-5
Figure 2. HV110 Functional Block Diagram
Powered Ethernet Requirements
Power-over-LAN (sometimes called Powered
Ethernet or Powered VoIP) is the general concept of
providing high voltage (48VDC) power over existing
networking cables, such as Ethernet cables. This is
accomplished either by using the CAT5 Ethernet
Cable's unused spare pairs or the signal pairs (ENV
B vs. ENV A).
In Power-over-LAN applications there are two main
types of equipment: the Power Sourcing Equipment
(PSE) and the Powered Device (PD). There is a third
type called Midspan equipment that plugs inline and
converts a conventional router into a PSE.
The IEEE802.3af standard specifies the
requirements, features and characteristics of the
PSE and PD devices for use in PoE applications.
HV110 is a PD controller IC, capable of handling all
the current and timing requirements of the
IEEE802.3af standard.
A PD designed to this standard and within its range
of available power, can obtain both power and data
for operation via the standard LAN cables and there-
fore will not require any additional power sources or
connections.
Power-over-Ethernet (PoE)
Standards
IEEE802.3af standard, DTE Power via MDI, deals
with the specification of the interface that can
supply/draw power using the same generic cabling
as that used for data transmission. It allows both
power and data to flow through the Media
Dependent Interface (MDI) (like 10Base-T, 100Base
TX or 1000BaseT) to the Data Terminal Equipment
(DTE
1
) safely and effectively. It defines the functional
and electrical characteristics of two optional power
(non-data) entities the Powered Device (PD) and
the Power Sourcing Equipment (PSE) that makes
this single interface possible. The mechanical and
electrical interface between PSE and PD and the
transmission line is achieved through the Power
Interface (PI) Devices (usually the LAN cables).
1
(DTE) A device which acts as the source and/or destination of
data and which controls the communication channel
PSE is defined as a device that provides a single
portion of the link (10BASE-T, 100BASE_TX or
1000BASE_T) with both the data it requires and the
power to process this data. PSEs may be placed
with the DTE/Repeater/Midspan. A PSE that is
located along with the DTE/Repeater is called
Endpoint PSE, while a PSE that is located within the
link, between the MDIs is called a Midspan PSE. All
the specifications for the PSE sitting in the End Point
(e.g. the router) may not apply for the Midspan PSE.
Even though HV110 is a PD device, it is closely
associated with the operation of PSE, in fact it is
dependent on the PSE for its normal operation.
HV110, however, unlike many other PD controllers,
provides redundant PSE protections and timings for
maximum protection while ensuring compliance.
Hence certain basic functionalities of the PSE are
included in this data sheet for better understanding
some of the features and operation of PDs.
HV110
PSE Power Standards
PSE powers a single link. It searches the link for a
PD and supplies power to the link only after a PD
Signature is detected. The PSE will reject any links
with an invalid PD Signature. When the PD is
removed, the PSE will also remove the power from
the link.
PSE may be able to do an optional Classification of
the PD, to detect the maximum power drawn by the
PD, to do some high level Power Management. PSE
is limited to a continuous maximum output of 15.4W.
Discovery
Key to all Power-over-Ethernet methods is
Discovery. Discovery is the method used to
determine if a device at the end of the cable is
capable of receiving high voltage DC, before
applying high voltage. Discovery also is used for
determining when a PD device is disconnected or
removed subsequently. The reason for all of this is
that high voltages (-48V) connected to many legacy
devices can cause equipment damage. For this
reason Discovery takes place at voltages compatible
with existing legacy equipment and high voltage DC
is only applied once discovery is satisfied. The
IEEE802.3af Discovery is based upon the sensing of
a characteristic impedance. This impedance is
defined nominally as 25k (23.5k to 26.25k) with no
more than 0.1uF of capacitance in parallel with the
impedance, in a voltage range from 2.8V to 10V.
The presence of diode rectification at the PD end
forces a slope impedance method, requiring at least
two operating point measurements, to eliminate the
effect of diode level shift.
Classification (optional)
As per the IEEE802.3af standards, the PSE has to
deliver a minimum of 15.4W to a PD connected to it
while limited by the 350mA maximum operating
current. Not all PD devices, however, require this
much power to operate. For example an IP Phone
with a monochrome screen will require far less
power than an IP Phone with color display. By
identifying the power drawn through each port, PSE
can assist in the System Power Management
protocol to determine the total number of PDs it can
support, depending on the output capacity of the
system power supply.
To achieve this type of power management an
optional step was added to the IEEE802.3af
standard called `Classification'. Classification allows
a device to communicate the maximum power it will
ever demand to the PSE so that the Power
Management Protocol can allocate the unused
power to other ports, enabling the full utilization of
the installed capacity. Table 1 identifies the different
classifications included in the IEEE802.3af standard.
In order to identify the class of the PD connected,
the PSE sends a second voltage signal of 15 to 20V,
slightly higher than signature detection voltage and
measures the current. Depending on the magnitude
of the current drawn, the PSE will classify the load to
one of the four Classes as shown in Table 2, and will
assume that the load will not draw any additional
power than shown for the given Class.
Note that Class 0 default will work for all devices &
Classification is only needed in the rare instance
when a multi-port switch or router wants to rate the
system supply lower than the combined Class 0 port
output; a situation which will reduce it's potential
classification base. In fact most of the PD devices,
like Wireless Access Points, in the market today are
Class 0 devices and hence do not require any
classification methods. HV110 therefore does not
force the use of resistors and wasted silicon area to
implement a Classification current source. HV110,
however, can be made to be compatible with
classification by utilizing low cost circuitry as shown
in Figure 9.
Disconnect
The PSE must be able to remove the power from a
port once the PD is removed. The purpose of this is
to prevent damage to non-compatible devices
connected to the same link at a later time. As per the
DC disconnect requirements, the PSE may
disconnect load if the current is between 5mA and
10mA and must disconnect between 0-5mA, if the
condition persists for more than 300ms. Although not
required by a PD device, HV110 includes a
"minimum circuit breaker" which when the current is
in a range less than 20mA will cause a shutdown
after the 300ms if the PSE does not react.
Class Usage PD
Power
0 Default
0.44
12.95W
1 Optional
0.44
3.84W
2 Optional
3.84
6.49W
3 Optional
6.49
12.95W
Table 1. PD Power Classification
Class Probe
Voltage
Min.(mA) Max.
(mA)
0 15-20V 0.5
4
1 15-20V 9
12
2 15-20V 17
20
3 15-20V 26
30
Table 2. Classification Signature measured at PD connector
4
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HV110
PD Power Standards
According to the IEEE802.3af standards, the PD
must operate from 36V to account for a potential 8V
line drop across the impedance of the network
during inrush (400mA max current x 20
line-
impedance). The UVLO must allow a 44V max turn-
on and a 30V minimum turn off. A PD device may
draw a maximum power of 12.95W. The maximum
power that can be expected is limited by the 20
line resistance carrying the 350mA current to the PD
at the minimum input voltage of 44V (power
delivered is 12.95W [{44 (20*0.35)}*0.35].
PD Application
IEEE Electrical & Timing Requirements
Below are of the major features of HV110, some of
which are usually found only in PSE devices.
Provides an internal current limit for inrush,
normal operation and overload conditions.
Limits the input current to less than 10
A that
will not interfere with Discovery from 2.6V to 10V
(with Zener as shown in Figure 1).
Meets the turn-on and turn-off thresholds for the
PD device & has a built-in 8V hysteresis (with
PNP transistor as shown in Figure 10).
Protects the device from thermal run away, with
thermal shut down and built in 9 sec restart
timer.
UVLO & POR provides hot-swapping/de-bounce
capabilities and inrush current limit.
PWRGD (active LOW) provides enable signal to
DC/DC converter.
Complies with the timing requirements for IEEE
802.3af standard.
Classification can be easily implemented, as
shown in Figure 9.
In addition to operating as a PD controller, HV110
can function as a redundant protective element to
assure reliable operation and compliance to
IEEE802.3af standard for the PD, even in cases
where the PD is powered from an auxiliary power
source, as shown in Figure 11.
Thermal Shutdown
HV110 is designed with a built in Thermal Shutdown
feature to assure higher levels of reliability. It will
shutdown if the temperature on the die reaches
140
C and will try to restart when the temperature
drops to 120
C.
Auto Restart
Any fault condition will cause the device to shut
down and enable a 9 second auto-restart timer. This
will occur indefinitely and is strong protection against
PSE error when the HV110 is used in PD
applications.
Note that a 9 second auto-restart will disconnect the
PD due to under current conditions, and will also
turn off the PSE, since the PSE will not see the
minimum current for greater than a period of 400ms
(350ms nominal).
PWRGD
The PWRGD (active low) pin is an open drain active
low MOSFET, (referred to V
NN
) which is enabled
when the gate voltage on the internal power
MOSFET reaches its full on voltage, provided that
the slew rate (V
slew
) timeout for large capacitor is not
being used.
Any fault condition will return PWRGD to a high
impedance state, turning off the HV110 and the
DC/DC converter. The PSE will also detect an
undercurrent condition for a period greater than
350ms (nominal), and will shut down by itself. It will
then wait for the next Discovery cycle.
Programmable UVLO and Hysteresis
ULVO is internally set through a 2.5Mohm and 116K
resistance divider in HV110. The default values of
UVLO are given in the Electrical Characteristics on
Page 2.
The UVLO circuit has a built in Hysteresis of 8V, to
enable stable operation during a UV condition. See
the section on Signature Detection for further details.
Internal MOSFET with Current Mirror
HV110 includes an internal 90V, 1ohm MOSFET.
The MOSFET current is mirrored to a current detect
circuit within the chip, utilizing a proprietary Supertex
algorithm and wastes almost no power. Elimination
of a sense resistor necessary with external power
switches means additional energy savings, providing
higher power output. Use of an on-board FET and
the thermal supervisor also leads to high reliability
compared to ICs that use external FETs whose
temperatures cannot be easily monitored.
PD Polarity
According to IEEE802.3af, PD shall be insensitive to
the polarity of the power supply and shall be able to
operate in Mode A and Mode B (cases when the
power is transferred through the signal leads and
5
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