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Электронный компонент: TDA7580

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TDA7580
July 2002
This is preliminary information on a new product now in development. Details are subject to change without notice.
s
FM/AM IF SAMPLING DSP
s
ON-CHIP ANALOGUE TO DIGITAL
CONVERTER FOR 10.7MHz IF SIGNAL
CONVERSION
s
SOFTWARE BASED CHANNEL EQUALIZATION
s
FM ADJACENT CHANNEL SUPPRESSION
s
RECEPTION ENHANCEMENT IN MULTIPATH
CONDITION
s
STEREO DECODER AND WEAK SIGNAL
PROCESSING
s
2 CHANNELS SERIAL AUDIO INTERFACE
(SAI) WITH SAMPLE RATE CONVERTER
s
I
2
C AND BUFFER-SPI CONTROL INTERFACES
s
RDS FILTER, DEMODULATOR & DECODER
s
INTER PROCESSOR TRANSPORT
INTERFACE FOR ANTENNA AND TUNER
DIVERSITY
s
FRONT-END AGC FEEDBACK
DESCRIPTION
The TDA7580 is an integrated circuit implementing
an advanced mixed analogue and digital solution to
perform the signal processing of a AM/FM channel.
The HW&SW architecture has been devised so to
have a digital equalization of the FM/AM channel;
hence a real rejection of adjacent channels and any
other signals interfering with the listening of the de-
sired station. In severe Multiple Paths conditions, the
reception is improved to get the audio with high qual-
ity.
TQFP64
ORDERING NUMBER: TDA7580
PRODUCT PREVIEW
FM/AM DIGITAL IF SAMPLING PROCESSOR
BLOCK DIAGRAM
A/D
SAI1
SAI0
SRC
I2C/SPI
DAC
CGU
Oscillator
I2C/SPI
HS3I
RDS
IF Digital
Signal Processor
TDA7580
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DESCRIPTION (continued)
The algorithm is self-adaptive, thus it requires no "on-the-field" adjustments after the parameters optimization.
The chip embeds a
Band Pass Sigma Delta Analogue to Digital Converter
for 10.7MHz IF conversion from a
"tuner device" (it is highly recommended the TDA7515).
The internal 24bit-DSP allows some flexibility in the algorithm implementation, thus giving some freedom for
customer required features. The total processing power offers a significant headroom for customer's software
requirement, even when the channel equalization and the decoding software is running. The Program and Data
Memory space can be loaded from an external non volatile memory via I
2
C or SPI.
The oscillator module works with an external 74.1MHz quartz crystal. It has very low Electro Magnetic Interfer-
ence, as it introduces very low distortion, and in any case any harmonics fall outside the Radio bandwidth.
The companion tuner device receives the reference clock through a differential ended interface, which works
off the Oscillator module by properly dividing down the master clock frequency. That allows the overall system
saving an additional crystal for the tuner.
After the IF conversion, the digitized baseband signal passes through the Base Band processing section, either
FM or AM, depending on the listener selection. The FM Base Band processing comprises of Stereo Decoder,
Spike Detection and Noise Blanking. The AM Noise Blanking is fully software implemented.
The internal RDS filter, demodulator and decoder features complete functions to have the output data available
through either I
2
C or SPI interface. No DSP support is needed but at start-up, so that RDS can work in back-
ground and in parallel with other DSP processing. This mode (RDS-only) allows current consumption saving for
low power application modes.
An I
2
C/SPI interface is available for any control and communication with the main micro, as well as RDS data
interface. The DSP SPI block embeds a 10 words FIFO for both transmit and receive channels, to lighten the
DSP task and frequently respond to the interrupt from the control interface.
Serial Audio Interface (SAI) is the ideal solution for the audio data transfer, both transmit and receive: either
master or slave. The flexibility of this module gives a wide choice of different protocols, including I
2
S. Two fully
independent bidirectional data channels, with separate clocks allows the use of TDA7580 as general purpose
digital audio processor.
A fully Asynchronous Sample Rate Converter (ASRC) is available as a peripheral prior to sending audio data
out via the SAI, so that internal audio sampling rate (~36kHz and FM/AM mode) can be adapted by upconver-
sion to any external rate.
An Inter Processor Transport Interface (HS
3
I, High Speed Synchronous Serial Interface) is also available for a
modular system which implements
Dual Tuner Diversity
, thus enhancing the overall system performance. It is
about a Synchronous Serial Interface which exchanges data up to the MPX rate. It has been designed to reduce
the Electro Magnetic Interference toward the sensitive analogue signal from the Tuner.
General Purpose I/O registers are connected to and controlled by the DSP, by means of memory map.
A Debug and Test Interface is available for on-chip software debug as well as for internal registers read/write
operation.
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TDA7580
ABSOLUTE MAXIMUM RATINGS
Warning: Operation at or beyond these limits may result in permanent damage to the device. Normal operation is not guaranteed at these
extremes.
Note: 1. V
DD3
refers to all of the nominal 3.3V power supplies (V
DDH
, V
OSC
, V
DDSD
). V
DD
refers to all of the nominal 1.8V power supplies
(V
DD
, V
MTR
).
2. During Normal Mode operation VDD3 is always available as specified
3. During Fail-safe Mode operation VDD3 may be not available.
THERMAL DATA
Symbol
Parameter
Value
Unit
VDD
VDD3
Power supplies
(1)
Nom. 1.8V
Nom. 3.3V
-0.5 to 2.5
-0.5 to 4.0
V
V
Analog Input or Output Voltage belonging to 3.3V IO ring (V
DDSD
,
V
DDOSC
)
-0.5 to 4.0
V
Digital Input or Output Voltage, 5V tolerant
Normal
(2)
Fail-safe
(3)
-0.5 to 6.50
-0.5 to 3.80
V
V
All remaining Digital Input or Output Voltage
Nom. 1.8V
Nom. 3.3V
-0.5 to (VDD+0.5)
-0.5 to (VDD3+0.5)
V
T
j
Operating Junction Temperature Range
-40 to 125
C
T
stg
Storage Temperature
-55 to 150
C
Symbol
Parameter
Value
Unit
R
th j-amb
Thermal resistance junction to ambient
68
C/W
TDA7580
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PIN CONNECTION (Top view)
1
VHI
2
VCM
3
VLO
4
INP
5
INN
6
VCMOP
7
GNDSD
8
GNDOSC
9
XTI
10
XTO
11
VDDOSC
12
VDDMTR
13
CKREFP
14
CKREFN
15
AGCKEY
16
GNDMTR
48
GND
47
VDD
46
TST3_LRCKR
45
TST2_SCKR
44
LRCK_LRCKT
43
SCLK_SCKT
42
SDO0
41
VDDH
40
GNDH
39
TST1_SDI1
38
TST4_SDI0
37
GPIO_SDO1
36
TESTN
35
GND
34
VDD
33
RESETN
64
VDD
SD
63
VDD
H
62
GND
H
61
VDD
ISO
60
GND
59
VDD
58
DBO
UT1
57
DBR
Q1
56
DBIN
1
55
DBC
K1
54
VDD
H
53
GND
H
52
DBO
UT0
51
DBR
Q0
50
DBIN
0
49
DBC
K0
32
ADDR
_SD
31
INT
30
RDS
_CS
29
RDS
_INT
28
G
NDH
27
V
DDH
26
IQ
CH3
25
IQ
CH2
24
IQ
CH1
23
IQS
YNC
22
VDD
21
GND
20
SCL_
SCK
19
MISO
18
S
DA_
MOSI
17
PRO
TSE
L_SS
IF
AD
C
DEBUG1
OSC
.
T
uner
DS
P
/RDS
I
2
C
/SPI
HS
3
I
RDS
SA
I
DEBUG0
IFADC Modulator Power Supply pins pair
Oscillator Power Supply pins pair
Tuner Clock Out and AGC Keying DAC Power Supply pins pair
Core Logic 1.8V Power Supply pins pair
I/O Ring 3.3V Power Supply pins pair
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TDA7580
PIN DESCRIPTION
N
Name
Type
Description
Notes
After
Reset
1
VHI
A
Internally generated IFADC Opamps
2.65V (@VDD=3.3V) Reference Voltage
Pin for external filtering
It needs external 22
F
and 220nF ceramic
capacitors
2
VCM
A
Internally generated Common Mode
1.65V (@VDD=3.3V) Reference Voltage
Pin for external filtering
It needs external 22
F
and 220nF ceramic
capacitors
3
VLO
A
Internally generated IFADC Opamps
0.65V (@VDD=3.3V) Reference Voltage
Pin for external filtering
It needs external 22
F
and 220nF ceramic
capacitors
4
INP
A
Positive IF signal input from Tuner
2.0Vpp @VDD=3.3V
5
INN
A
Negative IF signal input from Tuner
2.0Vpp @VDD=3.3V
6
VCMOP
A
Internally generated Modulator Opamps
Common Mode 2.65V (@VDD=3.3V)
Reference Voltage Pin for external
filtering
It needs external 22
F
and 220nF ceramic
capacitors
7
GNDSD
G
IFADC Modulator Analogue Ground
Clean Ground, to be
star-connected to
voltage regulator ground
8
GNDOSC
G
Oscillator Ground
Clean Ground, to be
star-connected to
voltage regulator ground
9
XTI
I
High impedance oscillator input (quartz
connection) or clock input when in
Antenna Diversity slave mode
Maximum voltage swing
is VDD
10
XTO
O
Low impedance oscillator output (quartz
connection)
11
VDDOSC
P
Oscillator Power Supply
3.3V
12
VDDMTR
P
Tuner reference clock and AGCKeying
DAC Power Supply
1.8V
13
CKREFP
B
Tuner reference clock positive output.
FM 100kHz
AM
EU
18kHz
With internal pull_up, on
at reset
Output
14
CKREFN
B
Tuner reference clock negative output.
FM 100kHz
AM
EU
18kHz
With internal pull_up, on
at reset
Output
15
AGCKEY
A
DAC output for Tuner AGCKeying
1.5kohm 30% output
impedance. 1Vpp 1%
output dynamic range
16
GNDMTR
G
Tuner reference clock and AGC keying
DAC Ground