1/13
April 2001
s
HIGH SPEED:
s
f
MAX
= 240MHz (TYP.) at V
CC
= 5V
s
LOW POWER DISSIPATION:
I
CC
= 8
A(MAX.) at T
A
=25C
s
HIGH NOISE IMMUNITY:
V
NIH
= V
NIL
= 28 % V
CC
(MIN.)
s
50
TRANSMISSION LINE DRIVING
CAPABILITY
s
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 24mA (MIN)
s
BALANCED PROPAGATION DELAYS:
t
PLH
t
PHL
s
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2V to 6V
s
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 299
s
IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The 74AC299 is an advanced high-speed CMOS
8-BIT PIPO SHIFT REGISTER (3-STATE)
fabricated with sub-micron silicon gate and
double-layer metal wiring C
2
MOS technology.
These devices have four modes (HOLD, SHIFT
LEFT, SHIFT RIGHT and LOAD DATA). Each
mode is chosen by two function select inputs (S0,
S1) as shown in the Truth Table. When one or
both enable inputs, (G1, G2) are high, the eight
input/output terminals are in the high-impedance
state; however sequential operation or clearing of
the register is not affected. Clear function is
asynchronous to clock.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
74AC299
8 BIT PIPO SHIFT REGISTER
WITH ASYNCHRONOUS CLEAR
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
PACKAGE
TUBE
T & R
DIP
74AC299B
SOP
74AC299M
74AC299MTR
TSSOP
74AC299TTR
TSSOP
DIP
SOP
74AC299
2/13
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
TRUTH TABLE
* When one or both controls are high, the eight input/output terminals are the high impedance state: howewer sequential operation or cleaning
of the register is not affected.
Z : High Impedance
Qn0 : The level of An before the indicated steady state input conditions were established.
Qnn : The level of Qn before the most recent active transition indicated by OR
a, h : The level of the steadystate inputs A, H, respectively.
X : Don't Care
PIN No
SYMBOL
NAME AND FUNCTION
1, 19
S0, S1
Mode Select Inputs
2, 3
G1, G2
3-State Output Enable Inputs (Active LOW)
7, 13, 6, 14, 5, 15, 4, 16
A/QA to H/QH
Parallel Data Inputs or 3-State Parallel Outputs (Bus Driver)
8, 17
QA' to QH'
Serial Outputs (Standard Output)
9
CLEAR
Asynchronous Master Reset Input (Active LOW)
11
SR
Serial Data Shift Right Input
12
CLOCK
Clock Input (LOW to HIGH, Edge-triggered)
18
SL
Serial Data Shift Left Input
10
GND
Ground (0V)
20
V
CC
Positive Supply Voltage
MODE
INPUTS
INPUTS/OUTPUTS
OUTPUTS
CLEAR
FUNCTION
SELECTED
OUTPUT
CONTROL
CLOCK
SERIAL
A/QA
H/QH
QA'
QH'
S1
S0
G1*
G2*
SL
SR
Z
L
H
H
X
X
X
X
X
Z
Z
L
L
CLEAR
L
L
X
L
L
X
X
X
L
L
L
L
L
X
L
L
L
X
X
X
L
L
L
L
HOLD
H
L
L
L
L
X
X
X
QA0
QH0
QA0
QH0
SHIFT
RIGHT
H
L
H
L
L
X
H
H
QGn
H
QGn
H
L
H
L
L
X
L
L
QGn
L
QGn
SHIFT
LEFT
H
H
L
L
L
H
X
QBn
H
QBn
H
H
H
L
L
L
L
X
QBn
L
QBn
L
LOAD
H
H
H
X
X
X
X
a
h
a
h
74AC299
3/13
LOGIC DIAGRAM
74AC299
4/13
TIMING CHART
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied.
RECOMMENDED OPERATING CONDITIONS
1) V
IN
from 30% to 70% of V
CC
Symbol
Parameter
Value
Unit
V
CC
Supply Voltage
-0.5 to +7
V
V
I
DC Input Voltage
-0.5 to V
CC
+ 0.5
V
V
O
DC Output Voltage
-0.5 to V
CC
+ 0.5
V
I
IK
DC Input Diode Current
20
mA
I
OK
DC Output Diode Current
20
mA
I
O
DC Output Current
50
mA
I
CC
or I
GND
DC V
CC
or Ground Current
400
mA
T
stg
Storage Temperature
-65 to +150
C
T
L
Lead Temperature (10 sec)
300
C
Symbol
Parameter
Value
Unit
V
CC
Supply Voltage
2 to 6
V
V
I
Input Voltage
0 to V
CC
V
V
O
Output Voltage
0 to V
CC
V
T
op
Operating Temperature
-55 to 125
C
dt/dv
Input Rise and Fall Time V
CC
= 3.0, 4.5 or 5.5V (note 1)
8
ns/V
74AC299
5/13
DC SPECIFICATIONS
1) Maximum test duration 2ms, one output loaded at time
2) Incident wave switching is guaranteed on transmission lines with impedances as low as 50
Symbol
Parameter
Test Condition
Value
Unit
V
CC
(V)
T
A
= 25C
-40 to 85C
-55 to 125C
Min.
Typ.
Max.
Min.
Max.
Min.
Max.
V
IH
High Level Input
Voltage
3.0
V
O
= 0.1 V or
V
CC
-0.1V
2.1
1.5
2.1
2.1
V
4.5
3.15
2.25
3.15
3.15
5.5
3.85
2.75
3.85
3.85
V
IL
Low Level Input
Voltage
3.0
V
O
= 0.1 V or
V
CC
-0.1V
1.5
0.9
0.9
0.9
V
4.5
2.25
1.35
1.35
1.35
5.5
2.75
1.65
1.65
1.65
V
OH
High Level Output
Voltage
3.0
I
O
=-50
A
2.9
2.99
2.9
2.9
V
4.5
I
O
=-50
A
4.4
4.49
4.4
4.4
5.5
I
O
=-50
A
5.4
5.49
5.4
5.4
3.0
I
O
=-12 mA
2.56
2.46
2.4
4.5
I
O
=-24 mA
3.86
3.76
3.7
5.5
I
O
=-24 mA
4.86
4.76
4.7
V
OL
Low Level Output
Voltage
3.0
I
O
=50
A
0.002
0.1
0.1
0.1
V
4.5
I
O
=50
A
0.001
0.1
0.1
0.1
5.5
I
O
=50
A
0.001
0.1
0.1
0.1
3.0
I
O
=12 mA
0.36
0.44
0.5
4.5
I
O
=24 mA
0.36
0.44
0.5
5.5
I
O
=24 mA
0.36
0.44
0.5
I
I
Input Leakage
Current
5.5
V
I
= V
CC
or GND
0.1
1
1
A
Ioz
High Impedance
Output Leakage
Current
5.5
V
I
= V
IH
or V
IL
V
O
= V
CC
or GND
0.5
5
10
A
I
CC
Quiescent Supply
Current
5.5
V
I
= V
CC
or GND
8
80
160
A
I
OLD
Dynamic Output
Current (note 1, 2)
5.5
V
OLD
= 1.65 V max
75
50
mA
I
OHD
V
OHD
= 3.85 V min
-75
-50
mA
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