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Электронный компонент: MB84VD23180FM-70PBS

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September 2003
This document specifies SPANSION
memory products that are now offered by both Advanced Micro Devices and
Fujitsu. Although the document is marked with the name of the company that originally developed the specification,
these products will be offered to customers of both AMD and Fujitsu.
Continuity of Specifications
There is no change to this datasheet as a result of offering the device as a SPANSION
product. Future routine
revisions will occur when appropriate, and changes will be noted in a revision summary.
Continuity of Ordering Part Numbers
AMD and Fujitsu continue to support existing part numbers beginning with "Am" and "MBM". To order these
products, please use only the Ordering Part Numbers listed in this document.
For More Information
Please contact your local AMD or Fujitsu sales office for additional information about SPANSION
memory
solutions.
TM
TM
TM
SPANSION MCP
Data Sheet
TM
DS05-50309-1E
FUJITSU SEMICONDUCTOR
DATA SHEET
Stacked MCP (Multi-Chip Package) FLASH MEMORY & SRAM
CMOS
64M (
16) FLASH MEMORY &
4M (
16) STATIC RAM
MB84VD23180FM
-70
s
FEATURES
Power supply voltage of 2.7 V to 3.1 V
High performance
70 ns maximum access time (Flash)
70 ns maximum access time (SRAM)
Operating Temperature
30



C to +85



C
Package 73-ball FBGA
(Continued)
s
PRODUCT LINEUP
*: Both V
CC
f and V
CC
s must be in recommended operation range when either part is being accessed.
s
PACKAGE
Flash Memory
SRAM
Supply Voltage (V)
V
CC
r* = 3.0 V
V
CC
s* = 3.0 V
Max Address Access Time (ns)
70
70
Max CE Access Time (ns)
70
70
Max OE Access Time (ns)
30
35
73-ball plastic FBGA
BGA-73P-M03
+0.1V
0.3 V
+0.1V
0.3 V
MB84VD23180FM
-70
2
(Continued)
FLASH MEMORY
Simultaneous Read/Write operations (Dual Bank)
FlexBank
TM
*
1
Bank A : 8 Mbit (8 KB
8 and 64 KB
15)
Bank B : 24 Mbit (64 KB
48)
Bank C : 24 Mbit (64 KB
48)
Bank D : 8 Mbit (8 KB
8 and 64 KB
15)
Two virtual Banks are chosen from the combination of four physical banks (Refer to "Example of Virtual Banks
Combination table" and "Simultaneous Operation table") .
Host system can program or erase in one bank, and then read immediately and simultaneously from the other
bank with zero latency between read and write operations.
Read-while-erase
Read-while-program
Single 3.0 V read, program, and erase
Minimized system level power requirements
Minimum 100,000 program/erase cycles
Sector erase architecture
Sixteen 4 Kword and one hundred twenty-six 32 Kword sectors in word.
Any combination of sectors can be concurrently erased. It also supports full chip erase.
HiddenROM region
256 byte of HiddenROM, accessible through a new "HiddenROM Enable" command sequence
Factory serialized and protected to provide a secure electronic serial number (ESN)
WP/ACC input pin
At V
IL
, allows protection of "outermost" 2
8 Kbytes on both ends of boot sectors, regardless of sector protection/
unprotection status
At V
IH
, allows removal of boot sector protection
At V
ACC
, increases program performance
Embedded Erase
TM
*
2
Algorithms
Automatically preprograms and erases the chip or any sector
Embedded Program
TM
* Algorithms
Automatically writes and verifies data at specified address
Data Polling and Toggle Bit feature for detection of program or erase cycle completion
Ready/Busy output (RY/BY)
Hardware method for detection of program or erase cycle completion
Automatic sleep mode
When addresses remain stable, the device automatically switches itself to low power mode.
Low V
CC
f write inhibit
2.5 V
Program Suspend/Resume
Suspends the program operation to allow a read in another byte
Erase Suspend/Resume
Suspends the erase operation to allow a read data and/or program in another sector within the same device
Please refer to "MBM29DL64DF" data sheet in detailed function
(Continued)
MB84VD23180FM
-70
3
(Continued)
SRAM
Power dissipation
Operating : 40 mA Max
Standby
: 10



A Max
Power down features using CE1s and CE2s
Data retention supply voltage: 1.5 V to 3.1 V
CE1s and CE2s Chip Select
Byte data control: LB (DQ
7
to DQ
0
), UB (DQ
15
to DQ
8
)
*1 : FlexBank
TM
is a trademark of Fujitsu Limited, Japan.
*2 : Embedded Erase
TM
and Embedded Program
TM
are trademarks of Advanced Micro Devices, Inc.
MB84VD23180FM
-70
4
s
PIN ASSIGNMENT
(BGA-73P-M03)
(Top View)
Marking side
E7
A13
E6
A9
E5
A20
E4
RY/BY
E3
A18
E2
A5
A2
E8
A21
G7
N.C.
DQ6
G3
DQ1
G2
VSS
G1
A0
G8
A16
H7
DQ15/A-1
H6
DQ13
H5
DQ4
H4
DQ3
H3
DQ9
H2
OE
CEf
H8
CIOf
F7
A14
A10
F3
A17
F2
A4
F1
A1
F8
N.C.
J7
DQ7
J6
DQ12
J5
VCCs
J4
VCCf
J3
DQ10
J2
DQ0
CE1s
J8
VSS
K7
DQ14
K6
DQ5
K5
N.C.
K4
DQ11
K3
DQ2
DQ8
D7
A12
D6
A19
D5
CE2s
D4
RESET
D3
UB
D2
B1
A6
A7
A3
D8
A15
C7
A11
C6
A8
C5
WE
C4
WP/ACC
C3
LB
G4
F4
C1
C8
N.C.
N.C.
L1
K8
E9
G9
N.C.
H9
F9
N.C.
J9
D9
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
B6
B5
G10
F10
N.C.
N.C.
N.C.
B10
A10
M1
N.C.
M10
N.C.
N.C.
N.C.
A1
L10
L6
L5