KBD42W11
Keyboard Controller
FEATURES
Supports IBM PC and Compatible System
Designs
Runs Much Faster Than Traditional
Keyboard Controllers
Host interface Compatible with Traditional
Keyboard Controller
6 MHz 12 MHz Operating Frequency
Communicates with Keyboard Directly
High-reliability CMOS Technology
40 Pin DIP and 44 Pin PLCC Package
GENERAL DESCRIPTION
The KBD42W11 keyboard controller is
programmed to support the IBM compatible
personal computer keyboard serial interface. The
keyboard controller receives serial data from the
keyboard, checks the parity of the data,
translates the scan code, and presents the data
to the system as a byte of data in its output
buffer. The controller will interrupt the system
when data is placed in its output buffer. The byte
of data will be sent to the keyboard serially with
an odd parity bit automatically inserted. The
keyboard is required to acknowledge all data
transmissions. No transmission should be sent to
the keyboard until acknowledgment is received
for the previous byte sent.
The KBD42W11 keyboard controller and BIOS to
improve the performance of IBM PC machines
and their compatibles. A hardwire methodology
is used in this keyboard controller instead of a
software implementation, as in the traditional
8042 keyboard BIOS. This enables the keyboard
controller to respond instantly to all commands
sent from the keyboard to the CPU BIOS.
The KBD42W11 enables popular programs such
as AutoCAD
, Microsoft
WindowsTM, NOVELL
,
and other programs to run much faster.
IBM is a registered trademark of International Business
Machines Corporation. AutoCAD is a registered trademark
of Autodesk, Inc. Microsoft is a registered trademark and
Windows is a trademark of Microsoft Corporation.
NOVELL is a registered trademark of Novell, Inc.
Standard Microsystems is a registered trademark and
SMSC is a trademark of Standard Microsystems
Corporation. Other product and company names are
trademarks or registered trademarks of their respective
holders.
2
TABLE OF CONTENTS
FEATURES ....................................................................................................................................... 1
GENERAL DESCRIPTION ................................................................................................................ 1
PIN CONFIGURATION ...................................................................................................................... 3
PIN DESCRIPTION ........................................................................................................................... 4
BLOCK DIAGRAM ............................................................................................................................ 5
AC TIMING........................................................................................................................................ 6
TIMING WAVEFORMS ...................................................................................................................... 7
W
RITE
C
YCLE
T
IMING
........................................................................................................................ 7
R
EAD
C
YCLE
T
IMING
.......................................................................................................................... 7
S
END
D
ATA TO
K/B ........................................................................................................................... 8
R
ECEIVE
D
ATA FROM
K/B................................................................................................................... 8
XIN/XOUT C
LOCK
........................................................................................................................... 8
ABSOLUTE MAXIMUM RATINGS..................................................................................................... 9
ELECTRICAL CHARACTERISTICS & CAPACITANCE ..................................................................... 9
STATUS REGISTER ....................................................................................................................... 10
OUTPUT BUFFER........................................................................................................................... 10
INPUT BUFFER .............................................................................................................................. 10
I/O PORTS ...................................................................................................................................... 10
COMMANDS (I/O ADDRESS HEX 64)............................................................................................. 12
APPLICATION CIRCUIT ................................................................................................................. 13
A
SYNCHRONOUS
............................................................................................................................. 13
S
YNCHRONOUS
............................................................................................................................... 14
PACKAGE DIMENSIONS................................................................................................................ 15
80 Arkay Drive
Hauppauge, NY 11788
(516) 435-6000
FAX (516) 273-3123
3
PIN CONFIGURATION
T0
X
IN
X
OUT
nRESET
V
DD
nCS
V
SS
nRD
A2
nWR
NC
D0
D1
D2
D3
D4
D5
D6
D7
V
SS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
V
DD
T1
P27(KDAT)
P26(KCLK)
P25(IEMP)
P24(INIT)
P17(KINH)
P16(DISP)
P15(JUMP)
P14(RAM)
P13
P12
P11
P10
NC
V
DD
P23
P22
P21(nGA20)
P20(nRC)
40 Pin DIP
7
8
9
10
11
12
13
14
15
16
17
6
5
4
3
2
1
4
4
4
3
4
2
4
1
4
0
39
38
37
36
35
34
33
32
31
30
29
1
8
1
9
2
0
2
1
2
2
2
3
2
4
2
5
2
6
2
7
2
8
nCS
V
SS
nRD
A2
nWR
NC
NC
D0
D1
D2
D3
D
4
D
5
D
6
D
7
V
S
S
N
C
P
2
0
P
2
1
P
2
2
P
2
3
V
D
D
P24
P17
P18
P15
P14
NC
P13
P12
P11
P10
NC
V
D
D
n
R
E
S
E
T
X
O
U
T
X
I
N
T
0
N
C
V
D
D
T
1
P
2
7
P
2
8
P
2
5
44 Pin PLCC
4
PIN DESCRIPTION
PIN NO.
(40 Pin DIP)
PIN NO.
(44 Pin PLCC)
I/O
NAME
FUNCTION
1
2
I
T0
K/B Clock Input
2
3
I
XIN
Crystal Clock I/P
3
4
O
XOUT
Crystal Clock O/P
4
5
I
nRESET
Chip Reset
5
6
-
VDD
Optional +5V Power Supply
6
7
I
nCS
Chip Select
7
8
-
VSS
Optional Ground Power
8
9
I
nRD
I/O Read
9
10
I
A2
Connect to Address A2
10
11
I
nWR
I/O Write
11,26
1,12,13,23,29, 34
-
NC
Reserved
12,13,14,
15,16,17,
18, 19
14,15,16,17,18,
19,20,21
I/O
D0-D7
Data Bus D0 - D7
20
22
-
VSS
Ground Power Supply
21
24
O
P20
Bit 0 of Port 2 (RCB: System
Reset)
22
25
O
P21
Bit 1 of Port 2 (GA20: GATE A20)
23
26
I/O
P22
Bit 2 of Port 2
24
27
I/O
P23
Bit 3 of Port 2
25
28
-
VDD
Optional +5V Power Supply
27
30
I/O
P10
Bit 0 of Port 1
28
31
I/O
P11
Bit 1 of Port 1
29
32
I/O
P12
Bit 2 of Port 1
30
33
I/O
P13
Bit 3 of Port 1
31
35
I
P14
Bit 4 of Port 1 (RAM Jumper
Select)
32
36
I
P15
Bit 5 of Port 1 (JUMP)
33
37
I
P16
Bit 6 of Port 1 (Display Select)
34
38
I
P17
Bit 7 of Port 1 (K/B Inhibit Switch)
35
39
O
P24
Bit 4 of Port 2 (OBF O/P Interrupt)
36
40
O
P25
Bit 5 of Port 2 (I/P Buffer Empty)
37
41
O
P26
Bit 6 of Port 2 (K/B Clock O/P)
38
42
O
P27
Bit 7 of Port 2 (K/B Data O/P)
39
43
I
T1
K/B Data Input
40
44
-
VDD
+5V Power Supply
5
BLOCK DIAGRAM
RECEIVE
HARDWIRE
SELECT
DATA
BUFFER
REGISTER
REGISTER
STATUS
PORT
INTERFACE
STATUS
INPUT
T0
T1
XOUT
XIN
nWR
nRD
nCS
A2
D0 - D7
R64
SCAN
CODE
ROM
CONTROL
LOGIC
nRESET
P1 0
P1 1
P1 2
P1 3
P1 4 (RAM Select)
P1 5 (Manufacture Mode)
P1 6 (Display)
P1 7 (KBNH)
P2 0 (nRC)
P2 1 (Gate A20)
P2 2
P2 3
P2 4
P2 5
P2 6 (Keyboard Clock)
P2 7
CONTROL &
BUFFER
REGISTER
BUFFER
REGISTER
OUTPUT
BUFFER
REGISTER
W60
W64
R60
INPUT &
OUTPUT
PORT
INTERFACE
OUTPUT
(Keyboard Data)
CONTROL
TRANSMIT
TRANSMIT
REGISTER
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