DIGITAL SIGNAL PROCESSOR FOR CDP
S5L9290X
1
PRELIMINARY
INTRODUCTION
S5L9290X is a signal processing LSI for the CD. Digital processing function
(EFM demodulation, error correction), spindle motor servo processing, wide
capture range DPLL and 1-bit DAC for the CD player are installed in
S5L9290X.
FEATURES
Signal processing part
-- EFM data demodulation
-- Frame sync detection, protection, insertion
-- Sub code data processing (Q data CRC check, Q data register installed)
-- Error correction (C1: 2 error correction, C2: 4 erasure correction)
-- Installed 16K SRAM for De-interleave
-- Interpolation
-- Digital audio interface
-- CLV servo control (X1, X2)
-- Wide capture range digital PLL ( 50%)
Digital filter, DAC part
-- 4 times over sampling digital filter
-- Digital de-emphasis (can be process the 32kHz, 44.1kHz, 48kHz)
-- Sigma-delta stereo DAC installed
-- Audio L.P.F installed
ORDERING INFORMATION
Device
Package
Supply Voltage
Operating Temperature
S5L9290X01
L0R0
48-LQFP-0707
2.7V
3.3V (Analog, Internal logic)
2.7V
5.5V (I/O port)
-20
C
+75
C
48-LQFP-0707
S5L9290X
DIGITAL SIGNAL PROCESSOR FOR CDP
2
PRELIMINARY
BLOCK DIAGRAM
DPLL
CLV
Servo
LOCK
SMEF
SMDP
SMDS
WDCK
EFMI
VCO1LF
Timing
Generator
Micom
Interface
WFCK
RFCK
C4M
XIN
ISTAT
MLT
MDAT
MCK
MUTE
Subcode
Out
EFM
Demodulator
ECC
16K
SRAM
Address
Generator
SQCK
SBCK
SOS1
SQDT
SBDT
Interpolator
I/O
Interface
JITB
LPF
PWM
SADTO
LRCKO
BCKO
LCHOUT
RCHOUT
VHALF
VREF
1-bit
DAC
Digital
Out
Digital
Filter
C2PO
DATX
SADTI
LRCKI
BCKI
DIGITAL SIGNAL PROCESSOR FOR CDP
S5L9290X
3
PRELIMINARY
PIN CONFIGURATION
S5L9290X
DSP+DAC
48-LQFP-0707
VSSA_PLL
VCO1LF
VSSD_PLL
VDDD_PLL
XIN
XOUT
EFMI
LOCK
SMEF
C2PO
JITB
DATX
VDDD3-5V
VDDD2-3V
SBCK
SQDT
SMON
TESTV
SMDS
WDCK
MUTE
BCKI
1
2
3
4
5
6
7
8
9
10
11
12
36
35
34
33
32
31
30
29
28
27
26
25
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
VDDD1_5V
VSSD1_5V
LKFS
LKFS
RESETB
MLT
MDAT
MCK
ISTAT
S0S1
SQCK
VSSD2-3V
SADTO
LRCKO
BCKO
LRCKI
SADTI
VSSD_DAC
VDDD_DAC
RCHOUT
VSSA_DAC
VREF
VHALF
VDDA_DAC
LRHOUT
VDDA_PLL
S5L9290X
DIGITAL SIGNAL PROCESSOR FOR CDP
4
PRELIMINARY
PIN DESCRIPTION
Table 1. Pin Description
NO.
NAME
I/O
Pin Description
1
VSSA_PLL
-
Analog Ground for DPLL
2
VCO1LF
O
Pump out for VCO1
3
VSSD_PLL
-
Digital Ground Separated Bulk Bias for DPLL
4
VDDD_PLL
-
Digital Power Separated Bulk Bias for DPLL (3V Power)
5
VDDD1-5V
-
Digital Power (5V Power, I/O PAD)
6
XIN
I
X'tal oscillator input (16.9344MHz)
7
XOUT
O
X'tal oscillator output
8
VSSD1
-
Digital Ground (I/O PAD)
9
EFMI
I
EFM signal input
10
LOCK
O
CLV Servo locking status output
11
SMEF
O
LPF time constant control of the spindle servo error signal
12
SMDP
O
Phase control output for Spindle Motor drive
13
SMDS
O
Speed control output for Spindle Motor drive
14
WDCK
O
Word clock output (Normal Speed : 88.2KHz, Double Speed : 176.4KHz)
15
TESTV
I
Various Data/Clock Input
16
LKFS
O
The Lock status output of frame sync
17
C4M
O
4.2336MHz clock output
18
RESETB
I
System Reset at 'L'
19
MLT
I
Latch signal input from Micom
20
MDAT
I
Serial data input from Micom
21
MCK
I
Serial data receiving clock input from Micom
22
ISTAT
O
The internal status output to Micom
23
S0S1
O
Subcode sync signal(S0+S1) output
24
SQCK
I
Subcode-Q data transfering bit clock input
DIGITAL SIGNAL PROCESSOR FOR CDP
S5L9290X
5
PRELIMINARY
Table 1. Pin Description (continued)
NO.
NAME
I/O
Function Description
25
SQDT
O
Subcode-Q data serial output
26
MUTE
I
System mute at 'H'
27
VDDD2-3V
-
Digital Power (3V Power, Internal Logic)
28
VSSD2
-
Digital Ground (Internal Logic)
28
VDDD3-5V
-
Digital Power (5V Power, I/O PAD)
30
SBCK
I
Subcode data transfering bit clock
31
JITB
O
Internal SRAM jitter margin status output
32
C2PO
O
C2 pointer output
33
DATX
O
Digital audio data output
34
SADTO
O
Serial audio data output (48 slot, MSB first)
35
LRCKO
O
Channel clock output
36
BCKO
O
Bit clock output
37
BCKI
I
Bit clock input
38
LRCKI
I
Channel clock input
39
SADTI
I
Serial audio data input (48 slot, MSB first)
40
VSSD_DAC
-
Digital Ground for DAC
41
VDDD_DAC
-
Digital Power for DAC (3V Power)
42
RCHOUT
O
Right-Channel audio output through DAC
43
VSSA_DAC
-
Analog Ground for DAC
44
VREF
O
Referance Voltage output for bypass
45
VHALF
O
Referance Voltage output for bypass
46
VDDA_DAC
-
Analog Power for DAC (3V Power)
47
LCHOUT
O
Left-Channel audio output through DAC
48
VDDA_PLL
-
Analog Power for PLL (3V Power)
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