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Электронный компонент: S3F443FX

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20-S3-F443FX -092002
USER'S MANUAL
S3F443FX
16/32-Bit RISC
Microcontroller
Revision 0
S3F443FX (Preliminary Spec)
PRODUCT OVERVIEW
1-1
1
PRODUCT OVERVIEW
INTRODUCTION
SAMSUNG S3F443FX 16/32-bit RISC micro-controller is a cost-effective and high-performance solution for HDD
and general purpose applications.
An outstanding feature of the S3F443FX is its CPU core, a 16/32-bit RISC processor (ARM7TDMI) designed by
Advanced RISC Machines, Ltd. The ARM7TDMI core is a low-power, general-purpose, microprocessor macro-
cell which was developed for the use in application-specific and customer-specific integrated circuits. Its simple,
elegant, and fully static design is particularly suitable for cost-sensitive and power-sensitive applications.
The S3F443FX has been developed by using the ARM7TDMI core, CMOS standard cell, and data path compiler.
the S3F443FX has been designed to support only Big Endian. Most of the on-chip function blocks have been
designed by using a HDL synthesizer. The S3F443FX has been fully verified in SAMSUNG ASIC test
environment including internal Qualification Assurance Process.
By providing a complete set of common system peripherals, the S3F443FX can minimize the overall system
costs and eliminate the need to configure additional components, externally.
The integrated on-chip functions which are described in this document include:
-- Memory system manager: 3 external memory banks. (If the internal flash ROM is not used for a boot code,
nCS0 will be used for a boot ROM )
-- Built-in 256Kbyte (64K
32-bit) Flash memory
-- 8K-bytes (2K
32-bit) internal SRAM for stack, data memory, and/or code memory
-- One channel UART
-- Six 16-bit internal timers with 8-bit pre-scaler and input Capture function
-- Power down mode: STOP and IDLE modes
-- One 8-bit basic timer and 3-bit watch-dog timer
-- Interrupt controller (Total of 21 interrupt sources including 3 external sources )
-- Sixteen programmable I/O ports
-- One 8-Bit PWM
-- 64-pin LQFP
PRODUCT OVERVIEW
S3F443FX (Preliminary Spec)
1-2
FEATURES
Architecture
Completely integrated micro-controller for
embedded applications
Big Endian only supported
Fully 16/32-bit RISC architecture
Efficient and powerful ARM7TDMI CPU core
Cost effective JTAG-based debugging solution
Memory
8-bit external bus support for one ROM bank
and two external memory banks
Programmable memory access times (from 0 to
7 wait cycles)
8-Kbyte SRAM (for stack, data memory, and/or
code memory)
Built-in 256-Kbyte Flash memory (for data
and/or code memory )
UART
One UART channel with interrupt-based
operation
Programmable baud rates
Supports asynchronous serial data
transmit/receive operations with 5-bit, 6-bit, 7-
bit, 8-bit data per frame
16-bit Timers/Counters with Capture Function
(T0, T1, T2, T3, T4 and T5)
Six programmable 16-bit timer/counters
Interval, capture, or match & overflow mode
operations
EXTCLK or TIN (Timer Input Capture Signal)
can be the clock source for the timer.
TIN is shared by all timers.
PWM
One-8 bit PWM
Clock source is driven from EXTCLK signal
source divided by 1/1 or by1/2
PWM signal out
Basic Timer and Watch-dog Timer
8-bit counter (Basic Timer) + 3-bit counter
(Watch-dog Timer).
Overflow signal from the 8-bit counter can
generate a basic timer interrupt and can be the
input clock for the 3-bit counter.
Overflow signal from the 3-bit counter resets the
system.
I/O Ports
16 programmable I/O ports (7 dedicated I/O pins
only)
Each port pin can be configured individually as
input, output, or functional pin
Interrupts
2
1 interrupt sources including 3 external
Interrupt sources.
H/W interrupt priority logic and vector
generation
Normal or fast interrupt mode (IRQ, FIQ)
Power down mode
IDLE and STOP modes
Division of system clock to reduce the power
(1/1,1/2, 1/8, 1/16 and 1/1024)
Operating Voltage Range
Core: 1.8V ,I/O: 2.73.6V
Operating Frequency Range
up to 80MHz (CPU core, SRAM, and
Peripherals)
up to 40MHz (Flash ROM)
Package Type
64-pin LQFP
S3F443FX (Preliminary Spec)
PRODUCT OVERVIEW
1-3
BLOCK DIAGRAM
I/O Port
Controller
System Manager
Sytem Bus Controller
Bus Arbitration
Bus Interface
ROM/SRAM Controller
UART
Timer 0,1,2,3,4,5
Clock Control
(Power Down)
Basic Timer
& WDT
Interrupt
Controller
Bus
Router
Local Bus
ADDRESS/DATA BUS /
CONTROL SIGNALS
CPU
(ARM7TDMI)
8K-byte
SRAM
256 K-byte
Flash ROM
8bit-PWM
Figure 1-1. S3F443FX Block Diagram
PRODUCT OVERVIEW
S3F443FX (Preliminary Spec)
1-4
PIN ASSIGNMENTS
S3F443FX
(64-LQFP)
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
A4
A5
VDD(3.3V)
VSS(3.3V)
A6
A7
A8
A9
A10
A11
A12/GPIO8
A13/GPIO9
A14/GPIO10/PWM_OUT
A15/GPIO11
A16/GPIO12
A17/GPIO13
D4
D3
D2
D1
D0
EINT0
EINT1
EINT2
TIN/GPIO7
GPIO0
VSS(1.8V)
VDD(1.8V)
GPIO1
GPIO2
GPIO3
GPIO4
A3
A2
A1
A0
nWE
nOE
nCS0
nCS1
nCS2
EXTCLK
VSS(1.8V)
VDD(1.8V)
nWAIT
D7
D6
D5
nTRST
MD0
MD1
nRESET
VDD(1.8V)
VSS(1.8V)
TXD/GPIO14
RXD/GPIO15
TDI
TMS
TCK
TDO
VDD(3.3V)
VSS(3.3V)
GPIO6
GPI05
Figure 1-2. S3F443FX Pin Assignments (64-LQFP)