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Электронный компонент: S3C8440

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S3C8248/C8245/P8245/C8247/C8249/P8249
PRODUCT OVERVIEW
1-1
1
PRODUCT OVERVIEW
S3C8-SERIES MICROCONTROLLERS
Samsung's S3C8 series of 8-bit single-chip CMOS microcontrollers offers a fast and efficient CPU, a wide range
of integrated peripherals, and various mask-programmable ROM sizes. Among the major CPU features are:
-- Efficient register-oriented architecture
-- Selectable CPU clock sources
-- Idle and Stop power-down mode release by interrupt
-- Built-in basic timer with watchdog function
A sophisticated interrupt structure recognizes up to eight interrupt levels. Each level can have one or more
interrupt sources and vectors. Fast interrupt processing (within a minimum of four CPU clocks) can be assigned
to specific interrupt levels.
S3C8248/C8245/P8245/C8247/C8249/P8249 MICROCONTROLLER
The S3C8248/C8245/P8245/C8247/C8249/P8249
single-chip CMOS microcontroller are fabricated
using the highly advanced CMOS process, based on
Samsung's newest CPU architecture.
The S3C8248, S3C8245, S3C8247, S3C8249 are a
microcontroller with a 8K-byte, 16K-byte, 24K-byte.
32K-byte mask-programmable ROM embedded
respectively.
The S3P8245 is a microcontroller with a 16K-byte
one-time-programmable ROM embedded.
The S3P8249 is a microcontroller with a 32K-byte
one-time-programmable ROM embedded.
Using a proven modular design approach, Samsung
engineers have successfully developed the
S3C8248/C8245/P8245/C8247/C8249/P8249 by
integrating the following peripheral modules with the
powerful SAM8 core:
-- Six programmable I/O ports, including five 8-bit
ports and one 5-bit port, for a total of 45 pins.
-- Eight bit-programmable pins for external
interrupts.
-- One 8-bit basic timer for oscillation stabilization
and watchdog functions (system reset).
-- Two 8-bit timer/counter and two 16-bit
timer/counter with selectable operating modes.
-- Watch timer for real time.
-- 8-input A/D converter
-- Serial I/O interface
The S3C8248/C8245/P8245/C8247/C8249/P8249
is versatile microcontroller for camera, LCD and
ADC application, etc. They are currently available in
80-pin TQFP and 80-pin QFP package
OTP
The S3P8245/P8249 are OTP (One Time Programmable) version of the S3C8245/C8249 microcontroller. The
S3P8245 microcontroller has an on-chip 16K-byte one-time-programmable EPROM instead of a masked ROM.
The S3P8249 microcontroller has an on-chip 32K-byte one-time-programmable EPROM instead of a masked
ROM. The S3P8245 is comparable to the S3P8245, both in function and in pin configuration.
The S3P8249 is comparable to the S3P8249, both in function and in pin configuration.
PRODUCT OVERVIEW
S3C8248/C8245/P8245/C8247/C8249/P8249
1-2
FEATURES
Memory
ROM: 32K-byte (S3C8249/P8249)
ROM: 16K-byte (S3C8245/P8245)
RAM: 1056-Byte (S3C8249/P8249, S3C8247)
RAM: 544-Byte (S3C8245/P8245, S3C8248)
Data memory mapped I/O
Oscillation Sources
Crystal, ceramic, RC (main)
Crystal for subsystem clock
Main system clock frequency 1-10 MHz
(3 MHz at 1.8 V, 10 MHz at 2.7 V)
Subsystem clock frequency: 32.768 kHz
CPU clock divider (1/1, 1/2, 1/8, 1/16)
Two Power-Down Modes
Idle (only CPU clock stops)
Stop (System clock stops)
Interrupts
6 level 8 vector 8 internal interrupt
2 level 8 vector 8 external interrupt
45 I/O Pins
45 configurable I/O pins
Basic Timer
Overflow signal makes a system reset.
Watchdog function
8-Bit Timer/Counter A
Programmable 8-bit timer
Interval, capture, PWM mode
Match/capture, overflow interrupt
8-Bit Timer/Counter B
Programmable 8-bit timer
Carrier frequency generator
16-Bit Timer/Counter 0
Programmable 16-bit timer
Match interrupt generates
16-Bit Timer/Counter 1
Programmable 16-bit timer
Interval, capture, PWM mode
Match/capture, overflow interrupt
Watch Timer
Real-time and interval time measurement
Clock generation for LCD
Four frequency outputs for buzzer sound
LCD Controller/Driver
Maximum 16-digit LCD direct drive capability
Display modes: static, 1/2 duty (1/2 bias)
1/3 duty (1/2 or 1/3 bias), 1/4 duty (1/3 bias)
A/D Converter
Eight analog input channels
50
s conversion speed at 1 MHz f
ADC
clock
10-bit conversion resolution
8-Bit Serial I/O Interface
8-bit transmit/receive mode
8-bit receive mode
LSB-first/MSB-first transmission selectable
Internal/external clock source
Voltage Booster
LCD display voltage supply
S/W control en/disable
3.0 V drive
Voltage Detector
Programmable detection voltage
(2.2 V, 2.4 V, 3.0 V, 4.0 V)
En/Disable S/W selectable
Instruction Execution Times
400 ns at 10 MHz (main)
122 us at 32.768 kHz (subsystem)
Operating Temperature Range
-40
C to 85
C
Operating Voltage Range
1.8 V to 5.5 V
Package Type
80-pin QFP
80-pin TQFP
S3C8249's ROM version device
S3C8247 (ROM 24K-byte)
S3C8245's ROM version device
S3C8248 (ROM 8K-byte)
S3C8248/C8245/P8245/C8247/C8249/P8249
PRODUCT OVERVIEW
1-3
BLOCK DIAGRAM
544/1056 Byte
Register File
OSC/
RESET
Basic
Timer
Watch
Timer
I/O Port and Interrupt Control
16/32-Kbyte
ROM
SAM88 RC CPU
8-Bit
Timer/
Counter B
16-Bit
Timer/
Counter 0
16-Bit
Timer/
Counter 1
I/O Port 0
I/O Port 1
A/D
Converter
I/O Port 2
8-Bit
Timer/
Counter A
I/O Port 3
TAOUT/TAPWM/P3.1
TACLK/P3.2
TACAP/P3.3
TBPWM/P3.0
T1CAP/P1.0
T1CLK/P1.1
T1OUT/T1PWM/P1.2
P0.0-P0.7/
INT0-INT7
P1.0-P1.7
AV
REF
AV
SS
P2.0-P2.7/
ADC0-ADC7
LCD
Driver
Serial I/O
Port
P3.0-P3.4
Voltage
Detector
V
VLDREF
I/O Port 5
I/O Port 4
Voltage
Booster
CB
CA
VLC0-VLC2
COM0-COM3
SEG0-SEG15
SEG16-SEG31
SI/P1.7
SO/P1.5
SCK/P1.6
P4.0-P4.7
P5.0-P5.7
RESET
BUZ/P1.4
X
OUT
XT
OUT
X
IN
XT
IN
Figure 1-1. Block Diagram
PRODUCT OVERVIEW
S3C8248/C8245/P8245/C8247/C8249/P8249
1-4
PIN ASSIGNMENT
SEG25/P5.1
SEG24/P5.0
SEG23/P4.7
SEG22/P4.6
SEG21/P4.5
SEG20/P4.4
SEG19/P4.3
SEG18/P4.2
SEG17/P4.1
SEG16/P4.0
SEG15
SEG14
SEG13
SEG12
SEG11
SEG10
SEG26/P5.2
SEG27/P5.3
SEG28/P5.4
SEG29/P5.5
SEG30/P5.6
SEG31/P5.7
P3.0/TBPWM
P3.1/TAOUT/TAPWM
P3.2/TACLK
P3.3/TACAP/SDAT
P3.4/SCLK
V
DD
V
SS
X
OUT
X
IN
TEST
XT
IN
XT
OUT
RESET
P0.0/INT0
P0.1/INT1
P0.2/INT2
P0.3/INT3
P0.4/INT4
S3C8248/C8245
/C8247/C8249
(80-QFP-1420C)
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
25
26
27
28
28
30
31
32
33
34
35
36
37
38
39
40
SEG9
SEG8
SEG7
SEG6
SEG5
SEG4
SEG3
SEG2
SEG1
SEG0
COM3
COM2
COM1
COM0
V
LC2
V
LC1
V
LC0
CA
CB
AV
SS
AV
REF
P2.7/ADC7/V
VLDREF
P2.6/ADC6
P2.5/ADC5
P0.5/INT5
P0.6/INT6
P0.7/INT7
P1.0/T1CAP
P1.1/T1CLK
P1.2/T1OUT/T1PWM
P1.3
P1.4/BUZ
P1.5/SO
P1.6/SCK
P1.7/SI
P2.0/ADC0
P2.1/ADC1
P2.2/ADC3
P2.3/ADC4
P2.4/ADC4
Figure 1-2. S3C8248/C8245/C8247/C8249 Pin Assignments (80-QFP)
S3C8248/C8245/P8245/C8247/C8249/P8249
PRODUCT OVERVIEW
1-5
SEG25/P5.1
SEG24/P5.0
SEG23/P4.7
SEG22/P4.6
SEG21/P4.5
SEG20/P4.4
SEG19/P4.3
SEG18/P4.2
SEG17/P4.1
SEG16/P4.0
SEG15
SEG14
SEG13
SEG12
SEG11
SEG10
SEG9
SEG8
SEG7
SEG6
SEG26/P5.2
SEG27/P5.3
SEG28/P5.4
SEG29/P5.5
SEG30/P5.6
SEG31/P5.7
P3.0/TBPWM
P3.1/TAOUT/TAPWM
P3.2/TACLK
P3.3/TACAP/SDAT
P3.4/SCLK
V
DD
V
SS
X
OUT
X
IN
TEST
XT
IN
XT
OUT
RESET
P0.0/INT0
S3C8248/C8245
/C8247/C8249
(80-TQFP-1212)
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
21
22
23
24
25
26
27
28
28
30
31
32
33
34
35
36
37
38
39
40
SEG5
SEG4
SEG3
SEG2
SEG1
SEG0
COM3
COM2
COM1
COM0
V
LC2
V
LC1
V
LC0
CA
CB
AV
SS
AV
REF
P2.7/ADC7/V
VLDREF
P2.6/ADC6
P2.5/ADC5
P0.1/INT1
P0.2/INT2
P0.3/INT3
P0.4/INT4
P0.5/INT5
P0.6/INT6
P0.7/INT7
P1.0/T1CAP
P1.1/T1CLK
P1.2/T1OUT/T1PWM
P1.3
P1.4/BUZ
P1.5/SO
P1.6/SCK
P1.7/SI
P2.0/ADC0
P2.1/ADC1
P2.2/ADC3
P2.3/ADC4
P2.4/ADC4
Figure 1-3. S3C8248/C8245/C8247/C8249 Pin Assignments (80-TQFP)
PRODUCT OVERVIEW
S3C8248/C8245/P8245/C8247/C8249/P8249
1-6
PIN DESCRIPTIONS
Table 1-1. S3C8248/C8245/C8247/C8249 Pin Descriptions
Pin
Names
Pin
Type
Pin
Description
Circuit
Type
Pin
Numbers
(note)
Share
Pins
P0.0P0.7
I/O
I/O port with bit programmable pins;
Schmitt trigger input or output mode
selected by software; software assignable
pull-up. P0.0P0.7 can be used as inputs
for external interrupts INT0INT7
(with noise filter and interrupt control).
D4
2027
INT0INT7
P1.01.7
I/O
I/O port with bit programmable pins; Input
or output mode selected by software;
Open-drain output mode can be selected
by software; software assignable pull-up.
Alternately P1.0P1.7 can be used as SI,
SO, SCK, BUZ, T1CAP, T1CLK, T1OUT,
T1PWM
E2
28-35
SI, SO, SCK,
BUZ, T1CAP
T1CLK
T1OUT
T1PWM
P2.0P2.7
I/O
I/O port with bit programmable pins;
normal input and AD input or output
mode selected by software; software
assignable pull-up.
F10
F18
3642,
43
ADC0ADC6
V
VLDREF
(ADC7)
P3.0P3.4
I/O
I/O port with bit programmable pins. Input
or push-pull output with software
assignable pull-up. Alternately P3.0P3.3
can be used as TACAP, TACLK, TAOUT,
TAPWM, TBPWM
D2
711
TACAP
TACLK
TAOUT
TAPWM
TBPWM
P4.0P4.7
I/O
I/O port with bit programmable pins.
Push-pull or open drain output and input
with software assignable pull-up.
P4.0P4.7 can alternately be used as
outputs for LCD SEG
H14
7178
SEG16SEG23
P5.0P5.7
I/O
Have the same characteristic as port 4
H14
796
SEG24SEG31
S3C8248/C8245/P8245/C8247/C8249/P8249
PRODUCT OVERVIEW
1-7
Table 1-1. S3C8248/C8245/C8247/C8249 Pin Descriptions (Continued)
Pin
Names
Pin
Type
Pin
Description
Circuit
Type
Pin
Numbers
(note)
Share
Pins
ADC0ADC6
ADC7
I
A/D converter analog input channels
F10
F18
3642
43
P2.0P2.6
P2.7
AV
REF
A/D converter reference voltage
44
AV
SS
A/D converter ground
45
INT0INT7
I
External interrupt input pins
D4
2027
P0.0P0.7
RESET
I
System reset pin
(pull-up resistor: 250 k
)
B
19
TEST
I
0 V: Normal MCU operating
5 V: Test mode
12 V: for OTP writing
16
SDAT, SCLK
O
Serial OTP interface pins; serial data
and clock
D2
10, 11
P3.3, P3.4
V
DD,
V
SS
Power input pins for CPU operation
(internal) and Power input for OTP
Writing
12, 13
X
OUT,
X
IN
Main oscillator pins
14, 15
SCK, SO, SI
I/O
Serial I/O interface clock signal
E2
3335
P1.5P1.7
V
VLDREF
I
Voltage detector reference voltage
input
F18
43
P2.7
TACAP
I
Timer A Capture input
D2
10
P3.3
TACLK
I
Timer A External clock input
D2
9
P3.2
TAOUT/TAPWM
O
Timer A output and PWM output
D2
8
P3.1
TBPWM
O
Timer B PWM output
D2
7
P3.0
T1CAP
I
Timer 1 Capture input
E2
28
P1.0
T1CLK
I
Timer 1 External clock input
E2
29
P1.1
T1OUT/T1PWM
O
Timer 1 output and PWM output
E2
30
P1.2
COM0COM3
O
LCD common signal output
H
5154
SEG0SEG15
O
LCD segment output
H
5570
SEG16SEG23
O
LCD segment output
H14
7178
P4.0P4.7
SEG24SEG31
O
LCD Segment output
H14
796
P5.0P5.7
V
LC0
V
LC2
O
LCD power supply
4850
BUZ
O
0.5, 1, 2 or 4 kHz frequency output for
buzzer sound with 4.19 MHz main
system clock or 32768 Hz subsystem
clock
E2
32
P1.4
CA, CB
Capacitor terminal for voltage booster
4647
PRODUCT OVERVIEW
S3C8248/C8245/P8245/C8247/C8249/P8249
1-8
PIN CIRCUITS
In
V
DD
Figure 1-4. Pin Circuit Type B (
RESET
RESET
)
P-Channel
N-Channel
V
DD
Out
Output
Disable
Data
Figure 1-5. Pin Circuit Type C
P-Channel
I/O
Output
Disable
Data
Circuit
Type C
Pull-up
Enable
V
DD
Figure 1-6. Pin Circuit Type D-2 (P3)
I/O
Output
Disable
Data
Pin Circuit
Type C
Pull-up
Enable
V
DD
Noise
Filter
Ext.INT
Input
Normal
V
DD
Figure 1-7. Pin Circuit Type D-4 (P0)
S3C8248/C8245/P8245/C8247/C8249/P8249
PRODUCT OVERVIEW
1-9
V
DD
Output
Disable
Data
Pull-up
Resistor
V
DD
I/O
P-CH
N-CH
Schmitt Trigger
Open drain
Enable
Figure 1-8. Pin Circuit Type E-2 (P1)
Pull-up
Enable
Circuit
Type C
Data
Output
Disable
ADCEN
To ADC
Data
V
DD
I/O
Figure 1-9. Pin Circuit Type F-10 (P2.0P2.6)
Pull-up
Enable
Circuit
Type C
Data
Output
Disable
ADC & VLD
Enable
Data
To ADC
VLD
REF
I/O
V
DD
Figure 1-10. Pin Circuit Type F-18 (P2.7/VLD
REF
)
Out
V
LC1
SEG/
COM
V
LC0
V
LC2
Figure 1-11. Pin Circuit Type H (SEG/COM)
PRODUCT OVERVIEW
S3C8248/C8245/P8245/C8247/C8249/P8249
1-10
SEG
V
LC2
V
LC1
V
LC0
Output
Disable
Figure 1-12. Pin Circuit Type H-4
V
DD
Open Drain EN
Data
LCD Out EN
SEG
Output
Disable
Pull-up
Enable
V
DD
Circuit
Type H-4
Figure 1-13. Pin Circuit Type H-14 (P4, P5)
S3C8248/C8245/P8245/C8247/C8249/P8249
ELECTRICAL DATA
19-1
19
ELECTRICAL DATA
OVERVIEW
In this chapter, S3C8248/C8245/C8247/C8249 electrical characteristics are presented in tables and graphs.
The information is arranged in the following order:
-- Absolute maximum ratings
-- Input/output capacitance
-- D.C. electrical characteristics
-- A.C. electrical characteristics
-- Oscillation characteristics
-- Oscillation stabilization time
-- Data retention supply voltage in stop mode
-- Serial I/O timing characteristics
-- A/D converter electrical characteristics
ELECTRICAL DATA
S3C8248/C8245/P8245/C8247/C8249/P8249
19-2
Table 19-1. Absolute Maximum Ratings
(T
A
= 25
C)
Parameter
Symbol
Conditions
Rating
Unit
Supply voltage
V
DD
0.3 to +6.5
V
Input voltage
V
I
0.3 to V
DD
+ 0.3
Output voltage
V
O
0.3 to V
DD
+ 0.3
Output current high
I
OH
One I/O pin active
18
mA
All I/O pins active
60
Output current low
I
OL
One I/O pin active
+ 30
Total pin current for port
+ 100
Operating temperature
T
A
40 to + 85
C
Storage temperature
T
STG
65 to + 150
Table 19-2. D.C. Electrical Characteristics
(T
A
= -40
C to + 85
C, V
DD
= 1.8 V to 5.5 V)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Operating voltage
V
DD
f
CPU
= 10 MHz
2.7
5.5
V
f
CPU
= 3 MHz
1.8
5.5
Input high voltage
V
IH1
All input pins except V
IH2
0.8 V
DD
V
DD
V
IH2
X
IN
,
XT
IN
V
DD
-0.1
Input low voltage
V
IL1
All input pins except V
IL2
0.2 V
DD
V
IL2
X
IN
,
XT
IN
0.1
S3C8248/C8245/P8245/C8247/C8249/P8249
ELECTRICAL DATA
19-3
Table 19-2. D.C. Electrical Characteristics (Continued)
(T
A
= -40
C to + 85
C, V
DD
= 1.8 V to 5.5 V)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Output high voltage
V
OH
V
DD
= 5 V; I
OH
= -1 mA
All output pins
V
DD
1.0
V
Output low voltage
V
OL
V
DD
= 5 V; I
OL
= 2 mA
All output pins
0.4
Input high leakage
current
I
LIH1
V
IN
= V
DD
All input pins except I
LIH2
3
uA
I
LIH2
V
IN
= V
DD,
X
IN
,
XT
IN
20
Input low leakage
current
I
LIL1
V
IN
= 0 V
All input pins except I
LIL2
-3
I
LIL2
V
IN
= 0 V, X
IN
,
XT
IN
,
RESET
-20
Output high
leakage current
I
LOH
V
OUT
= V
DD
All I/O pins and output pins
3
Output low leakage
current
I
LOL
V
OUT
= 0 V
All I/O pins and output pins
-3
Oscillator feed
back resistors
R
osc1
V
DD
= 5.0 V T
A
= 25
C
X
IN
= V
DD
, X
OUT
= 0 V
800
1000
1200
k
Pull-up resistor
R
L1
V
IN
= 0 V; V
DD
= 5 V
10 %
Port 0,1,2,3,4,5 T
A
= 25
C
25
50
100
R
L2
V
IN
= 0 V; V
DD
= 5 V
10%
T
A
=25
C, RESET only
110
210
310
V
LC0
out voltage
(Booster run mode)
V
LC0
T
A
= 25
C, (1/3 bias mode)
0.9
1.0
1.1
V
T
A
= 25
C, (1/2 bias mode)
1.4
1.5
1.7
V
LC1
out voltage
(Booster run mode)
V
LC1
T
A
= 25
C (1/2 and 1/3
bias mode)
2V
LC0
- 0.1
2V
LC0
+
0.1
V
LC2
out voltage
(Booster run mode)
V
LC2
T
A
= 25
C (1/3 bias mode)
3V
LC0
- 0.1
3V
LC0
+
0.1
COM output
voltage deviation
V
DC
V
DD
= V
LC2
= 3 V
(V
LCD
-COMi)
IO =
15
A (i = 0-3)
60
120
mV
SEG output
voltage deviation
V
Ds
V
DD
= V
LC2
= 3 V
(V
LCD
-SEGi)
IO =
15
A (i = 0-31)
60
120
ELECTRICAL DATA
S3C8248/C8245/P8245/C8247/C8249/P8249
19-4
Table 19-2. D.C. Electrical Characteristics (Concluded)
(T
A
= -40
C to + 85
C, V
DD
= 1.8 V to 5.5 V)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Supply current
(1)
I
DD1
(2)
V
DD
= 5 V
10 %
10 MHz crystal oscillator
12
25
mA
3 MHz crystal oscillator
4
10
V
DD
= 3 V
10 %
10 MHz crystal oscillator
3
8
3 MHz crystal oscillator
1
5
I
DD2
Idle mode: V
DD
= 5 V
10 %
10 MHz crystal oscillator
3
10
3 MHz crystal oscillator
1.5
4
Idle mode: V
DD
= 3 V
10 %
10 MHz crystal oscillator
1.2
3
3 MHz crystal oscillator
0.5
1.5
I
DD3
Sub operating: main-osc stop
V
DD
= 3 V
10 %
32768 Hz crystal oscillator
20
40
uA
I
DD4
Sub idle mode: main-osc stop
V
DD
= 3 V
10 %
32768 Hz crystal oscillator
7
14
I
DD5
Main stop mode : sub-osc
stop V
DD
= 5 V
10 %
1
3
V
DD
= 3 V
10 %
0.5
2
NOTES:
1.
Supply current does not include current drawn through internal pull-up resistors or external output current loads.
2.
I
DD1
and I
DD2
include a power consumption of subsystem oscillator.
3. I
DD3
and I
DD4
are the current when the main system clock oscillation stop and the subsystem clock is used.
And does not include the LCD and Voltage booster and voltage level detector
4.
I
DD5
is the current when the main and subsystem clock oscillation stop.
5.
Voltage booster's operating voltage range is 2.0 V to 5.5 V. The range of 1.8 V to 2.0 V could be referenced
in page 17-4.
S3C8248/C8245/P8245/C8247/C8249/P8249
ELECTRICAL DATA
19-5
In case of S3C8248/C8245, the characteristic of V
OH
and V
OL
is differ with the characteristic of S3C8247/C8249
like as following. Other characteristics are same each other.
Table 19-3. D.C Electrical Characteristics of S3C8248/C8245
(T
A
= -40
C to +85
C, V
DD
= 1.8 V to 5.5 V)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Output high voltage
V
OH1
V
DD
= 5 V; I
OH
= -1 mA
All output pins except V
OH2
V
DD
-1.0
V
V
OH2
V
DD
= 5 V; I
OH
= -6 mA
Port 3.0 only in S3C8248/C8245
V
DD
-0.7
Output low voltage
V
OL1
V
DD
= 5 V; I
OL
= 2 mA
All output pins except V
OL2
0.4
V
OL2
V
DD
= 5 V; I
OH
= 12 mA
Port 3.0 only in S3C8248/C8245
0.7
ELECTRICAL DATA
S3C8248/C8245/P8245/C8247/C8249/P8249
19-6
Table 19-4. A.C. Electrical Characteristics
(T
A
= -40
C to +85
C, V
DD
= 1.8 V to 5.5 V)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Interrupt input
high, low width
(P0.0P0.7)
tINTH,
tINTL
P0.0P0.7, V
DD
= 5 V
200
ns
RESET input low
width
tRSL
V
DD
= 5 V
1
us
NOTE: User must keep more large value then min value.
t
TIH
t
TIL
0.8 V
DD
0.2 V
DD
0.2 V
DD
Figure 19-1. Input Timing for External Interrupts (Ports 0)
t
RSL
0.2 V
DD
RESET
Figure 19-2. Input Timing for RESET
S3C8248/C8245/P8245/C8247/C8249/P8249
ELECTRICAL DATA
19-7
Table 19-5. Input/Output Capacitance
(T
A
= -40
C to +85
C, V
DD
=
0 V )
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Input
capacitance
C
IN
f = 1 MHz; unmeasured pins
are returned to V
SS
10
pF
Output
capacitance
C
OUT
I/O capacitance
C
IO
Table 19-6. Data Retention Supply Voltage in Stop Mode
(T
A
= -40
C to + 85
C)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Data retention
supply voltage
V
DDDR
2
5.5
V
Data retention
supply current
I
DDDR
V
DDDR
= 2 V
3
uA
Execution of
STOP Instrction
RESET
Occurs
~ ~
V
DDDR
~ ~
Stop Mode
Oscillation
Stabilization
Time
Normal
Operating Mode
Data Retention Mode
t
WAIT
RESET
V
DD
NOTE:
t
WAIT
is the same as 4096 x 16 x 1/fxx
0.2 V
DD
Figure 19-3. Stop Mode Release Timing Initiated by RESET
ELECTRICAL DATA
S3C8248/C8245/P8245/C8247/C8249/P8249
19-8
Execution of
STOP Instruction
~ ~
V
DDDR
~ ~
Stop Mode
Idle Mode
Data Retention Mode
t
WAIT
V
DD
Interrupt
Normal
Operating Mode
Oscillation
Stabilization Time
0.2 V
DD
NOTE:
t
WAIT
is the same as 4096 x 16 x BT clock
Figure 19-4. Stop Mode (Main) Release Timing Initiated by Interrupts
Execution of
STOP Instruction
~ ~
V
DDDR
~ ~
Stop Mode
Idle Mode
Data Retention Mode
t
WAIT
V
DD
Interrupt
Normal
Operating Mode
Oscillation
Stabilization Time
0.2 V
DD
NOTE:
When the case of select the fxx/128 for basic timer input
clock before enter the stop mode.
tWAIT = 128 x 16 x (1/32768) = 62.5 ms
Figure 19-5. Stop Mode (Sub) Release Timing Initiated by Interrupts
S3C8248/C8245/P8245/C8247/C8249/P8249
ELECTRICAL DATA
19-9
Table 19-7. A/D Converter Electrical Characteristics
(T
A
= - 40
C to +85
C, V
DD
= 1.8 V to 5.5 V, V
SS
= 0 V)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Resolution
10
bit
Total accuracy
V
DD
= 5 V
AV
REF
= 5 V
AV
SS
= 0 V
3
LSB
Integral Linearity
Error
ILE
2
Differential Linearity
Error
DLE
1
Offset Error of Top
EOT
1
3
Offset Error of
Bottom
EOB
0.5
2
Conversion time
(1)
t
CON
40
fxx
Analog input voltage
V
IAN
AV
SS
AV
REF
V
Analog input
impedance
R
AN
2
1000
Mohm
Analog reference
voltage
AV
REF
2.5
V
DD
V
Analog ground
AV
SS
V
SS
V
SS
+ 0.3
Analog input current
I
ADIN
AV
REF
= V
DD
= 5 V
10
uA
Analog block
current
(2)
I
ADC
AV
REF
= V
DD
= 5 V
1
3
mA
AV
REF
= V
DD
= 3 V
0.5
1.5
AV
REF
= V
DD
= 5 V
When power down mode
100
500
nA
NOTES:
1.
'Conversion time' is the time required from the moment a conversion operation starts until it ends.
2.
IADC is an operating current during A/D conversion.
ELECTRICAL DATA
S3C8248/C8245/P8245/C8247/C8249/P8249
19-10
Table 19-8. Synchronous SIO Electrical Characteristics
(T
A
= -40
C to +85
C, V
DD
= 1.8 V to 5.5 V, V
SS
= 0 V, fxx = 10 MHz oscillator)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
SCK Cycle time
t
CYC
200
ns
Serial Clock High Width
t
SCKH
60
Serial Clock Low Width
t
SCKL
60
Serial Output data delay
time
t
OD
50
Serial Input data setup
time
t
ID
40
Serial Input data Hold
time
t
IH
100
Output Data
Input Data
SCK
t
SCKH
t
CYC
t
SCKL
0.8 V
DD
0.2 V
DD
t
OD
t
ID
t
IH
0.8 V
DD
0.2 V
DD
SI
SO
Figure 19-6. Serial Data Transfer Timing
S3C8248/C8245/P8245/C8247/C8249/P8249
ELECTRICAL DATA
19-11
Table 19-9. Main Oscillator Frequency (f
OSC1
)
(T
A
= -40
C to +85
C, V
DD
= 1.8 V to 5.5 V)
Oscillator
Clock Circuit
Test Condition
Min
Typ
Max
Unit
Crystal
X
IN
C1
C2
X
OUT
Crystal oscillation frequency
1
10
MHz
Ceramic
X
IN
C1
C2
X
OUT
Ceramic oscillation
frequency
1
10
MHz
External clock
X
IN
X
OUT
X
IN
input frequency
1
10
MHz
RC
X
IN
X
OUT
R
r = 35 k
, V
DD
= 5 V
2
MHz
Table 19-10. Main Oscillator Clock Stabilization Time (t
ST1
)
(T
A
= -40
C to +85
C, V
DD
= 4.5 V to 5.5 V)
Oscillator
Test Condition
Min
Typ
Max
Unit
Crystal
V
DD
= 4.5 V to 5.5 V
10
ms
Ceramic
Stabilization occurs when V
DD
is equal to the minimum
oscillator voltage range.
4
ms
External clock
X
IN
input high and low level width (t
XH
, t
XL
)
50
ns
NOTE: Oscillation stabilization time (tST1) is the time required for the CPU clock to return to its normal oscillation
frequency after a power-on occurs, or when Stop mode is ended by a RESET signal.
The
RESET
should therefore be held at low level until the tST1 time has elapsed
ELECTRICAL DATA
S3C8248/C8245/P8245/C8247/C8249/P8249
19-12
X
IN
t
XL
t
XH
1 /
f
OSC1
V
DD
0.5
V
0.4
V
Figure 19-7. Clock Timing Measurement at X
IN
Table 19-11. Sub Oscillator Frequency (f
OSC2
)
(T
A
= -40
C + 85
C, V
DD
= 1.8 V to 5.5 V)
Oscillator
Clock Circuit
Test Condition
Min
Typ
Max
Unit
Crystal
C1
C2
XT
IN
XT
OUT
R
Crystal oscillation frequency
C1 = 22 pF, C2 = 33 pF
R = 39 K
XT
IN
and XT
OUT
are connected
with R and C by soldering.
32
32.768
35
kHz
Table 19-12. Sub Oscillator(crystal) Stabilization Time (t
ST2
)
(T
A
= 25
C)
Oscillator
Test Condition
Min
Typ
Max
Unit
normal mode
V
DD
= 4.5 V to 5.5 V
250
500
ms
V
DD
= 1.8 V to 3.0 V
2
s
strong mode
V
DD
= 4.5 V to 5.5 V
2
s
V
DD
= 1.8 V to 3.0 V
250
500
ms
NOTE: Oscillation stabilization time (t
ST2
) is the time required for the oscillator to it's normal oscillation when stop mode is
released by interrupts. The value Typ and Max are measured by buzzer output signal after stop release.
For example in voltage range of 4.5 V to 5.5 V of normal mode, we can see the buzzer output signal within 400 ms
at our test condition.
S3C8248/C8245/P8245/C8247/C8249/P8249
ELECTRICAL DATA
19-13
10 MHz
f
CPU
3 MHZ
1 MHz
1
2
3
4
5
6
7
Supply Voltage (V)
Minimum instruction clock = 1/4 x oscillator frequency
5.5
8 MHZ
2.7
1.8
A
B
Figure 19-8. Operating Voltage Range
S3C8248/C8245/P8245/C8247/C8249/P8249
MECHANICAL DATA
20-1
20
MECHANICAL DATA
OVERVIEW
The S3C8248/C8245/C8247/C8249 microcontroller is currently available in 80-pin-QFP/TQFP package.
80-QFP-1420C
#80
20.00
0.20
23.90
0.30
14.00
0.20
17.90
0.30
#1
0.80
0.35
+ 0.10
NOTE: Dimensions are in millimeters.
0.15 MAX
(0.80)
0.15
+ 0.10
- 0.05
0-8
0.10 MAX
0.80
0.20
0.05 MIN
2.65
0.10
3.00 MAX
0.80
0.20
Figure 20-1. Package Dimensions (80-QFP-1420C)
MECHANICAL DATA
S3C8248/C8245/P8245/C8247/C8249/P8249
20-2
80-TQFP-1212
#80
12.00 BSC
14.00 BSC
12.00 BSC
14.00 BSC
0.09-0.20
0-7
NOTE: Dimensions are in millimeters.
#1
(1.25)
0.50
0.60
0.15
0.05-0.15
1.00
0.05
1.20 MAX
0.17-0.27
0.08 MAX M
Figure 20-2. Package Dimensions (80-TQFP-1212)
S3C8248/C8245/P8245/C8247/C8249/P8249
S3P8245/P8249 OTP
21-1
21
S3P8245/P8249 OTP
OVERVIEW
The S3P8245/P8249 single-chip CMOS microcontroller is the OTP (One Time Programmable)
version of the
S3C8248/C8245/C8247/C8249 microcontroller. It has an on-chip OTP ROM instead of a masked ROM. The
EPROM is accessed by serial data format.
The S3P8245/P8249 is fully compatible with the S3C8248/C8245/C8247/C8249, both in function and in pin
configuration. Because of its simple programming requirements, the S3P8245/P8249 is ideal as an evaluation
chip for the S3C8248/C8245/C8247/C8249.
S3P8245/P8249 OTP
S3C8248/C8245/P8245/C8247/C8249/P8249
21-2
SEG25/P5.1
SEG24/P5.0
SEG23/P4.7
SEG22/P4.6
SEG21/P4.5
SEG20/P4.4
SEG19/P4.3
SEG18/P4.2
SEG17/P4.1
SEG16/P4.0
SEG15
SEG14
SEG13
SEG12
SEG11
SEG10
P0.5/INT5
P0.6/INT6
P0.7/INT7
P1.0/T1CAP
P1.1/T1CLK
P1.2//T1OUT/T1PWM
P1.3
P1.4/BUZ
P1.5/SIO
P1.6/SCK
P1.7/SI
P2.0/ADC0
P2.1/ADC1
P2.2/ADC2
P2.3/ADC3
P2.4/ADC4
SEG9
SEG8
SEG7
SEG6
SEG5
SEG4
SEG3
SEG2
SEG1
SEG0
COM3
COM2
COM1
COM0
VLC2
VLC1
VLC0
CA
CB
AV
SS
AV
REF
P2.7/ADC7/V
VLDREF
P2.6/ADC6
P2.5/ADC5
SEF26/P5.2
SEG27/P5.3
SEG28/P5.4
SEG29/P5.5
SEG30/P5.6
SEG31/P5.7
P3.0/TBPWM
P3.1/TAOUT/TAPWM
P3.2/TACLK
P3.3/TACAP/SDAT
P3.4/SCLK
V
DD
V
SS
X
OUT
X
IN
V
PP
/TEST
XT
IN
XT
OUT
RESET
P0.0/INT0
P0.1/INT1
P0.2/INT2
P0.3/INT3
P0.4/INT4
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
S3P8245/P8249
80-QFP
(Top View)
Figure 21-1. Pin Assignments (80-QFP)
S3C8248/C8245/P8245/C8247/C8249/P8249
S3P8245/P8249 OTP
21-3
Table 21-1. Descriptions of Pins Used to Read/Write the EPROM
Main Chip
During Programming
Pin Name
Pin Name
Pin No.
I/O
Function
P2.0
SDAT
10
I/O
Serial data pin. Output port when reading and
input port when writing. Can be assigned as a
Input/push-pull output port.
P2.1
SCLK
11
I
Serial clock pin. Input only pin.
V
PP
TEST
16
I
Power supply pin for EPROM cell writing
(indicates that OTP enters into the writing mode).
When 12.5 V is applied, OTP is in writing mode
and when 5 V is applied, OTP is in reading
mode. (Option)
RESET
RESET
19
I
Chip Initialization
V
DD
/V
SS
V
DD
/V
SS
12/13
Logic power supply pin. V
DD
should be tied to
+5 V during programming.
Table 21-2. Comparison of S3P8245/P8249 and S3C8248/C8245/C8247/C8249 Features
Characteristic
S3P8245/P8249
S3C8248/C8245/C8247/C8249
Program Memory
16K/32K-byte EPROM
16K/32K-byte mask ROM
Operating Voltage (V
DD
)
1.8 V to 5.5 V
1.8 V to 5.5 V
OTP Programming Mode
V
DD
= 5 V, V
PP
(TEST) = 12.5 V
Pin Configuration
80-QFP/80-TQFP
80-QFP/80-TQFP
EPROM Programmability
User Program 1 time
Programmed at the factory
S3P8245/P8249 OTP
S3C8248/C8245/P8245/C8247/C8249/P8249
21-4
OPERATING MODE CHARACTERISTICS
When 12.5 V is supplied to the V
PP
(TEST) pin of the S3P8245/P8249, the EPROM programming mode is
entered. The operating mode (read, write, or read protection) is selected according to the input signals to the pins
listed in Table 21-3 below.
Table 21-3. Operating Mode Selection Criteria
V
DD
V
PP
(TEST)
REG/
MEM
MEM
Address(A15A0)
R/W
Mode
5 V
5 V
0
0000H
1
EPROM read
12.5 V
0
0000H
0
EPROM program
12.5 V
0
0000H
1
EPROM verify
12.5 V
1
0E3FH
0
EPROM read protection
NOTE: "0" means Low level; "1" means High level.
Table 21-4. D.C Electrical Characteristics
(T
A
= -40
C to +85
C, V
DD
= 1.8 V to 5.5 V)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Operating voltage
V
DD
f
CPU
= 10 MHz
2.7
5.5
V
All input pins except V
IH2, 3
1.8
5.5
Input high
V
IH1
Port 4,5 V
LCD2
V
DD
0.8 V
DD
V
DD
voltage
V
IH2
X
IN
, XT
IN
0.8 V
DD
V
DD
V
IH3
All input pins except V
IL2
V
DD
- 0.1
V
DD
Input low voltage
V
IL1
X
IN
, XT
IN
0.2 V
DD
V
IL2
V
DD
= 5 V; I
OH
= -1 mA
All output pins
0.1
Output high voltage
V
OH
V
DD
= 5 V; I
OL
= 2 mA
All output pins
V
DD
-1.0
Output low voltage
V
OL
0.4
S3C8248/C8245/P8245/C8247/C8249/P8249
S3P8245/P8249 OTP
21-5
Table 21-4. D.C. Electrical Characteristics (Continued)
(T
A
= -40
C to +85
C, V
DD
= 1.8 V to 5.5 V)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Input high leakage
current
I
LIH1
V
IN
= V
DD
All input pins except I
LIH2
3
I
LIH2
V
IN
= V
DD
X
IN
,
XT
IN
20
Input low leakage
current
I
LIL1
V
IN
= 0 V
All input pins except I
LIL2
-3
I
LIL2
V
IN
= 0 V
X
IN
,
XT
IN
,
RESET
-20
uA
Output high
leakage current
I
LOH
V
OUT
= V
DD
All I/O pins and Output pins
3
Output low leakage
current
I
LOL
V
OUT
= 0 V
All I/O pins and Output pins
-3
Oscillator feed
back resistors
R
osc1
V
DD
= 5.0 V T
A
= 25
C
X
IN
= V
DD
, X
OUT
= 0 V
800
1000
1200
k
Pull-up resistor
R
L1
V
IN
= 0 V; V
DD
= 5 V
10 %
Port 0,1,2,3,4,5 T
A
= 25
C
25
50
100
R
L2
V
IN
= 0 V; V
DD
= 5 V
10%
T
A
=25
C, RESET only
110
210
310
V
LC0
out voltage
(Booster run mode)
V
LC0
T
A
= 25
C (1/3 bias mode)
0.9
1.0
1.1
V
T
A
= 25
C (1/2 bias mode)
1.4
1.5
1.7
V
LC1
out voltage
(Booster run mode)
V
LC1
T
A
= 25
C
2V
LC0
- 0.1
2V
LC0
+
0.1
V
LC2
out voltage
(Booster run mode)
V
LC2
T
A
= 25
C
3V
LC0
- 0.1
3V
LC0
+
0.1
COM output
voltage deviation
V
DC
V
DD
= V
LC2
= 3 V
(V
LC
-COMi)
IO =
15
A (1 = 03)
60
120
mV
SEG output
voltage deviation
V
Ds
V
DD
= V
LC2
= 3 V
(V
LC
-COMi)
IO =
15
A (1 = 03)
60
120
S3P8245/P8249 OTP
S3C8248/C8245/P8245/C8247/C8249/P8249
21-6
Table 21-4. D.C. Electrical Characteristics (Concluded)
(T
A
= -40
C to + 85
C, V
DD
= 1.8 V to 5.5 V)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Supply current
(1)
I
DD1
(2)
V
DD
= 5 V
10 %
10 MHz crystal oscillator
12
25
mA
3 MHz crystal oscillator
4
10
V
DD
= 3 V
10 %
10 MHz crystal oscillator
3
8
3 MHz crystal oscillator
1
5
I
DD2
Idle mode: V
DD
= 5 V
10 %
10 MHz crystal oscillator
3
10
3 MHz crystal oscillator
1.5
4
Idle mode: V
DD
= 3 V
10 %
10 MHz crystal oscillator
1.2
3
3 MHz crystal oscillator
0.5
1.5
I
DD3
Sub operating: main-osc stop
V
DD
= 3 V
10 %
32768 Hz crystal oscillator
20
40
uA
I
DD4
Sub idle mode: main-osc stop
V
DD
= 3 V
10 %
32768 Hz crystal oscillator
7
14
I
DD5
Main stop mode : sub-osc
stop V
DD
= 5 V
10 %
1
3
V
DD
= 3 V
10 %
0.5
2
NOTES:
1.
Supply current does not include current drawn through internal pull-up resistors or external output current loads.
2.
I
DD
and I
DD2
include a power consumption of subsystem oscillator.
3. I
DD3
and I
DD4
are the current when the main system clock oscillation stop and the subsystem clock is used.
4.
I
DD5
is the current when the main and subsystem clock oscillation stop.
S3C8248/C8245/P8245/C8247/C8249/P8249
S3P8245/P8249 OTP
21-7
case of S3P8245, the characteristic of V
OH
and V
OL
is differ with the characteristic of S3P8249 like as bellow.
Other characteristics are same each other.
Table 21-5. D.C Electrical Characteristics of S3C8248/C8245
(T
A
= -40
C to +85
C, V
DD
= 1.8 V to 5.5 V)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Output high voltage
V
OH1
V
DD
= 5 V; I
OH
= -1 mA
All output pins except V
OH2
V
DD
-1.0
V
V
OH2
V
DD
= 5 V; I
OH
= -6 mA
Port 3.0 only in S3P8245
V
DD
-0.7
Output low voltage
V
OL1
V
DD
= 5 V; I
OL
= 2 Ma
All output pins except V
OL2
0.4
V
OL2
V
DD
= 5 V; I
OH
= 12 mA
Port 3.0 only in S3P8245
0.7
S3P8245/P8249 OTP
S3C8248/C8245/P8245/C8247/C8249/P8249
21-8
10 MHz
f
CPU
3 MHZ
1 MHz
1
2
3
4
5
6
7
Supply Voltage (V)
Minimum instruction clock = 1/4 x oscillator frequency
5.5
8 MHZ
2.7
1.8
A
B
Figure 21-2. Operating Voltage Range