Document Outline
- CONTENTS
- CH1. OVERVIEW
- CH2. SROM
- CH3. SDRAM
- CH4. NAND FLASH
- CH5. BUS MATRIX
- CH6. INTERRUPT
- CH7. PWM TIMER
- CH8. WATCHDOG TIMER
- CH9. DMA
- CH10. RTC
- CH11. UART
- CH12. IRDA
- CH13. IIC
- CH14. IIS
- CH15. SPI
- CH16. AC97
- CH17. USB HOST
- CH18. USB DEVICE
- CH19. MODEM I/F
- CH20. GPIO
- CH21. CAMERA I/F
- CH22. MPEG-4 OVERVIEW
- CH23. MPEG-4 ME
- CH24. MPEG-4 MC
- CH25. MPEG-4 DCTQ
- CH26. VLX
- CH27. POST PROCESSOR
- CH28. LCD
- CH29. KEY PAD I/F
- CH30. ADC & TOUCH
- CH31. SDIO
- CH32. MEMORY STICK
- CH33. CLOCK & POWER
- CH34. MECHANICAL DATA
S3C24A0A
32-BIT RISC
MICROPROCESSOR
USER'S MANUAL
Revision 0.4
(Preliminary)
Important Notice
The information in this publication has been carefully
checked and is believed to be entirely accurate at
the time of publication. Samsung assumes no
responsibility, however, for possible errors or
omissions, or for any consequences resulting from
the use of the information contained herein.
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products or product specifications with the intent to
improve function or design at any time and without
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under the patent rights of Samsung or others.
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and all liability, including without limitation any
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S3C24A0A 32-Bit RISC Microprocessor
User's Manual, Revision 0.4
Publication Number: 20-S3-CS3C24A0A-112004
2004 Samsung Electronics
All rights reserved. No part of this publication may be reproduced, stored in a retrieval system, or transmitted in
any form or by any means, electric or mechanical, by photocopying, recording, or otherwise, without the prior
written consent of Samsung Electronics.
Samsung Electronics'
microcontroller business has been awarded full ISO-14001
certification (BVQ1 Certificate No. 9330). All semiconductor products are designed
and manufactured in accordance with
the highest quality standards and objectives.
Samsung Electronics Co., Ltd.
San #24 Nongseo-Ri, Giheung- Eup
Yongin-City, Gyeonggi-Do, Korea
C.P.O. Box #37, Suwon 449-900
TEL: (82)-(031)-209-1490
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Home-Page URL: Http://www.samsungsemi.com/
Printed in the Republic of Korea
S3C24A0A MICROPROCESSOR
iii
Table of Contents
Chapter 1
Product Overview
Architectural Overview ..................................................................................................................................1-1
Features................................................................................................................................................1-2
Microprocessor and Overall Architecture .............................................................................................1-2
Memory Subsystem ..............................................................................................................................1-2
General Peripherals..............................................................................................................................1-3
Serial Communication ..........................................................................................................................1-3
Parallel Communication........................................................................................................................1-4
Image and Video Processing................................................................................................................1-4
Display Control .....................................................................................................................................1-6
Input Devices ........................................................................................................................................1-6
Storage Devices ...................................................................................................................................1-7
System Management............................................................................................................................1-7
Electrical Characteristics ......................................................................................................................1-7
Package................................................................................................................................................1-7
Pin Assignment.....................................................................................................................................1-9
Pin Descriptions ............................................................................................................................................1-30
I/O Signal Descriptions .........................................................................................................................1-30
Address MAP ................................................................................................................................................1-38
Address Space Assignment Overview .................................................................................................1-38
Device Specific Address Space............................................................................................................1-39
Internal Registers..................................................................................................................................1-42
Important Notes About S3C24A0A Special Registers .........................................................................1-62
Chapter 2
SROM Controller
Overview........................................................................................................................................................2-1
Feature .................................................................................................................................................2-2
Block Diagram ......................................................................................................................................2-2
Function Description.............................................................................................................................2-3
Programmable Access Cycle Write to Read Waveform.......................................................................2-5
Special Function Registers ...........................................................................................................................2-6
Srom Bus Width & Wait Contrl Register(SROM_BW)..........................................................................2-6
Srom Bank Control Register (SROM_BC: XrCSn0 ~ XrCSn2)............................................................2-7
iv
S3C24A0A
MICROPROCESSOR
Table of Contents
(Continued)
Chapter 3
SDRAM Controller
Overview....................................................................................................................................................... 3-1
Selection of SDRAM ..................................................................................................................................... 3-2
Selection of SDRAM ..................................................................................................................................... 3-2
SELF Refresh....................................................................................................................................... 3-2
SDRAM Initialization Sequence........................................................................................................... 3-3
SDRAM Configuration Register.................................................................................................................... 3-6
SDRAM Control Register ..................................................................................................................... 3-7
Refresh Control Register ..................................................................................................................... 3-8
Chapter 4
NAND Flash Controller
Overview....................................................................................................................................................... 4-1
Features ............................................................................................................................................... 4-1
Pin Configuration ................................................................................................................................. 4-2
Block Diagram .............................................................................................................................................. 4-3
Boot Loader Function ................................................................................................................................... 4-4
Auto Load Mode ........................................................................................................................................... 4-6
Auto Load Programming Guide ........................................................................................................... 4-6
Auto Store Mode........................................................................................................................................... 4-7
Auto Store Programming Guide........................................................................................................... 4-7
Software Mode.............................................................................................................................................. 4-8
Stepping Stone (4K-Byte SRAM) ................................................................................................................. 4-9
Error Correction Code .................................................................................................................................. 4-9
ECC Module Features ......................................................................................................................... 4-10
ECC Programming Guide .................................................................................................................... 4-10
NAND Flash Memory Configurations ........................................................................................................... 4-11
NAND Flash Controller Special Registers.................................................................................................... 4-13
Configuration Register ......................................................................................................................... 4-13
Control Register ................................................................................................................................... 4-14
Command Register .............................................................................................................................. 4-15
Address Register ................................................................................................................................. 4-15
Main Data Area ECC0 Register........................................................................................................... 4-16
Main Data Area ECC1 Register........................................................................................................... 4-16
Main Data Area ECC2 Register........................................................................................................... 4-16
Main Data Area ECC3 Register........................................................................................................... 4-17
Spare Area ECC0 Register................................................................................................................. 4-17
Spare Area ECC1 Register.................................................................................................................. 4-17
Control Status Register........................................................................................................................ 4-18
ECC0 Status Register.......................................................................................................................... 4-19
ECC1 Status Register.......................................................................................................................... 4-19
Main Data Area ECC0 Status Register................................................................................................ 4-20
Main Data Area ECC1 Status Register................................................................................................ 4-20
Spare Area ECC Status Register ........................................................................................................ 4-20
Start Block Address Register............................................................................................................... 4-21
END Block Address Register............................................................................................................... 4-21
S3C24A0A MICROPROCESSOR
v
Table of Contents
(Continued)
Chapter 5
Bus Matrix
Overview........................................................................................................................................................5-1
Special Function Registers ...........................................................................................................................5-2
SROMC/NFLASHC Arbiter Priority Register (Priority 0) ......................................................................5-2
SDRAMC Arbiter Priority Register (Priority 1) ......................................................................................5-2
Chapter 6
Interrupt Controller
Overview........................................................................................................................................................6-1
Functional Description...................................................................................................................................6-2
F-Bit and I-Bit Of PSR (Program Status Register) ...............................................................................6-2
Interrupt Mode ......................................................................................................................................6-2
Interrupt Pending Register....................................................................................................................6-2
Interrupt Mask Register ........................................................................................................................6-2
Interrupt Sources ..................................................................................................................................6-3
Interrupt Priority Generating Block .......................................................................................................6-4
Vectored Interrupt Mode (Only for IRQ) ...............................................................................................6-5
Source Pending Register (SRCPND)...................................................................................................6-7
Interrupt Mode Register (INTMOD) ......................................................................................................6-9
Interrupt Mask Register (INTMSK) .......................................................................................................6-11
Priority Register (PRIORITY)................................................................................................................6-13
Interrupt Pending Register (INTIPND)..................................................................................................6-14
Interrupt Offset Register (INTOFFSET)................................................................................................6-16
Sub Source Pending Register (SUBSRCPND)....................................................................................6-17
Interrupt Sub Mask Register (INTSUBMSK) ........................................................................................6-18
Vectored Interrupt Mode Register (VECT_INT_MODE) ......................................................................6-19
Vector Address Register (VAR)............................................................................................................6-19
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