ChipFind - документация

Электронный компонент: ADC1405X

Скачать:  PDF   ZIP
ADC1405X
0.13

m 10-BIT 80MSPS ADC
1
GENERAL DESCRIPTION
The adc1405x is a CMOS 10-bit low-voltage and high-speed A/D converter (ADC) for video and other
applications. It has a three-step pipelined architecture, which consists of sample & hold amplifier, multiplying D/A
converters (DACs), and subranging flash ADCs.
The maximum conversion rate of adc1405x is 80MSPS and supply voltage is 3.3V single.
FEATURES
-- Process:
CMOS
-- Resolution:
10-bit
-- Maximum
conversion
rate:
80MSPS
-- Power
supply:
3.3V
single
-- Power
consumption:
363mW
-- Differential
linearity
error:
1.0
LSB
(Typ)
-- Integral
linearity
error:
2.0
LSB
(Typ)
-- Internal sample-and-hold
-- External reference generation
-- Operational temperature range: 40
C ~ 85
C
TYPICAL APPLICATIONS
-- Network applications
Ethernet, Wireless LAN
-- HDTV, high resolution digital TV
-- Portable equipments for low-power applications
0.13

m 10-BIT 80MSPS ADC
ADC1405X
2
FUNCTIONAL BLOCK DIAGRAM
AINT
AINC
REFTOP
REFBOT
REFMID
CKIN
AVDD33A
AVSS33A
AVDD33D
AVSS33D
AVBB33D
DO<9:0>
MINV
LINV
PD
AVBB33A
SHA
MDAC1
MDAC1
CML
MAINBS
Flash1
Flash2
Flash3
CKGEN
DCLOGIC
Ver 1.0 (Apr. 2002)
This data sheet is a preliminary version. No responsibility is assumed by SEC for its use nor for any infringements of patents
or other rights of third parties that may result from its use. The content of this data sheet is subject to change without any
notice.
ADC1405X
0.13

m 10-BIT 80MSPS ADC
3
CORE PIN DESCRIPTION
Name
I/O Type
I/O Pad
Pin Description
AINT
AI
phiar50_abb
Analog input (+2.15V ~ +1.15V)
AINC
AI
phiar50_abb
Analog input (+1.15V ~ +2.15V)
REFMID
DI
phoa_abb
Ref midpoint (Use ext. Bypass cap)
DO[9:0]
DO
phot16_abb
Digital output
CKIN
DI
phicc_abb
External system clock
REFTOP
AB
phia_abb
Reference top bias (+2.15V)
(bypass capacitor required)
REFBOT
AB
phia_abb
Reference bottom bias (+1.15V)
(bypass capacitor required)
MINV
DI
phicc_abb
Connect AVDD33D = Invert MSB
(normally connect AVSS33D)
LINV
DI
phicc_abb
Connect AVDD33D = Invert all LSBs
(normally connect AVSS33D)
AVDD33A
AP
vdd3t_abb
Analog power (+3.3V)
AVSS33A
AG
vss3t_abb
Analog ground (0.0V)
AVBB33A
AG
vbb3_abb
Analog substrate bias (0.0V)
AVDD33D
DP
vdd3t_abb
Digital power (+3.3V)
AVSS33D
DG
vss3t_abb
Digital ground (0.0V)
AVBB33D
DG
vbb3_abb
Digital substrate bias (0.0V)
I/O
Type
Abbr.
-- AI: Analog Input
-- DI: Digital Input
-- AO: Analog Output
-- DO: Analog Output
-- AP: Analog Power
-- AG: Analog Ground
-- DP: Digital Power
-- DG: Digital Ground
-- AB: Analog Bi-Direction
-- DB: Digital Bi-Direction
0.13

m 10-BIT 80MSPS ADC
ADC1405X
4
ABSOLUTE MAXIMUM RATINGS
Characteristics
Symbol
Value
Unit
Supply voltage
AVDD33A
AVDD33D
0.3 to 4.5
V
Analog input voltage
AIP / AINC
0.3 to AVDD33A+0.3
V
Digital input voltage
CK
0.3 to AVDD33D+0.3
V
Digital output voltage
V
OH
, V
OL
0.3 to AVDD33D+0.3
V
Storage temperature range
Tstg
45 to 125
C
NOTES:
1.
Absolute
maximum
rating
specifies
the
values
beyond
which
the
device
may
be
damaged
permanently.
Exposure
to
absolute
maximum
rating
conditions
for
extended
periods
may
affect
reliability.
Each
condition
value
is
applied
with
the
other
values
kept
within
the
following
operating
conditions
and
function
operation
under
any
of
these
conditions
is
not
implied.
2.
All
voltages
are
measured
with
respect
to
AVSS33A/AVSS33D
unless
otherwise
specified.
3.
100pF
capacitor
is
discharged
through
a
1.5k
resistor
(Human
body
model)
RECOMMENDED OPERATING
CONDITIONS
Characteristics
Symbol
Min
Typ
Max
Unit
Supply voltage
AVDD33A AVSS33A
AVDD33D AVSS33D
3.0
3.3
3.6
V
Supply voltage difference
AVDD33A AVDD33D
0.1
0.0
0.1
V
Reference input voltage
REFTOP
REFBOT

2.15
1.15

V
Analog input voltage
AINT
AINC
1.15
2.15
V
Clock high time
Clock low time
Tpwh
Tpwl
12.5
ns
Digital input 'L' voltage
Digital input 'H' voltage
V
IL
V
IH
3.0

0.3
V
Operating temperature
Topr
40
85
C
NOTES:
1.
It
is
strongly
recommended
that
all
the
supply
pins
(AVDD33A,
AVDD33D)
be
powered
from
the
same
source
to
avoid
power
latch-up.
2.
Reference Input Voltage REFTOP and REFBOT are generated internally and not adjustable.
ADC1405X
0.13

m 10-BIT 80MSPS ADC
5
DC ELECTRICAL
CHARACTERISTICS
Characteristics
Symbol
Min
Typ
Max
Unit
Conditions
Resolution
10
Bits
Differential linearity error
DLE
0.5
1.0
LSB
AINT: 1.15V ~ 2.15V
(Ramp Input)
AINC: 2.15V ~ 1.15V
(Ramp Input)
Integral linearity error
ILE
1.0
2.0
LSB
Fs: 1MHz
20MHz
Bottom offset voltage error
EOB
10
LSB
Top offset voltage error
EOT
10
LSB
NOTES:
1.
Converter
Specifications
(unless
otherwise
specified)
AVDD33A=3.3V
AVDD33D=3.3V
AVSS33A=GND
AVSS33D=GND
SUBST=GND
REFTOP=2.15V
REFBOT=1.15V
MINV, LINV=Low
Ta=25
C
2.
AI(D1, D2) denotes the net voltage difference of AINT and AINC when the corresponding Digital Output code changes
from D1 to D2.
AC ELECTRICAL CHARACTERISTICS
Characteristics
Symbol
Min
Typ
Max
Unit
Conditions
Conversion rate
Fs
80
MSPS
Dynamic supply current
Is
110
120
mA
Is = I(AVDD33A) +
I(AVDD33D)
Analog input range
Vin
2.0
Vpp
1.15V ~ 2.15V
differential input
Analog input capacitance
Cin
10
pF
Analog input bandwidth
Fin
40
MHz
Digital output data delay
Td
10
ns
See
"Delay Timing Diagram"
Signal to noise distortion ratio
(SNDR)
SNDR1
SNDR2
SNDR3
54
52
50
dB
AIN: 1, 20, 40MHz
respectively (sine input)
Fs: 80MHz
0.13

m 10-BIT 80MSPS ADC
ADC1405X
6
TIMING DIAGRAM
DOUT1
DOUT2
D1
D2
Data Latency = 3.5 Clock
AIN (=AINT-AINC)
CKIN
DO[9:0]
ADC1405X
0.13

m 10-BIT 80MSPS ADC
7
FEEDBACK
REQUEST
It should
be
quite
helpful
to
our
ADC
core
development
if
you
specify
your
system
requirements
on
ADC
in
the
following
characteristic
checking
table
and
fill
out
the
additional
questions.
We
appreciate
your
interest
in
our
products.
Thank
you
very
much.
Characteristic
Min
Typ
Max
Unit
Remarks
Analog power supply voltage
V
Digital power supply voltage
V
Bit resolution
Bit
Reference input voltage
V
Analog input voltage
Vpp
Operating temperature
C
Integral non-linearity error
LSB
Differential non-linearity error
LSB
Bottom offset voltage error
mV
Top offset voltage error
mV
Maximum conversion rate
MSPS
Dynamic supply current
mA
Power dissipation
mW
Signal-to-noise ratio + distortion ratio
dB
Pipeline delay
CLK
Digital output format (provide detailed
description & timing diagram)
-- Between single input-output and differential input-output configurations, which one is suitable for your system
and why?
-- Please comment on the internal/external pin configurations you want our ADC to have, if you have any
reason to prefer some type of configuration.
-- Freely list those functions you want to be implemented in our ADC, if you have any.
0.13

m 10-BIT 80MSPS ADC
ADC1405X
8
HISTORY CARD
Version
Date
Modified Items
Comments
Ver1.0
02. 05. 05
Initial release (preliminary)