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Электронный компонент: adc1282x

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ADC1282X
0.18
m 8-BIT 125MSPS ADC
1
GENERAL DESCRIPTION
The adc1282x is a CMOS Nyquit Rate 8-bit A/D converter for high performance network applications. It is a Folding,
Interpolation and Pipelined architecture.
The maximum conversion rate of adc1282x is 125MSPS and supply voltage is 3.3V single.
FEATURES
-- Resolution : 8-bit
-- Maximum Conversion Rate : 125MSPS
-- Power Supply : 3.3V Single
-- Differential Linearity
Error :
1.0 LSB
-- Integral Linearity Error :
2.0 LSB
-- Folding, Interpolation and Pipelined Scheme
-- Low Power Consumption : 165mW(Typ)
-- Operating Temperature Range : -40
C 85
C
TYPICAL APPLICATIONS
-- Giga-bit Ethernet Phy, magnetic recording sampling detectors, medical imagers, and digital transmission links
for telephone, cable, and terrestrial networks.
0.18
m 8-BIT 125MSPS ADC
ADC1282X
2
FUNCTIONAL BLOCK DIAGRAM
AINT
preamps
AINC
REFT
REFB
fold1
fold2
lsb5b
3brom
mbias
msb5b
3brom
dclogic
PD
ckgen
CLK
MODE
AVDD33D AVSS33D AVBB33D
DO[7:0]
AVDD33A AVSS33A AVBB33A
Ver 1.2 (Apr. 2002)
This datasheet is a preliminary version. No responsibility is assumed by SEC for its use nor for any infringements of
patents or other rights of third parties that may result from its use. The content of this datasheet is subject to change
without any notice.
ADC1282X
0.18
m 8-BIT 125MSPS ADC
3
CORE PIN DESCRIPTION
Name
I/O Type
I/O Pad
Pin Description
AINT
AI
phia_abb
Analog
Input
+
AINC
AI
phia_abb
Analog Input -
REFT
AI
phia_abb
Reference
Top
(2.1V)
REFB
AI
phia_abb
Reference
Bottom(1.2V)
CLK
AB
phicc_abb
Clock Input
PD
AP
phicc_abb
Power Down ( Active High )
MODE
AG
phicc_abb
Mode (Normal Operation : Low)
DO[7]
DG
phob8_abb
Digital Output (MSB)
DO[6:0]
DG
phob8_abb
Digital
Output (LSB)
AVDD33A
AP
vdd3t_abb
Analog Power (3.3V)
AVSS33A
AG
vss3t_abb
Analog Ground
AVBB33A
AG
vbb3_abb
Analog Sub Bias
AVDD33D
DP
vdd3t_abb
Digital Power (3.3V)
AVSS33D
DG
vss3t_abb
Digital Ground
AVBB33D
DG
vbb3_abb
Digital Sub Bias
I/O Type Abbr.
-- AI: Analog Input
-- DI: Digital Input
-- AO: Analog Output
-- DO: Digital Output
-- AB: Analog Bi-direction
-- DB: Digital Bi-direction
-- AP: Analog Power
-- AG: Analog Ground
-- DP: Digital Power
-- DG: Digital Ground
0.18
m 8-BIT 125MSPS ADC
ADC1282X
4
CORE CONFIGURATION
adc1282x
AINT
DO[7:0]
VADD3D
VASS3D
VABB3D
VADD3A
VASS3A
VABB3A
AINC
REFT
REFB
CLK
PD
MODE
ADC1282X
0.18
m 8-BIT 125MSPS ADC
5
ABSOLUTE MAXIMUM RATINGS
Characteristic
Symbol
Value
Unit
Supply Voltage
VADD
4.5
V
Analog Input Voltage
AINT,AINC
VASS to VADD
V
Digital Input Voltage
CLK
VASS to VADD
V
Digital Output Voltage
V
OH
, V
OL
VASS to VADD
V
Storage Temperature Range
Tstg
-55 to 125
C
NOTES:
1. ABSOLUTE MAXIMUM RATING specifies the values beyond which the device may be damaged permanently. Exposure
to ABSOLUTE MAXIMUM RATING conditions for extended periods may affect reliability. Each condition value is applied
with the other values kept within the following operating conditions and function operation under any of these conditions
is not implied.
2. All
voltages
are
measured
with
respect
to
VASS
unless
otherwise
specified.
3. 100pF
capacitor
is
discharged
through
a
1.5k
resistor
(Human
body
model)
RECOMMENDED OPERATING CONDITIONS
Characteristics
Symbol
Min
Typ
Max
Unit
Supply Voltage
AVDD33A - AVSS33A
AVDD33D - AVSS33D
3.15
3.3
3.45
V
Supply Voltage Difference
AVDD33A - AVDD33D
-0.1
0.0
0.1
V
Reference Input
Voltage(Externally)
REFT
REFB
2.1
1.2
V
Analog Input Voltage
VIN(AINT-AINC)
1.2
Vp-p
Operating Temperature
Topr
-40
85
C
NOTE: It is
strongly
recommended
that
all
the
supply
pins
(AVDD33A,
AVDD33D)
be
powered
from
the
same
source
to
avoid
power
latch-up.
0.18
m 8-BIT 125MSPS ADC
ADC1282X
6
DC ELECTRICAL CHARACTERISTICS
Characteristics
Symbol
Min
Typ
Max
Unit
Test Conditions
Resolution
8
Bits
Reference Current
IREF
3.5
4
mA
Differential Linearity Error
DLE
1.0
LSB
AINT : 1.35V ~ 1.95V
AINC : 1.95V ~ 1.35V
(Ramp Input)
Integral Linearity Error
ILE
2.0
LSB
Fck : 1MHz
Bottom Offset Voltage Error
EOB
20
LSB
Top Offset Voltage Error
EOT
20
LSB
NOTES:
1.
Converter
Specifications
(unless
otherwise
specified)
AVDD33A=3.3V
AVDD33D=3.3V
AVSS33A=GND
AVSS33A=GND
Ta=25
C
2.
TBD
:
To
Be
Determined
AC ELECTRICAL CHARACTERISTICS
Characteristics
Symbol
Min
Typ
Max
Unit
Test Conditions
Maximum Conversion Rate
fc
125
MSPS
source resolution
>
12bit
Dynamic Supply Current
Ivdd
50
55
mA
fc=125MHz
(without system load)
Signal-to-Noise Distortion Ratio
SNDR
40
42
dB
AINT,AINC = 5MHz
fc = 125MHz
ADC1282X
0.18
m 8-BIT 125MSPS ADC
7
TIMING DIAGRAM
AIN(=AINT-AINC)
D5
Data Latency : 28.9 nsec
ADC Clock
(125MHz)
D2
D3
ADC Out
(Direct Mode)
A6
D2
D1
D4
D3
D5
D4
D1
0.9 nsec
0.18
m 8-BIT 125MSPS ADC
ADC1282X
8
CORE EVALUATION GUIDE
1. ADC function is evaluated by external check on the bidirectional pads connected to input nodes of HOST DSP
back-end circuit.
2. The reference voltages may be biased internally through resistor divider.
Digital
MUX
adc1282x
AINT
DO[7:0]
AINC
CLK
PD
MODE
Power Used
: AVDD33A,AVSS33A,AVBB33A
AVDD33D,AVSS33D,AVBB33D
2.1V
1.2V
REFT
REFB
DO[7:0]
Host
DSP
Core
DO[7:0]
Bidirectional
PAD
(ADC Function Test &
externally forced Digital Input)
: 10
F Electronic Capacitor
Unless otherwise specified
: 0.1
F Ceramic Capacitor
Unless otherwise specified
ADC1282X
0.18
m 8-BIT 125MSPS ADC
9
PACKAGE CONFIGUATION
1 REFT
NC
REFB
NC
NC
AVDD33A
AVDD33A
AVBB33A
AVSS33A
AVSS33A
AINT
NC
AINC
NC
NC
ITEST
PD
AVDD33R
AVSS33R
CLK
MODE
AVBB33R
NC
RP
AVDD33D
AVDD33D
AVSS33D
AVSS33D
AVBB33D
DIRO[7]
DIRO[6]
DIRO[5]
DIRO[4]
DIRO[1]
DIRO[0]
DECO[7]
DECO[6]
DECO[5]
DECO[4]
DECO[3]
DECO[2]
DECO[1]
DECO[0]
CNT
NC
10u
0.1u
RN
DIRO[3]
DIRO[2]
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
10u
0.1u
0.1u
10u
adc1282x
Decimation
Output
1.2V
10u
0.1u
50
0.1u
0.1u
50
3.3V
Normal
Output
3.3V
2.1V
3.3V
0.1u
0.18
m 8-BIT 125MSPS ADC
ADC1282X
10
PACKAGE PIN DESCRIPTION
Pin Name
Pin No.
I/O Type
Pin Description
REFT
1
I
Reference Top (dc 2.1V)
REFB
3
I
Reference Bottom (dc 1.2V)
AVDD33A
6,7
I
Analog Power (dc 3.3V)
AVBB33A
8
I
Analog Sub (dc GND)
AVSS33A
9,10
I
Analog Ground (dc GND)
AINT
11
I
Analog Input + (Vcom:1.65V)
AINC
13
I
Analog Input - (Vcom:1.65V)
ITEST
16
Test Pin
PD
17
I
Power Down(Active High)
AVDD33R
18
I
Driver Power(dc 3.3V)
AVSS33R
19
I
Driver Ground(dc 3.3V)
CLK
20
I
Sampling Clock (125MHz)
MODE
21
I
Normal Operation : Low
AVBB33R
22
Driver Sub (dc GND)
CNT
26
Mode Control (Low:Decimation, High:Normal)
DECO[7:0]
27 34
O
CNT:Low, Decimation Output
DIRO[7:0]
35 42
O
CNT:High, Normal Output
AVBB33D
44
Digital Sub(dc GND)
AVSS33D
45,46
Digital Ground(dc GND)
AVDD33D
47,48
I
Digital Power(dc 3.3V)
ADC1282X
0.18
m 8-BIT 125MSPS ADC
11
PHANTOM CELL INFORMATION
-- Pins of the core can be assigned externally (Package pins) or internally (internal ports) depending on design
methods. The term "External" implies that the pins should be assigned externally like power pins.
The term "External/internal" implies that the applications of these pins depend on the user.
adc1282x
8-BIT 125MSPS ADC
REFB
REFT
AVSS18A
AVBB18A
AVDD18A
AVSS33A
AVBB33A
AVDD33A
UDF
OVF
AINT
AINC
AVDD33D
CKIN
AVBB33D
AVSS33D
DO[0]
DO[1]
DO[2]
DO3]
DO4]
DO[5]
DO[6]
DO[7]
PD
ITEST
MODE
0.18
m 8-BIT 125MSPS ADC
ADC1282X
12
Pin Name
Pin Usage
Pin Layout Guide
AVDD33A
External
- Maintain the large width of lines as far as the pads.
AVSS33A
External
- place the port positions to minimize the length of power lines.
AVBB33A
External
- Do not merge the analog powers with anoter power from other
AVDD33D
External
blocks.
AVSS33D
External
- Use good power and ground source on board.
AVBB33D
External
AINT
External/Internal
- Do not overlap with digtal lines.
AINC
External/Internal
- Maintain the shotest path to pads.
CLK
External/Internal
- Separate from all other analog signals
REFT
External/Internal
- Maintain the larger width and the shorter length as far as the pads.
REFB
External/Internal
- Separate from all other digital lines.
ITEST
External/Internal
PD
External/Internal
MODE
External/Internal
OVF
External/Internal
UDF
External/Internal
DO[7]
External/Internal
DO[6]
External/Internal
DO[5]
External/Internal
DO[4]
External/Internal
DO[3]
External/Internal
DO[2]
External/Internal
DO[1]
External/Internal
DO[0]
External/Internal
ADC1282X
0.18
m 8-BIT 125MSPS ADC
13
FEEDBACK REQUEST
It should be quite helpful to our ADC core development if you specify your system requirements on ADC in the
following characteristic checking table and fill out the additional questions.
We appreciate your interest in our products. Thank you very much.
Characteristic
Min
Typ
Max
Unit
Remarks
Analog Power Supply Voltage
V
Digital Power Supply Voltage
V
Bit Resolution
Bit
Reference Input Voltage
V
Analog Input Voltage
V
PP
Operating Temperature
C
Integral Non-linearity Error
LSB
Differential Non-linearity Error
LSB
Bottom Offset Voltage Error
mV
Top Offset Voltage Error
mV
Maximum Conversion Rate
MSPS
Dynamic Supply Current
mA
Power Dissipation
mW
Signal-to-noise Ratio
dB
Pipeline Delay
CLK
Digital Output Format
(Provide detailed description & timing diagram)
1. Between single input-output and differential input-output configurations, which one is suitable for your system
and why?
2. Please comment on the internal/external pin configurations you want our ADC to have, if you have any reason to
prefer some type of configuration.
3. Freely list those functions you want to be implemented in our ADC, if you have any.
0.18
m 8-BIT 125MSPS ADC
ADC1282X
14
HISTORY CARD
Version
Date
Modified Items
Comments
ver 1.0
00.7.4
Original version published (preliminary)
ver 1.2
02.04.23
Add the phantom information (Final Version)