11-143

RAN

SCE

I
V

Product Description

Ordering Information

Typical Applications

Features

Functional Block Diagram

RF Micro Devices, Inc.
7625 Thorndike Road
Greensboro, NC 27409, USA

Tel (336) 664 1233

Fax (336) 664 0454

http://www.rfmd.com

Optimum Technology Matching® Applied

Si BJT

GaAs MESFET

GaAs HBT

Si Bi-CMOS

SiGe HBT

Si CMOS

Linear

RSSI

Prescaler

Phase

Detector &

Charge Pump

RSSI

DATA OUT

IF2 IN

IF1 OUT

IF2 BP+

IF2 BP-

IF1 BP-

IF1 BP+

IF1 IN+

IF1 IN-

MIX OUT

MIX IN

LNA OUT

RX IN

RESNTR+

LOOP FLT

RESNTR-

OSC E

OSC B

MUTE

D C

B I A S

VREF IF

DATA IN-

DATA IN+

RF2919

433/868/915MHZ ASK/OOK

RECEIVER

· Wireless Meter Reading

· Keyless Entry Systems

· 433/868/915MHz ISM Bands Systems

· Remote Data Transfers

· Wireless Security Systems

The RF2919 is a monolithic integrated circuit intended for
use as a low cost ASK/OOK receiver. The device is pro-
vided in 32-lead plastic packaging and is designed to pro-
vide a fully functional AM receiver. The chip is intended
for applications in the North American 915MHz ISM band
and European 433MHz and 868MHz ISM bands. The
integrated VCO, +64 prescaler, and reference oscillator
require only the addition of an external crystal to provide
a complete phase-locked oscillator for single channel
applications. A data comparator is included to provide
logic level outputs.

· Fully Monolithic Integrated Receiver

· 2.7V to 5.0V Supply Voltage

· Up to 256kbps Data Rates

· 300MHz to 1000MHz Frequency Range

· Power Down Capability

· Analog or Digital Output

RF2919

433/868/915MHz ASK/OOK Receiver

RF2919 PCBA-L

Fully Assembled Evaluation Board, 433MHz

RF2919 PCBA-M Fully Assembled Evaluation Board, 868MHz
RF2919 PCBA-H Fully Assembled Evaluation Board, 915MHz

Rev A12 001113

7°MAX

0°MIN

.005

.057
.053

.020

.030
.020

.284
.268

.201
.193

.011
.007

.006
.002

Package Style: LQFP-32

11-144

RF2919

Rev A12 001113

RAN

SCE

I
V

Absolute Maximum Ratings

Parameter

Ratings

Unit

Supply Voltage

-0.5 to +5.5

Control Voltages

-0.5 to +5.0

Input RF Level

+10

dBm

Output Load VSWR

50:1

Operating Ambient Temperature

-40 to +85

°C

Storage Temperature

-40 to +150

°C

Parameter

Specification

Unit

Condition

Min.

Typ.

Max.

Overall

T=25 °C, V

= 3.6V, Freq= 915MHz

RF Frequency Range

300 to 1000

MHz

VCO and PLL Section

VCO Frequency Range

300 to 1000

MHz

PLL Lock Time

The PLL lock time is set externally by the
bandwidth of the loop filter and start-up of
the crystal.

PLL Phase Noise

-74
-98

dBc/Hz
dBc/Hz

915MHz, 5kHz loop BW, 10kHz offset
915 MHz, 5kHz loop BW, 100kHz offset

Reference Frequency

0.5

MHz

Crystal R

100

Charge Pump Current

Sink and source current

Overall Receive Section

Frequency Range

300 to 1000

MHz

RX Sensitivity

-100

-104

dBm

IF BW =150kHz, Freq=915MHz, S/N =8dB

LO Leakage

-70

dBm

RSSI DC Output Range

0.4 to 1.5

=24k

RSSI Sensitivity

mV/dB

MUTE = 0

RSSI Dynamic Range

MUTE = 0

LNA

Power Gain

433MHz, Matched to 50

915MHz, Matched to 50

Noise Figure

3.6

433MHz

3.7

915MHz

Input IP

-8

dBm

915 MHz

Input P

1dB

-15

dBm

915 MHz

RX IN Impedance

82- j86

433MHz (see Plots)

77- j43

915MHz (see Plots)

Output Impedance

Open Collector

Mixer

Single-ended configuration

Conversion Power Gain

433MHz, Matched to 50

7.5

915MHz, Matched to 50

Noise Figure (SSB)

433MHz, SSB Measurement

915MHz, SSB Measurement

Input IP

-20

dBm

433MHz

Input IP

-15

dBm

915MHz

Input P

1dB

-30

dBm

433MHz

Input P

1dB

-26

dBm

915MHz

First IF Section

IF Frequency Range

0.1

10.7

MHz

Voltage Gain

IF =10.7MHz, Z

=330

Noise Figure

IF1 Input Impedance

330

IF1 Output Impedance

330

Caution! ESD sensitive device.

RF Micro Devices believes the furnished information is correct and accurate
at the time of this printing. However, RF Micro Devices reserves the right to
make changes to its products without notice. RF Micro Devices does not
assume responsibility for the use of the described product(s).

11-146

RF2919

Rev A12 001113

RAN

SCE

I
V

Pin

Function

Description

Interface Schematic

VCC1

This pin is used to supply DC bias to the receiver RF circuits. An RF
bypass capacitor should be connected directly to this pin and returned
to ground. A 100pF capacitor is recommended for 915MHz applica-
tions. A 220pF capacitor is recommended for 433MHz applications.

RX IN

RF input pin for the receiver electronics. RX IN input impedance is a
low impedance when enabled. RX IN is a high impedance when the
receiver is disabled.

GND1

Ground connection for RF receiver functions. Keep traces physically
short and connect immediately to ground plane for best performance.

LNA OUT

Output pin for the receiver RF low noise amplifier. This pin is an open
collector output and requires an external pull up coil to provide bias and
tune the LNA output.

GND2

GND2 is connection for the 40 dB IF limiting amplifier. Keep traces
physically short and connect immediately to ground plane for best per-
formance.

MIX IN

RF input to the RF Mixer. An LC matching network between LNA OUT
and MIX IN can be used to connect the LNA output to the RF mixer
input in applications where an image filter is not needed or desired.

GND3

GND3 is the ground connection for the receiver RF mixer.

MIX OUT

IF output from the RF mixer. Interfaces directly to 10.7MHz ceramic IF
filters as shown in the application schematic. A pull-up inductor and
series matching capacitor should be used to present a 330

termina-

tion impedance to the ceramic filter. Alternately, an IF tank can be used
to tailor the IF frequency and bandwidth to meet the needs of a given
application. In addition to the matching components, a 15pF capacitor
should be placed from this pin to ground.

IF1 IN-

Balanced IF input to the 40dB limiting amplifier strip. A DC blocking
capacitor is required on this input, 10nF is recommended.

IF1 IN+

Functionally the same as pin 9 except non-inverting node amplifier
input. In single-ended applications, this input should be bypassed
directly to ground through a 10 nF capacitor.

See pin 9.

IF1 BP+

DC feedback node for the 40dB limiting amplifier strip. A 10nF bypass
capacitor from this pin to ground is recommended.

See pin 9.

IF1 BP-

See pin 11.

See pin 9.

IF1 OUT

IF output from the 40dB limiting amplifier. The IF1 OUT output presents
a nominal 330

output resistance and interfaces directly to 10.7MHz

ceramic filters.

VREF IF

DC voltage reference for the IF limiting amplifiers (typically 1.1V). A
10nF capacitor from this pin to ground is recommended.

GND5

Ground connection for 60dB IF limiting amplifier. Keep traces physically
short and connect immediately to ground plane for best performance.

RX IN

LNA OUT

MIX IN

MIX OUT+

IF1 IN-

IF1 IN+

330

60 k

IF1 BP+

IF1 BP-

IF1 OUT

11-147

RF2919

Rev A12 001113

RAN

SCE

I
V

Pin

Function

Description

Interface Schematic

IF2 IN

Inverting input to the 60dB limiting amplifier strip. A 10 nF DC blocking
capacitor is required on this input. The IF2 IN input presents a nominal
330

input resistance and interfaces directly to 10.7MHz ceramic fil-

ters.

IF2 BP+

DC feedback node for the 60dB limiting amplifier strip. A 10nF bypass
capacitor from this pin to ground is required.

See pin 16.

IF2 BP-

See pin 17.

See pin 16.

VCC3

This pin is used is supply DC bias to the 60dB IF limiting amplifier. An
IF bypass capacitor should be connected directly to this pin and
returned to ground. A 10 nF capacitor is recommended for 10.7MHz IF
applications.

MUTE

This pin is used to mute the data output (DATA OUT). MUTE> 2.0V
turns the DATA OUT signal on. MUTE<1.0V turns the DATA OUT signal
off.

RSSI

A DC voltage proportional to the received signal strength is output from
this pin. The output voltage increases with increasing signal strength.

DATA IN-

The inverting input of the data comparator. The RSSI is fed to this pin
via a 50k

resistor. This input is available for a data filtering capacitor

that provides noise and 2x IF rejection. The value of the capacitor can
be calculated by C= 1/(2

F*50k

) where F is the desired 3dB band-

width.

DATA OUT

The data comparator output which contains the modulating data recov-
ered from the RSSI signal. Hysteresis can be added to the comparator
by placing a very large (< 1M

) resistor between pins 23 and 24.The

magnitude of the load impedance is intended to be 1M

or greater.

DATA IN+

The non-inverting input of the data comparator. The RSSI is fed to this
pin via a 50k

resistor. This input is available for a large filtering capac-

itor such that the modulation signal can be filtered out leaving a DC ref-
erence signal for the comparator.

See pin 22.

RESNTR-

This port is used to supply DC voltage to the VCO as well as to tune the
center frequency of the VCO. Equal value inductors should be con-
nected to this pin and pin 26.

RESNTR+

See pin 25.

VCC2

This pin is used is supply DC bias to the VCO, prescaler, and PLL. An
IF bypass capacitor should be connected directly to this pin and
returned to ground. A 10nF capacitor is recommended for 10.7MHz IF
applications.

GND4

GND4 is the ground shared on chip by the VCO, prescaler, and PLL
electronics.

IF2 IN

330

60 k

IF2 BP-

IF2 BP+

MUTE

75 k

25 k

RSSI

50 k

DATA IN+

DATA IN-

RSSI

DATA OUT

RESNTR-

RESNTR+

11-148

RF2919

Rev A12 001113

RAN

SCE

I
V

Pin

Function

Description

Interface Schematic

LOOP FLT

Output of the charge pump, and input to the VCO control. An RC net-
work from this pin to ground is used to establish the PLL bandwidth.

OSC B

This pin is connected directly to the reference oscillator transistor base.
The intended reference oscillator configuration is a modified Colpitts. A
100pF capacitor should be connected between pin 30 and pin 31.

OSC E

This pin is connected directly to the emitter of the reference oscillator
transistor. A 100pF capacitor should be connected from this pin to
ground.

See pin 30.

This pin is used to power up or down the RF2919. A logic high (PWR
DWN >2.0 V) powers up the receiver and PLL. A logic low (PWR DWN
<1.0 V) powers down circuit to standby mode.

ESD

This diode structure is used to provide electrostatic discharge protec-
tion to 3kV using the Human body model. The following pins are pro-
tected: 1, 3, 5, 7-19, 21-24, 27-31.

LOOP FLT

OSC E

OSC B

11-149

RF2919

Rev A12 001113

RAN

SCE

I
V

RF2919 Theory of Operation and Application Information

The RF2919 is a part of a family of low-power RF
transceiver IC's that was developed for wireless data
communication devices operating in the European
433MHz/868MHz ISM bands or U.S. 915 MHz ISM
band. This IC has been implemented in a 15GHz sili-
con bipolar process technology that allows low-power
transceiver operation in a variety of commercial wire-
less products. The RF2919 realizes a highly inte-
grated, single-conversion ASK/OOK receiver with the
addition of a reference crystal, intermediate frequency
(IF) filtering, and a few passive components. The LNA
(low-noise amplifier) input of the RF2919 is easily
matched to a front-end filter or antenna by means of a
DC blocking capacitor and reactive components. The
receiver local oscillator (LO) is generated by an inter-
nalized VCO, PLL and phase discriminator in conjunc-
tion with the external reference crystal, loop filter and
VCO resonator components. The receiver IF section is
optimized to interface with low cost 10.7MHz ceramic
filters, and its -3dB bandwidth of 25 MHz also allows it
to be used (with lower gain) at higher frequencies with
other types of filters.

OPERATION
The ASK/OOK demodulation is accomplished by an
on-chip data comparator. The RSSI output is internally
routed through 50k

resistors to provide the inputs

(DATA IN+ and DATA IN-) to the data comparator.
Either input may be used as the data input with the
other input used as the reference. A shunt capacitor
can be added to the data input to provide filtering of
noise and the second IF harmonic. The value of the
data filtering capacitor is calculated by

where F is the desired 3 dB bandwidth. The factor of
16.7k

is the net internal impedance (50k

in parallel

with a 25 k

comparator input impedance).

A large filtering capacitor may be used on the refer-
ence input to remove the modulation signal, leaving a
DC reference for the comparator. Because this refer-
ence filter may have a long time constant, a longer pre-
amble may be required to allow the DC reference to
stabilize. The data pattern also affects the stability of
the DC reference and the reliability of the received
data. Since a string of consecutive data 'ones' (or
'zeroes') will result in a change to the DC reference, a
coding scheme such as Manchester should be used to

improve data integrity. Hysteresis can be added by
placing a resistor between the input and the output.

The DATA OUT pin is only capable of driving rail-to-rail
output into a very high impedance and small capaci-
tance, with the amount of capacitance affecting the
DATA OUT bandwidth. For a 3pF load, the bandwidth
is in excess of 500kHz. The rise and fall times of the
RSSI are limited by the bandwidth of the IF filters,
thereby limiting the effective data rate.

The RSSI output signal is supplied from a current
source and therefore requires a resistor to convert it to
a voltage. For a 24k

resistive load, the RSSI will typi-

cally range from 0.4V to 1.5V (3.6V supply). A small
parallel capacitor is suggested to limit the bandwidth
and filter noise.

APPLICATION AND LAYOUT CONSIDERATIONS
The RX IN pin is DC biased, requiring a DC blocking
capacitor. If the RF filter has DC blocking characteris-
tics, such as a ceramic dielectric filter, then a DC block-
ing capacitor is not necessary. When in power down
mode, the RX IN impedance increases. Therefore in a
half-duplex application, the RF2919 RX IN may share
the RF filter with a transmitter output having a similar
high impedance power down characteristic. Care must
be taken in this case to account for loading effects of
the transmitter on the receiver and vice versa in match-
ing the filter to both the transmitter and receiver.

The VCO is a very sensitive block in this system. RF
signals feeding back into the VCO by either radiation or
coupling of traces may cause the PLL to become
unlocked. The trace(s) for the anode of the tuning var-
actor should also be kept short. The layout of the reso-
nators and varactor are very important. The capacitor
and varactor should be closest to the RF2919 pins and
the trace length should be as short as possible. The
inductors can be placed further away and any trace
inductance can be compensated by reducing the value
of the inductors. Printed inductors may also be used
with careful design. For best results, the physical layout
should be as symmetrical as possible.

When using loop bandwidths lower than the 5kHz
shown on the evaluation board, better supply filtering
at the resonators (and lower V

noise as well) will

help reduce phase noise of the VCO; a series resistor
of 100

to 200

and a 1

F or larger capacitor can be

used. Phase noise is generally more critical in narrow-
band applications where adjacent channel selectivity is

F 16.7k

---------------------------------

11-150

RF2919

Rev A12 001113

RAN

SCE

I
V

a concern, but it can also contribute to raising the noise
floor of the receiver, thereby degrading sensitivity.

For the interface between the LNA and mixer, the cou-
pling capacitor should be as close to the RF2919 pins
as possible with the bias inductor being further away.
Once again, the value of the inductor can be changed
to compensate for trace inductance. The output imped-
ance of the LNA is on the order of several k

which

makes matching to 50

difficult. If image filtering is

desired, a high impedance filter is recommended. If no
filtering is used, the match to the mixer input need not
be a good conjugate match due to the high gain of the
IF amplifier stages. In fact, a conjugate match between
the LNA and mixer will not significantly improve sensi-
tivity, but will have an adverse effect on system IIP3
and increase the likelihood of IF instability.

Predicting and Minimizing PLL Lock Time
The RF2919 implements a conventional PLL on chip.
The VCO is followed by a prescaler, which divides
down the output frequency for comparison with the ref-
erence oscillator frequency. The output of the phase
discriminator is a sequence of pulse width modulated
current pulses in the required direction to steer the
VCO's control voltage to maintain phase lock, with a
loop filter integrating the current pulses. The lock time
of this PLL is a combination of the loop transient
response time and the slew rate set by the phase dis-
criminator output current combined with the magnitude
of the loop filter capacitance. A good approximation for
total lock time of the RF2919 is:

where D is a factor to account for the loop damping, F

is the loop cut frequency, C is the sum of all shunt
capacitors in the loop filter, and dV is the required step
voltage change to produce the desired frequency
change during the transient. For loops with low phase
margin (30° to 40°), use D=2 whereas for loops with
better phase margin (50° to 60°), use D=1.

To lock faster, C needs to be minimized.

1. Design the loop filter for the minimum phase margin
possible without causing loop instability problems; this
allows C to be kept at a minimum.

2. Design the loop filter for the highest loop cut fre-
quency possible without distorting low frequency mod-
ulation components; this also allows C to be kept at a
minimum.

For additional applications information, refer to the fol-
lowing technical articles.

TA0031

"Frequency Synthesis Using the RF2510"

DK1000 "ASK Transmit and Receive Chip Set"

LockTime

-------

35000 C dV

11-155

RF2919

Rev A12 001113

RAN

SCE

I
V

Evaluation Board Schematic

H (915MHz), M (868MHz), L (433MHz) Boards

(Download Bill of Materials from www.rfmd.com.)

C27

47 pF

C26

10 nF

L7*

D1***

L6*

4.7

47 pF

C8*

6.8

R5*

SFECV10.7MS3S-A-TC

=10.7 MHz

BW=180 kHz

15 pF

C16

10 nF

C17

10 nF

C19

10 nF

C20

10 nF

MUTE

RSSI

C21

47 pF

24 k

C32

100 pF

C31

100 pF

X1*

VCC

C4*

VCC

RSW1

C18

10 nF

SFECV10.7MS3S-A-TC

=10.7 MHz

BW=180 kHz

L1*

100 pF

strip

RF IN

10 nF

L2*

***D1 : SMV1233-011

C12

47 pF

C11

10 nF

C13

22 pF

**Components not normally populated.

2.2

C14

120 pF

strip

IF OUT

R3*

C24

10 nF

R8**

C25**

ASK OUT

Drawing 2919400-, 401-, 402-

VCC

C23

10 pF

C22

10 nF

C28*

47 pF

10 nF

VCC

*See table for values.

P1-1

P1-3

GND

VCC

P2-1

P2-3

RSSI

GND

MUTE

L (433MHz)

M (868MHz)

H (915MHz)

Board

C4 (pF)

L1 (nH)

L2 (nH)

C28 (pF)

C8 (pF)

L6 (nH)

L7 (nH)

X1 (MHz)

2.0

1.5

2.0

8.2

6.8

9.0

1.0

9.0

3.0

6.8

6.612813

13.41015

14.15099

R3 (

)

100

R5 (

)

510

1.8 k

C33

3 to 10 pF

Linear

RSSI

Prescaler

Phase

Detector &

Charge Pump

BIAS

50 k

VCC

R10

3.9 k

C29

2.2 nF

C30

22 nF

R11

2.7 k

RSW2**

C15

10 nF

11-159

RF2919

Rev A12 001113

RAN

SCE

I
V

RSSI

Freq = 915MHz, V

= 2.7V, Mute = High

0.2

0.4

0.6

0.8

1.0

1.2

1.4

-125.0

-105.0

-85.0

-65.0

-45.0

-25.0

Power In (dBm)

RSSI Output (V)

RSSI, -40°C

RSSI, 22.5°C

RSSI, 85°C

RSSI

Freq = 915MHz, V

= 2.7V, Mute = Low

0.0

0.2

0.4

0.6

0.8

1.0

1.2

1.4

-125.0

-105.0

-85.0

-65.0

-45.0

-25.0

Power In (dBm)

RSSI Output (V)

RSSI, -40°C

RSSI, 22.5°C

RSSI, 85°C

RSSI

Freq = 915MHz, V

= 3.6V, Mute = High

0.2

0.4

0.6

0.8

1.0

1.2

1.4

1.6

-125.0

-105.0

-85.0

-65.0

-45.0

-25.0

Power In (dBm)

RSSI Output (V)

RSSI, -40°C

RSSI, 22.5°C

RSSI, 85°C

RSSI

Freq = 915MHz, V

= 3.6V, Mute = Low

0.0

0.2

0.4

0.6

0.8

1.0

1.2

1.4

1.6

-125.0

-105.0

-85.0

-65.0

-45.0

-25.0

Power In (dBm)

RSSI Output (V)

RSSI, -40°C

RSSI, 22.5°C
RSSI, 85°C

RSSI

Freq = 915MHz, V

= 5.0V, Mute = High

0.2

0.4

0.6

0.8

1.0

1.2

1.4

1.6

1.8

-125.0

-105.0

-85.0

-65.0

-45.0

-25.0

Power In (dBm)

RSSI Output (V)

RSSI, -40°C

RSSI, 22.5°C

RSSI, 85°C

RSSI

Freq = 915MHz, V

= 5.0V, Mute = Low

0.2

0.4

0.6

0.8

1.0

1.2

1.4

1.6

1.8

-125.0

-105.0

-85.0

-65.0

-45.0

-25.0

Power In (dBm)

RSSI Output (V)

RSSI, -40°C

RSSI, 22.5°C

RSSI, 85°C

11-160

RF2919

Rev A12 001113

RAN

SCE

I
V

Current versus Temperature

RX Frequency = 915MHz

6.0

7.0

8.0

9.0

10.0

11.0

12.0

-40.0 -30.0 -20.0 -10.0

0.0

10.0 20.0 30.0 40.0 50.0 60.0 70.0 80.0

Temperature (°C)

Current (mA)

Vcc=2.70

Vcc=3.60

Sensitivity versus Temperature

RX Frequency = 915MHz

-110.0

-105.0

-100.0

-95.0

-90.0

-40.0 -30.0 -20.0 -10.0 0.0

10.0 20.0 30.0 40.0 50.0 60.0 70.0 80.0

Temperature (°C)

Sensitivity (dBm)

Vcc=2.70

Vcc=3.60

Data Output Level versus Temperature

RX Frequency = 915MHz

2.0

2.5

3.0

3.5

4.0

-40.0 -30.0 -20.0 -10.0

0.0

10.0 20.0

30.0 40.0 50.0

60.0 70.0 80.0

Temperature (°C)

Data Output Level (V

P-P

)

Vcc=2.70

Vcc=3.60

1.0

-1.0

10.0

-10.0

5.0

-5.0

2.0

-2.0

3.0

-3.0

4.0

-4.0

0.2

-0

0.4

-0.4

0.6

-0.6

0.8

-0.8

LNA Impedance

Swp Max

1GHz

Swp Min

0.3GHz

LNA Input (RX on)

LNA Input (RX off)

LNA Output

Ð­Ð»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: RF2919

ÐÐ»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: RF2919