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Preliminary
Product Description
Ordering Information
Typical Applications
Features
Functional Block Diagram
RF Micro Devices, Inc.
7628 Thorndike Road
Greensboro, NC 27409, USA
Tel (336) 664 1233
Fax (336) 664 0454
http://www.rfmd.com
Optimum Technology Matching Applied
Si BJT
GaAs MESFET
GaAs HBT
Si Bi-CMOS
SiGe HBT
Si CMOS
IF+
IF-
GND1
LO
GND2
GND3
RF GND
RF OUT
PD
VCC
1
2
3
4
5
10
9
8
7
6
RF2640
3V 900MHZ UPCONVERTER/
DRIVER AMPLIFIER
TDMA/AMPS Cellular Systems
CDMA/AMPS Cellular Systems
Portable Battery Powered Equipment
The RF2640 is a complete upconverter and power ampli-
fier driver designed for TDMA and CDMA applications.
The device features balanced IF inputs, single-ended LO
input and RF output for ease of interface. Packaged in an
industry standard MSOP-10 package, the device pro-
vides a low-cost solution while easing board space limita-
tions.
Single Supply 3.0V Operation
+8.5dBm Output P1dB
+19dBm Output IP3
Power Down Control
23dB Conversion Gain
RF2640
3V 900MHz Upconverter/ Driver Amplifier
RF2640 PCBA
Fully Assembled Evaluation Board
6
Rev A3 010717
0.192
0.118
0.118
0.008
0.004
0.002
0.038
0.006
0.0197
0.0004
0.021
0.004
0.006
0.002
0.014 TYP
6.0
0.0
Package Style: MSOP-10
Preliminary
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Absolute Maximum Ratings
Parameter
Rating
Unit
Supply Voltage
-0.5 to +3.6
V
DC
Input RF Power
+3
dBm
Operating Ambient Temperature
-30 to +80
C
Storage Temperature
-30 to +150
C
Parameter
Specification
Unit
Condition
Min.
Typ.
Max.
Overall
T = 25C, V
CC
=2.7V, RF Out= 836MHz,
LO= 1016MHz @ -8dBm, IF = 180MHz
@ -30dBm
RF Output Frequency Range
824
849
MHz
Conversion Gain
22
23.5
26
dB
Noise Figure
12
dB
Single Sideband
Output P1dB
+8.5
dBm
Output IP3
+17
+18.5
dBm
Output VSWR
1.25:1
50
IF Input
IF Frequency
180
MHz
IF Input Level
-60
-15
dBm
Single-Ended Input Impedance
70
IF to RF Isolation
45
dB
LO Input
LO Frequency Range
1004
1029
MHz
LO Level
-10
-8
-6
dBm
LO to RF Output Leakage
-18
dBm
IF Input< -24dBm
LO Input VSWR
1.25:1
50
Power Supply
Voltage
2.7
3.3
V
Current Consumption
45
65
mA
Device is active (ON); V
PD
= 1.8V
10
A
Device is inactive (OFF); V
PD
=0.6V
Power Down Voltage
0.0
0.6
V
Device is inactive (OFF); V
PD
=0.6V
1.2
1.8
V
Device is active (ON); V
PD
= 1.8V
Power Down Current
0.1
mA
Device is active (ON); V
PD
= 1.8V
Caution! ESD sensitive device.
RF Micro Devices believes the furnished information is correct and accurate
at the time of this printing. However, RF Micro Devices reserves the right to
make changes to its products without notice. RF Micro Devices does not
assume responsibility for the use of the described product(s).
Preliminary
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Evaluation Board Schematic
RF=836MHz, LO=1016MHz
(Download Bill of Materials from www.rfmd.com.)
Pin
Function
Description
Interface Schematic
1
IF+
Balanced IF input pin. This pin is internally DC-biased and should be
DC-blocked if connected to a device with a DC level present. For single-
ended input operation, one pin is used as an input and the other IF
input is AC-coupled to ground. The single-ended input impedance is
50
.
2/26/1997
2
IF-
Same as pin 1, except complementary input.
3
GND1
Ground connection. For best performance, keep traces physically short
and connect immediately to ground plane.
4
LO+
Single-ended LO input pin. This pin is internally DC-biased and should
be DC-blocked if connected to a device with a DC level present. The
single-ended input impedance is 50
.
5
GND2
Same as pin 3, except complementary input.
6
RF OUT
RF Output Pin. The output impedance is 50
.
7
RF GND
This pin requires a small inductance to ground to optimize the gain and
third order intercept point. See Evaluation Board Layout. The trace
length on the board is approximately 65mils.
8
GND3
Same as pin 7.
9
PD
Power down control. When logic "high" (between 1.2V and 1.8V) the
device is active and all circuits are operating. When logic "low"
(between 0.0V and 0.6V) the device is inactive and all circuits are
turned off.
10
VCC
Supply Voltage pin. External bypassing is required. External RF, LO,
and IF bypassing is required. The trace length between the pin and the
bypass capacitors should be minimized. The ground side of the bypass
capacitors should connect immediately to ground plane.
1
2
3
4
5
10
9
8
7
6
C1
1 nF
C2
1 nF
C3
22 pF
50
strip
50
strip
J1
IF IN
J2
LO IN
C3
22 pF
L1
12 nH
VCC
PD
50
strip
VCC
J3
RF OUT
C4
1 nF
C6
1 nF
P1
1
2
3
P1-1
PD
GND
P1-3
VCC
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Evaluation Board Layout
Board Size 2.0" x 2.0"
Board Thickness 0.031", Board Material FR-4
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Gain versus V
CC
LO @ -8 dBm
23.0
23.5
24.0
24.5
25.0
25.5
26.0
2.7
2.8
2.9
3.0
3.1
3.2
3.3
V
CC
(V)
Gain
(dB)
Gain, -30
Gain, 26
Gain, 80
Noise Figure versus V
CC
LO @ -8 dBm
10.5
11.0
11.5
12.0
12.5
13.0
13.5
2.7
2.8
2.9
3.0
3.1
3.2
3.3
V
CC
(V)
Noise
Figure
(
dB)
NF, -30
NF, 26
NF, 80
OIP3 versus V
CC
LO @ -8 dBm
18.5
19.0
19.5
20.0
20.5
21.0
21.5
22.0
22.5
23.0
2.7
2.8
2.9
3.0
3.1
3.2
3.3
V
CC
(V)
OIP3
(dBm)
OIP3, -30
OIP3, 26
OIP3, 80
OP1dB versus V
CC
LO @ -8 dBm
9.2
9.4
9.6
9.8
10.0
10.2
10.4
10.6
10.8
11.0
2.7
2.8
2.9
3.0
3.1
3.2
3.3
V
CC
(V)
OP1dB
(dBm)
OP1dB, -30
OP1dB, 26
OP1dB, 80
I
CC
versus V
CC
LO @ -8 dBm
54.0
55.0
56.0
57.0
58.0
59.0
60.0
61.0
62.0
63.0
64.0
2.7
2.8
2.9
3.0
3.1
3.2
3.3
V
CC
(V)
I
CC
(mA)
Icc, -30
Icc, 26
Icc, 80
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Noise Figure versus LO P
IN
V
CC
= 2.7 V
10.5
11.0
11.5
12.0
12.5
13.0
13.5
14.0
-10.0
-9.5
-9.0
-8.5
-8.0
-7.5
-7.0
-6.5
-6.0
LO P
IN
(dBm)
Noise
Figure
(
dB)
NF, -30
NF, 26
NF, 80
OIP3 versus LO P
IN
V
CC
= 2.7 V
18.0
18.5
19.0
19.5
20.0
20.5
21.0
-10.0
-9.5
-9.0
-8.5
-8.0
-7.5
-7.0
-6.5
-6.0
LO P
IN
(dBm)
OIP3
(dBm)
OIP3, -30
OIP3, 26
OIP3, 80
OP1dB versus LO P
IN
V
CC
= 2.7 V
9.2
9.3
9.4
9.5
9.6
9.7
9.8
9.9
10.0
10.1
-10.0
-9.5
-9.0
-8.5
-8.0
-7.5
-7.0
-6.5
-6.0
LO P
IN
(dBm)
OP1dB
(dBm)
OP1dB, -30
OP1dB, 26
OP1dB, 80
Gain versus LO P
IN
V
CC
= 2.7 V
23.0
23.5
24.0
24.5
25.0
25.5
26.0
-10.0
-9.5
-9.0
-8.5
-8.0
-7.5
-7.0
-6.5
-6.0
LO P
IN
(dBm)
Gain
(dB)
Gain, -30
Gain, 26
Gain, 80
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