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Preliminary
Product Description
Ordering Information
Typical Applications
Features
Functional Block Diagram
RF Micro Devices, Inc.
7625 Thorndike Road
Greensboro, NC 27409, USA
Tel (336) 664 1233
Fax (336) 664 0454
http://www.rfmd.com
Optimum Technology Matching Applied
Si BJT
GaAs MESFET
GaAs HBT
Si Bi-CMOS
SiGe HBT
Si CMOS
GN
D
QR
E
F
IR
EF
IS
IG
QS
I
G
GN
D
VC
C
PD
RF
O
U
T
GN
D
GND
GND
VCC
GND
GND
LO
-45
+45
5
13
12
11
10
14
7
8
6
9
15
16
1
2
3
4
RF2484
DIRECT QUADRATURE MODULATOR
Dual-Band CDMA Base Stations
TDMA/TDMA-EDGE Base Stations
GSM-EDGE/EGSM Base Stations
W-CDMA Base Stations
WLAN and WLL Systems
GMSK,QPSK,DQPSK,QAM Modulation
The RF2484 is a monolithic integrated quadrature modu-
lator IC capable of universal direct modulation for high-
frequency AM, PM, or compound carriers. This low-cost
IC features excellent linearity, noise floor, and over-tem-
perature carrier suppression performance.
The device
implements differential amplifiers for the modulation
inputs, 90 carrier phase shift network, carrier limiting
amplifiers, two matched double-balanced mixers, sum-
ming amplifier, and an output RF amplifier which will drive
50
from 800MHz to 2500MHz. It is packaged in a small
industry-standard LCC 16-pin plastic package.
Typical Carrier Suppression>35dBc,
Sideband Suppression>35dBc over
temperature with highly linear operation
Noise Floor better than -152dBm/Hz
from 800MHz to 2200MHz
Single 5V Power Supply
RF2484
Direct Quadrature Modulator
RF2484 PCBA
Fully Assembled Evaluation Board
5
Rev A2 010829
3.75
3.75
+
1.50 SQ
4.00
4.00
1
0.45
0.28
3.20
1.60
0.75
0.50
12
INDEX AREA 3
1.00
0.90
0.75
0.65
0.05
0.00
NOTES:
5
Package Warpage: 0.05 max.
4
Pins 1 and 9 are fused.
Shaded Pin is Lead 1.
1
Dimension applies to plated terminal and is measured between
0.10 mm and 0.25 mm from terminal tip.
2
The terminal #1 identifier and terminal numbering convention
shall conform to JESD 95-1 SPP-012. Details of terminal #1
identifier are optional, but must be located within the zone
indicated. The identifier may be either a mold or marked
feature.
3
0.80
TYP
2
1
Dimensions in mm.
Package Style: LCC, 16-Pin
Preliminary
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Absolute Maximum Ratings
Parameter
Rating
Unit
Supply Voltage
-0.5 to +7.5
V
DC
Input LO and RF Levels
+10
dBm
Operating Ambient Temperature
-40 to +85
C
Storage Temperature
-40 to +150
C
Parameter
Specification
Unit
Condition
Min.
Typ.
Max.
LO Input
T = 25C, V
CC
=5V, V
REF
= 4.1V; I and Q
driven single-ended
Frequency Range
800
2500
MHz
Power Level
-6
+6
dBm
Input Impedance
45- j95
At 880MHz
52- j54
At 1960MHz
58- j50
At 2140MHz
63- j40
At 2400MHz
Modulation Input
Frequency Range
DC
250
MHz
Reference Voltage (V
REF
)
4.1
V
Input Resistance
30
k
Input Bias Current
40
A
RF Output (880MHz)
LO= -5dBm at 880MHz; Single sideband
testing unless otherwise noted
CDMA Output Channel Power
-12
dBm
For ACPR = -72dBc; I&Q Amplitude= 1.1V
PP
(single-ended)
CDMA ACPR
-72
dBc
Channel Power = -12dBm; see Test Setup for
detailed information
Carrier Suppression
50
dBc
T = 25C; P
OUT
= -10dBm; optimized I,Q DC
offsets
Carrier Suppression
over Temperature
35
dBc
Temperature cycled from -40C to +85C
after optimization at T =25C; P
OUT
= -10dBm
Sideband Suppression
50
dBc
T = 25C; P
OUT
= -10dBm; optimized I,Q
amplitude and phase balance
Sideband Suppression
over Temperature
35
dBc
Temperature cycled from -40C to +85C
after optimization at T =25C; P
OUT
= -10dBm
Broadband Noise Floor
-152.5
dBm/Hz
At 20MHz offset, 30kHz res BW, V
CC
=5V;
ISIG, QSIG, IREF, and QREF tied to V
REF
EVM
2.3
%
See Test Setup for detailed information
Phase Error
1
RMS
See Test Setup for detailed information
Rho
.9993
See Test Setup for detailed information
Output Impedance
28- j72
RF Output (1960MHz)
LO=-5dBm at 1960MHz; Single sideband
testing unless otherwise noted
PCS CDMA Output Power
-13
dBm
For ACPR = -72dBc; I&Q Amplitude=1.2V
PP
(single-ended)
PCS CDMA ACPR
-72
dBc
Channel Power = -13dBm; see Test Setup for
detailed information
Carrier Suppression
50
dBc
T = 25C; P
OUT
= -13dBm; optimized I,Q DC
offsets
Carrier Suppression
over Temperature
35
dBc
Temperature cycled from -40C to +85C
after optimization at T =25C; P
OUT
= -13dBm
Sideband Suppression
50
dBc
T =25C; P
OUT
=-13dBm; optimized I,Q
amplitude and phase balance
Sideband Suppression
over Temperature
35
dBc
Temperature cycled from -40C to +85C
after optimization at T =25C; P
OUT
=-13dBm
Caution! ESD sensitive device.
RF Micro Devices believes the furnished information is correct and accurate
at the time of this printing. However, RF Micro Devices reserves the right to
make changes to its products without notice. RF Micro Devices does not
assume responsibility for the use of the described product(s).
Preliminary
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RF2484
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Parameter
Specification
Unit
Condition
Min.
Typ.
Max.
RF Output (1960 MHz)
cont'd
Broadband Noise Floor
-154.5
dBm/Hz
At 20MHz offset, 30kHz res BW, V
CC
=5V;
ISIG, QSIG, IREF, and QREF tied to V
REF
EVM
2.3
%
See Test Setup for detailed information
Phase Error
1
RMS
See Test Setup for detailed information
Rho
.9988
See Test Setup for detailed information
Output Impedance
46-j22
RF Output (2140 MHz)
LO= -5dBm at 2140MHz; Single sideband
testing unless otherwise noted
W-CDMA Output Channel Power
-16
dBm
For ACPR= -60dBc; I&Q Amplitude=1.4V
PP
(single-ended)
W-CDMA ACPR
-60
dBc
Channel Power= -16dBm; see Test Setup for
detailed information
Carrier Suppression
50
dBc
T=25C; P
OUT
= -13dBm; optimized I,Q DC
offsets
Carrier Suppression
over Temperature
35
dBc
Temperature cycled from -40C to +85C
after optimization at T = 25C; P
OUT
=-13dBm
Sideband Suppression
50
dBc
T= 25C; P
OUT
= -13dBm; optimized I,Q
amplitude and phase balance
Sideband Suppression
over Temperature
35
dBc
Temperature cycled from -40C to +85C
after optimization at T = 25C; P
OUT
=-13dBm
Broadband Noise Floor
-152
dBm/Hz
At 20MHz offset, 30kHz res BW, V
CC
=5V;
ISIG, QSIG, IREF, and QREF tied to V
REF
EVM
5.9
%
See Test Setup for detailed information
Phase Error
2.4
RMS
See Test Setup for detailed information
Rho
.9961
See Test Setup for detailed information
Output Impedance
58-j16
Power Down
Turn On/Off Time
100
ns
PD Input Resistance
50
k
Power Control "ON"
2.8
V
Threshold voltage
Power Control "OFF"
1.0
1.2
V
Threshold voltage
Power Supply
Voltage
5.0
V
Specifications
4.5
6.0
V
Operating Limits
Current
66
70
mA
25
A
Power Down
Preliminary
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Pin
Function
Description
Interface Schematic
1
GND
Ground connection. This pin should be connected directly to the
ground plane.
2
GND
Same as pin 1.
3
GND
Same as pin 1.
4
LO
The input of the phase shifting network. This pin has an internal DC
blocking capacitor. This port is voltage-driven so matching at different
frequencies is generally not required.
5
GND
Same as pin 1.
6
VCC
Power supply. An external capacitor is needed if no other low frequency
bypass capacitor is nearby.
7
PD
Power Down control. When this pin is "low," all circuits are shut off. A
"low" is typically 1.2V or less at room temperature.When this pin is
"high" (V
CC
), all circuits are operating normally. If PD is below V
CC
, out-
put power and performance will be degraded. Operating in this region
is not recommended, although it might be useful in some applications
where power control is required.
8
RF OUT
RF Output. This pin has an internal DC blocking capacitor. At some fre-
quencies, external matching may be needed to optimize output power.
A small amount of DC current may be present at this output. As a
result, if the voltage at this pin is measured using a high impedance
probe, some DC voltage may be observed at this output.
9
GND
Same as pin 1.
10
VCC
Same as pin 6.
11
GND
Same as pin 1.
12
GND
Same as pin 1.
13
Q SIG
Baseband input to the Q mixer. This pin is DC coupled. The input drive
level determines output power and linearity performance; for better car-
rier suppression, sideband suppression, and dynamic range, the drive
level should be as high as possible to meet the required linearity perfor-
mance. The recommended DC level for this pin is 4.1V.
For optimum carrier suppression, the DC voltages on I REF, Q REF, I
SIG and Q SIG should be adjusted slightly to compensate for inherent
undesired internal DC offsets; for optimum sideband suppression,
phase and signal amplitude on IREF, Q REF, I SIG and Q SIG should
be adjusted slightly to compensate for inherent undesired internal off-
sets. See RFMD AN0001 for more detail.
14
I SIG
Baseband input to the I mixer. This pin is DC coupled. The input drive
level determines output power and linearity performance; for better car-
rier suppression, sideband suppression, and dynamic range, the drive
level should be as high as possible to meet the required linearity perfor-
mance. The recommended DC level for this pin is 4.1V; see pin 13 for
more information.
15
I REF
Reference voltage for the I mixer. This voltage should be the same as
the DC voltage supplied to the I SIG pin. A voltage of 4.1V is recom-
mended; see pin 13 for more information.
The SIG and REF inputs are inputs of a differential amplifier. Therefore
the REF and SIG inputs are interchangeable. If swapping the I SIG and
I REF pins, the Q SIG and Q REF also need to be swapped to maintain
the correct phase. It is also possible to drive the SIG and REF inputs in
a differential mode. This will increase the gain.
LO
200
PD
V
CC
RF OUT
100
1 p
V
CC
100
1 p
V
CC
100
1 p
V
CC
Preliminary
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Pin
Function
Description
Interface Schematic
16
Q REF
Reference voltage for the Q mixer. This voltage should be the same as
the DC voltage supplied to the Q SIG pin. A voltage of 4.1V is recom-
mended; see pin 13 for more information.
Pkg
Base
GND
Ground connection. The package base should be connected to the
ground plane.
100
1 p
V
CC
Preliminary
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RF2484
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CDMA/W-CDMA Test Setup
General
The above setup was used to evaluate the RF2484
under CDMA and W-CDMA modulation conditions.
Due to test equipment limitations, a DC-level shifting
board was required to provide the appropriate DC ref-
erence voltage (4.1 V) for the I and Q pins. I and Q
were driven single-endedly; differential drive may
improve performance. A PC-controlled Rohde &
Schwarz AMIQ generated the CDMA I and Q signals.
In order to reduce AMIQ noise contributions to adja-
cent channel power, W-CDMA baseband signals were
filtered using a high order low pass filter before appli-
cation to the RF2484.
EVM, Phase Error, and Rho
To measure EVM, phase error, and Rho, signals were
generated using the AMIQ and decoded with the Agi-
lent VSA. For CDMA Cellular and PCS, I and Q input
signals were generated with the Pilot Channel active,
32x oversampling and base station equifilters. For W-
CDMA, the Common Pilot Channel was active with 8x
oversampling and a root cosine filter. In all cases, rela-
tive signal amplitude levels were adjusted to optimize
signal quality.
CDMA Modulation Setup (Cellular and PCS)
To measure ACPR, I and Q input signals were gener-
ated using the following settings:
Pilot Channel active
Sync Channel active
Paging Channel active
6 Traffic Channels active
32x Oversampling
Base Station equifilter
W-CDMA Modulation Setup
To measure W-CDMA ACPR, I and Q input signals
were generated using the following settings in the
AMIQ:
P-CPICH (Common Pilot Channel) active
P-SCH (Sync Channel) active
P-CCPCH (Primary Common Control Physical
Channel) active
P-ICH (Page Indicator Channel) Active
DL-DPCCH (Dedicated Physical Control Channel)
active
6 DPCH (Dedicated Physical Channels) active
8x Oversampling
Rohde & Schwarz
AMIQ 1110.2003.02
RF2484 DC Level Shift
Control Board
RF2484
Evaluation Board
Rohde & Schwarz
FSIQ 1119.6001.26
Hewlett-Packard
8665B
I SIG
RF OUT
LO IN
I REF
Q SIG
Q REF
Agilent 66332A
VCC
VPD
Hewlett-Packard
6624A
Agilent 89441
Vector Signal Analyzer
Preliminary
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Application Schematic
-45
+45
5
13
12
11
10
14
7
8
6
9
15
16
1
2
3
4
LO
VCC
PD
RF OUT
VCC
QSIG
ISIG
QREF
IREF
100 nF
3 pF
100 nF
3 pF
100 nF
3 pF
100 nF
100 nF
Preliminary
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RF2484
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Evaluation Board Schematic
(Download Bill of Materials from www.rfmd.com.)
VCC
VREF/QREF
IREF
C8
100 nF
C7
3 pF
C6
100 nF
C5
3 pF
C2
100 nF
C1
3 pF
C3
3 pF
C4
100 nF
J2
LO
J1
RFOUT
VCC
J4
QSIG
J3
ISIG
R1a*
0
R1
0
U1
-45
+45
5
13
12
11
10
14
7
8
6
9
15
16
1
2
3
4
P1
1
2
3
CON3
P1-1
VCC
GND
GND
P2
1
2
3
CON3
P2-3
IREF
GND
P2-1
VREF/QREF
2484400-
NOTES:
1. R1 is installed for non-independent control of I and Q
reference voltages.
R1a gives independent control of reference voltages.
2. Components with * following the reference designator
should not be populated on the evaluation board.
Preliminary
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RF2484
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Evaluation Board Layout
Board Size 2.0" x 2.0"
Board Thickness 0.028", Board Material FR-4
Preliminary
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RF2484
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RF2484 Cellular CDMA Spectra at Various Output Levels
(ACPR @ 885kHz, Vcc = 5.0V, Vref = 4.1V, T = 25C)
-100
-90
-80
-70
-60
-50
-40
-30
-20
877.5
878
878.5
879
879.5
880
880.5
881
881.5
882
882.5
Frequency (MHz)
Power
(
dBm)
CP = -10.6 dBm;
ACPR = -70 dBc
CP = -12.0 dBm;
ACPR = -72 dBc
CP = -14.7 dBm;
ACPR = -73 dBc
CP = -9.5 dBm;
ACPR = -68 dBc
Note: Below ~-90dBm,
test setup noise inhibits accurate
ACP measurement.
RF2484 Output Power versus I, Q Input Voltage Level
(Vcc = 5.0V, Vref = 4.1V, T = 25C, Single Sideband)
-20
-15
-10
-5
0
5
0
200
400
600
800
1000
1200
1400
1600
I, Q Input Voltage Level (mVp)
SSB
Output
Power
(
dBm)
880 MHz
1960 MHz
2140 MHz
RF2484 PCS CDMA Spectra at Various Output Levels
(ACPR @ 885 kHz, Vcc = 5.0V, Vref = 4.1V, T = 25C)
-100
-90
-80
-70
-60
-50
-40
-30
-20
1957.5 1958 1958.5 1959 1959.5 1960 1960.5 1961 1961.5 1962 1962.5
Frequency (MHz)
Power
(
dBm)
CP = -12.9 dBm;
ACPR = -72 dBc
CP = -14.3 dBm;
ACPR = -73 dBc
CP = -11.1 dBm;
ACPR = -71 dBc
RF2484 Output Channel Power vs I, Q Input Voltage Level
(Vcc = 5.0V, Vref = 4.1V, T = 25C, CDMA/W-CDMA Mod.)
-30
-25
-20
-15
-10
-5
250
500
750
1000
1250
1500
1750
2000
2250
2500
I, Q Input Voltage Level (mVpp)
Output
Channel
Power
(
dBm)
880 MHz CDMA Signal
1960 MHz CDMA Signal
2140 MHz W-CDMA Signal
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