PM5358
Advance
Quad Channel OC-12c ATM and POS Physical Layer Device
S/UNI-4x622
PMC-2000331 (A2)
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE
Copyright PMC-Sierra, Inc. 2000
FEATURES
Single chip quad ATM and POS User-
Network Interface operating at
622 Mbit/s.
Implements the ATM Forum User
Network Interface Specification and
the ATM physical layer for Broadband
ISDN according to CCITT
Recommendation I.432.
Implements the Point-to-Point Protocol
(PPP) over SONET/SDH specification
according to RFC 2615(1619)/1662 of
the PPP Working Group of the Internet
Engineering Task Force (IETF).
Processes four bit-serial 622 Mbit/s
STS-12c (STM-4-4c) data streams
with on-chip clock and data recovery
and clock synthesis.
Complies with Bellcore GR-253-CORE
jitter tolerance, jitter transfer and
intrinsic jitter criteria.
Each channel provides termination for
SONET Section, Line and Path
overhead or SDH Regenerator
Section, Multiplexer Section and High
Order Path overhead.
Provides UTOPIA Level 3 32-bit wide
System Interface (clocked up to
104 MHz) with parity support for ATM
applications.
Provides SATURN POS-PHY
Level 3TM 32-bit System Interface
(clocked up to 104 MHz) for Packet
over SONET (POS), or ATM
applications.
Supports line loopback from the line
side receive stream to the transmit
stream and diagnostic loopback from
the line side transmit stream to the line
side receive stream interface.
Provides support for automatic
protection switching including a bi-
directional 4-bit PECL 622 MHz port
for external APS with mate device.
Built-in APS cross-connect for internal
and external 1+1 and 1:n protection
switching.
Provides a standard five signal IEEE
1149.1 JTAG test port for boundary
scan board test purposes.
Provides a generic 16-bit
microprocessor bus interface for
configuration, control, and status
monitoring.
Low power 2.5 V CMOS core logic with
3.3 V CMOS/TTL compatible digital
inputs and digital outputs. PECL inputs
and outputs are 3.3 V compatible.
Industrial temperature range (-40 C to
+85 C).
520 pin SBGA package.
Pin and software compatible with
PM5382 S/UNI-16x155.
APPLICATIONS
ATM and Multiservice Switches,
Routers, and Switch/Routers.
SONET/SDH Add/Drop Multiplexers
with data processing capabilities
Uplink Cards.
SONET/SDH ATM/POS Test
Equipment.
QAVS[2:0]
ATP[1:0]
QAVD[2:0]
TXD[3:0]+/-
SD[3:0]
REFCLK+/-
RXD[3:0]+/-
TDREF1, TDREF0
AVD[45:0]
SPECLV
SDTTL
AVS[45:0]
C1[3:0], C0[3:0]
T
D
CL
K
[
3:
0]
T
D
C
C
[3
:0
]
T
A
CL
K
[
3:
0]
T
A
C
C
[3
:0
]
RA
LR
M
[
3:
0]
RF
P
O
RC
LK
RA
CLK
[
3:
0]
RA
C
C
[
3
:
0
]
RD
CLK
[
3:
0]
R
D
C
C
[3
:0
]
Path
Trace Buffer
TC
L
K
TFP
O
TFP
I
Section
Trace Buffer
WAN
Synch.
Sync Status,
BERM
Section/
Line DCC
Insertion
Section/
Line DCC
Extraction
TR
S
T
B
TM
S
TD
I
TC
K
TD
O
JTAG
TCA/TPA
TENB
STPA
TSOC/TSOP
TADR[3:0]
TFCLK
TPRTY
TMOD[1:0]
TDAT[31:0]
TSX
RADR[3:0]
RSX
RSOC/RSOP
RFCLK
TEOP
RPRTY
RMOD[1:0]
RDAT[31:0]
RENB
REOP
RERR
Rx
Line O/H
Processor
Rx
Section O/H
Processor
Tx
Line O/H
Processor
Tx
Section O/H
Processor
TERR
RCA/RVAL
U
T
O
P
IA
L
e
v
e
l 3
/
PO
S
-
P
H
Y L
e
v
e
l
3
S
yst
em
I
n
t
e
r
f
ac
e
D
[
1
5:
0]
IN
T
B
A
[
1
1:
0]
RS
T
B
AL
E
CS
B
WDB
RD
B
S
e
r
i
a
l
Li
ne
I
n
t
e
r
f
a
c
e
Microprocessor
Interface
P
O
S_
AT
M
B
Pa
t
h
C
r
o
s
s
b
a
r
/
A
P
S
C
r
os
s
c
o
nne
c
t
A
P
S
O
[
3:
0]
+
/
-
A
P
S
I[3
:0
]+
/
-
APE
C
L
V
AP
R
E
F
0
,
APR
EF
1
External
APS
Interface
Tx
Path O/H
Processor
Tx
ATM Cell
Processor
Tx
POS Frame
Processor
Rx
ATM Cell
Processor
Rx
POS Frame
Processor
Rx
Path O/H
Processor
BLOCK DIAGRAM
Head Office:
PMC-Sierra, Inc.
#105 - 8555 Baxter Place
Burnaby, B.C. V5A 4V7
Canada
Tel: 604.415.6000
Fax: 604.415.6200
Quad Channel OC-12c ATM and POS Physical Layer Device
To order documentation,
send email to:
document@pmc-sierra.com
or contact the head office,
Attn: Document Coordinator
All product documentation is available
on our web site at:
http://www.pmc-sierra.com
For corporate information,
send email to:
info@pmc-sierra.com
PMC-2000331 (A2)
Copyright PMC-Sierra,
Inc. 2000. All rights reserved.
March 2000
SATURN and S/UNI are
registered trademarks of
PMC-Sierra, Inc. POS-PHY
Level 3 is a trademark of
PMC-Sierra, Inc.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE
Advance
PM5358 S/UNI-4x622
TYPICAL APPLICATIONS
TYPICAL STS-12C/STM-4-4C ATM SWITCH PORT APPLICATION
TYPICAL STS-12C/STM-4-4C PACKET-OVER-SONET/SDH APPLICATION
622
Mbit/s
622
Mbit/s
PM5358
S/UNI-4x622
UTOPIA Level 3
Interface
ATM Layer
Device
TFCLK
TxClk
TENB
TxEnb
TADR[1:0]
TxAdr[1:0]
TCA
TxClav
TSOC
TxSOC
TPRTY
TxPrty
TDAT[31:0]
TxData[31:0]
RFCLK
RxClk
RENB
RxEnb
RADR[1:0]
RxAddr[1:0]
RCA
RxClav
RSOC
RxSOC
RPRTY
RxPrty
RDAT[31:0]
RxData[31:0]
SD[0]
TXD[0]+/-
RXD[0]+/-
Optical
Transceiver
SD[2]
TXD[2]+/-
RXD[2]+/-
Optical
Transceiver
SD[3]
TXD[3]+/-
RXD[3]+/-
Optical
Transceiver
SD[1]
TXD[1]+/-
RXD[1]+/-
Optical
Transceiver
622
Mbit/s
622
Mbit/s
PM5358
S/UNI-4x622
POS-PHY Level 3
Interface
Link Layer Device
TFCLK
TFCLK
TENB
TENB
TSX
TSX
TADR[1:0]
TADR[1:0]
TSOP
TSOP
TEOP
TEOP
TERR
TERR
RFCLK
RFCLK
RENB
RENB
RSX
RSX
RSOP
RSOP
RPRTY
RPRTY
RDAT[31:0]
RDAT[31:0]
TPRTY
TPRTY
TDAT[31:0]
TDAT[31:0]
PTPA
PTPA
STPA
STPA
RVAL
RVAL
REOP
REOP
RERR
RERR
TMOD[1:0]
TMOD[1:0]
622
Mbit/s
SD[3]
TXD[3]+/-
RXD[3]+/-
Optical
Transceiver
622
Mbit/s
SD[2]
TXD[2]+/-
RXD[2]+/-
Optical
Transceiver
622
Mbit/s
SD[1]
TXD[1]+/-
RXD[1]+/-
Optical
Transceiver
622
Mbit/s
SD[0]
TXD[0]+/-
RXD[0]+/-
Optical
Transceiver
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