PM5350 S/UNI-ULTRA
DATA SHEET
PMC-960924
ISSUE 5
SATURN USER NETWORK INTERFACE
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE
PM5350
155-ULTRA
S/
UNI-
R
S/UNI-155-ULTRA
SATURN USER NETWORK INTERFACE
155.52 & 51.84 MBIT/S
DATA SHEET
ISSUE 5: JUNE 1998
PM5350 S/UNI-ULTRA
DATA SHEET
PMC-960924
ISSUE 5
SATURN USER NETWORK INTERFACE
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE
PUBLIC REVISION HISTORY
Issue No
Date of issue
Details of Change
5
June 1998
Data Sheet Reformatted -- No Change in
Technical Content.
Generated R5 data sheet from PMC-969489, R7
4
November 1997
Eng Doc (7) revised.
3
Dec 20, 1996
Third Revision
2
Oct 15, 1996
Second Revision
1
Sept 12, 1996
Creation of Document
PM5350 S/UNI-ULTRA
DATA SHEET
PMC-960924
ISSUE 5
SATURN USER NETWORK INTERFACE
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE
i
CONTENTS
1
FEATURES ............................................................................................... 1
2
APPLICATIONS ........................................................................................ 4
3
REFERENCES ......................................................................................... 5
4
APPLICATION EXAMPLES ...................................................................... 6
5
BLOCK DIAGRAM.................................................................................... 7
6
PIN DIAGRAM ........................................................................................ 10
7
PIN DESCRIPTION ................................................................................ 11
7.1
UTP-5 AND PECL RECEIVER .................................................... 27
7.2
CLOCK RECOVERY.................................................................... 27
7.3
SERIAL TO PARALLEL CONVERTER......................................... 28
7.4
RECEIVE SECTION OVERHEAD PROCESSOR........................ 28
7.4.1 FRAMER ........................................................................... 28
7.4.2 DESCRAMBLE ................................................................. 29
7.4.3 ERROR MONITOR............................................................ 29
7.4.4 LOSS OF SIGNAL ............................................................ 29
7.4.5 LOSS OF FRAME ............................................................. 30
7.5
RECEIVE LINE OVERHEAD PROCESSOR ............................... 30
7.5.1 LINE REMOTE DEFECT INDICATION DETECT .............. 30
7.5.2 LINE AIS DETECT ............................................................ 30
7.5.3 ERROR MONITOR............................................................ 30
7.6
RECEIVE PATH OVERHEAD PROCESSOR ............................... 31
7.6.1 POINTER INTERPRETER ................................................ 31
PM5350 S/UNI-ULTRA
DATA SHEET
PMC-960924
ISSUE 5
SATURN USER NETWORK INTERFACE
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE
ii
7.6.2 ERROR MONITOR............................................................ 32
7.7
RECEIVE ATM CELL PROCESSOR ........................................... 32
7.7.1 CELL DELINEATION......................................................... 32
7.7.2 DESCRAMBLER ............................................................... 33
7.7.3 CELL FILTER AND HCS VERIFICATION .......................... 34
7.7.4 PERFORMANCE MONITOR............................................. 35
7.7.5 GFC EXTRACTION PORT................................................ 36
7.7.6 RECEIVE FIFO ................................................................. 36
7.8
UTP-5 AND PECL TRANSMITTER ............................................. 37
7.9
CLOCK SYNTHESIS ................................................................... 37
7.10
PARALLEL TO SERIAL CONVERTER......................................... 37
7.11
TRANSMIT SECTION OVERHEAD PROCESSOR ..................... 37
7.11.1 LINE AIS INSERT ............................................................. 37
7.11.2 BIP-8 INSERT ................................................................... 37
7.11.3 FRAMING AND IDENTITY INSERT.................................. 38
7.11.4 SCRAMBLER.................................................................... 38
7.12
TRANSMIT LINE OVERHEAD PROCESSOR ............................. 38
7.12.1 BIP CALCULATE............................................................... 38
7.12.2 LINE REMOTE DEFECT INDICATION INSERT................ 38
7.12.3 LINE FEBE INSERT.......................................................... 39
7.13
TRANSMIT PATH OVERHEAD PROCESSOR ............................ 40
7.13.1 POINTER GENERATOR ................................................... 40
7.13.2 BIP-8 CALCULATE ........................................................... 41
PM5350 S/UNI-ULTRA
DATA SHEET
PMC-960924
ISSUE 5
SATURN USER NETWORK INTERFACE
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE
iii
7.13.3 FEBE CALCULATE ........................................................... 41
7.13.4 SPE MULTIPLEXER.......................................................... 41
7.14
TRANSMIT ATM CELL PROCESSOR......................................... 42
7.14.1 IDLE/UNASSIGNED CELL GENERATOR......................... 43
7.14.2 SCRAMBLER.................................................................... 43
7.14.3 HCS GENERATOR............................................................ 43
7.14.4 GFC INSERTION PORT ................................................... 43
7.14.5 TRANSMIT FIFO............................................................... 43
7.15
DROP SIDE INTERFACE ............................................................ 44
7.15.1 RECEIVE INTERFACE...................................................... 44
7.15.2 TRANSMIT INTERFACE ................................................... 45
7.16
PARALLEL OUTPUT PORT AND LED DISPLAY CONTROLLER45
7.17
MICROPROCESSOR INTERFACE ............................................. 45
8
REGISTER MEMORY MAP.................................................................... 46
8.1
TEST MODE REGISTER MEMORY MAP ................................. 131
8.2
TEST MODE 0 DETAILS............................................................ 134
9
OPERATION ......................................................................................... 136
9.1
OVERHEAD BYTE USAGE ....................................................... 136
9.2
CELL DATA STRUCTURE.......................................................... 139
9.3
PARALLEL OUTPUT PORT AND LED DISPLAY CONTROLLER
OPERATION .............................................................................. 141
9.3.1 DIRECT CONTROL PARALLEL OUTPUT PORT ........... 141
9.3.2 ALARM MONITOR .......................................................... 141
9.3.3 TRAFFIC MONITOR ....................................................... 141
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