PM5344 SPTX
DATA SHEET
PMC-930531
ISSUE 6
SONET/SDH PATH TERMINATING TRANSCEIVER
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE
PM5344
SPTX
SONET/SDH PATH TERMINATING
TRANSCEIVER TELECOM
DATA SHEET
ISSUE 6: JULY 1998
PM5344 SPTX
DATA SHEET
PMC-930531
ISSUE 6
SONET/SDH PATH TERMINATING TRANSCEIVER
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE
PUBLIC REVISION HISTORY
Issue No
Date of issue
Details of Change
6
July 1998
Data Sheet Reformatted -- No Change in
Technical Content.
Generated R5 data sheet from PMC-920813, P8
PM5344 SPTX
DATA SHEET
PMC-930531
ISSUE 6
SONET/SDH PATH TERMINATING TRANSCEIVER
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE
i
CONTENTS
1
FEATURES ......................................................................................................................................1
1.1
THE RECEIVER SECTION: ..............................................................................................1
1.2
THE TRANSMITTER SECTION: .......................................................................................3
2
APPLICATIONS ...............................................................................................................................5
3
REFERENCES ................................................................................................................................6
4
APPLICATION EXAMPLES .............................................................................................................7
5
BLOCK DIAGRAM ...........................................................................................................................9
6
DESCRIPTION ..............................................................................................................................10
7
PIN DIAGRAM ...............................................................................................................................12
8
PIN DESCRIPTION .......................................................................................................................13
9
FUNCTIONAL DESCRIPTION ......................................................................................................25
9.1
RECEIVE PATH OVERHEAD PROCESSOR...................................................................25
9.1.1
POINTER INTERPRETER ................................................................................25
9.1.2
MULTIFRAME FRAMER ...................................................................................29
9.1.3
SPE TIMING......................................................................................................30
9.1.4
ERROR MONITOR............................................................................................30
9.1.5
PATH OVERHEAD EXTRACT ...........................................................................30
9.1.6
TANDEM CONNECTION ORIGINATE ..............................................................31
9.1.7
RECEIVE ALARM PORT ..................................................................................31
9.2
RECEIVE PATH TRACE BUFFER...................................................................................31
9.3
RECEIVE TELECOMBUS ALIGNER...............................................................................33
9.3.1
ELASTIC STORE ..............................................................................................33
9.3.2
POINTER GENERATOR...................................................................................34
PM5344 SPTX
DATA SHEET
PMC-930531
ISSUE 6
SONET/SDH PATH TERMINATING TRANSCEIVER
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE
ii
9.3.3
TANDEM CONNECTION ALARM .....................................................................36
9.4
TRANSMIT PATH OVERHEAD PROCESSOR ................................................................37
9.4.1
BIP-8 CALCULATE ...........................................................................................37
9.4.2
FEBE CALCULATE ...........................................................................................37
9.4.3
TRANSMIT ALARM PORT................................................................................37
9.4.4
PATH OVERHEAD INSERT...............................................................................38
9.4.5
SPE MULTIPLEXER .........................................................................................38
9.4.6
GENERATED BUS CONTROLLER...................................................................38
9.5
TRANSMIT TELECOMBUS ALIGNER ............................................................................39
9.5.1
ELASTIC STORE ..............................................................................................40
9.5.2
POINTER GENERATOR ...................................................................................40
9.5.3
TANDEM CONNECTION ALARM .....................................................................40
9.6
TRANSMIT PATH TRACE BUFFER ................................................................................41
9.7
TELECOMBUS INTERFACE ...........................................................................................41
9.8
MICROPROCESSOR INTERFACE .................................................................................41
9.9
REGISTER MEMORY MAP ............................................................................................41
10
NORMAL MODE REGISTER DESCRIPTION ...............................................................................45
11
TEST FEATURES DESCRIPTION ..............................................................................................128
11.1
TEST MODE REGISTER MEMORY MAP.....................................................................128
11.2
I/O TEST MODE ............................................................................................................130
12
OPERATION ................................................................................................................................140
12.1
CONFIGURATION OPTIONS........................................................................................140
12.1.1
STS-1 (SINGLE AU3) MODE ..........................................................................140
12.1.2
STS-3 (TRIPLE AU3) MODE ..........................................................................141
PM5344 SPTX
DATA SHEET
PMC-930531
ISSUE 6
SONET/SDH PATH TERMINATING TRANSCEIVER
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE
iii
12.1.3
STS-3C (AU4) MODE .....................................................................................141
12.1.4
ORIGINATING TCTE MODE ...........................................................................141
12.1.5
TRANSMIT TCTE TERMINATING MODE .......................................................141
12.1.6
PATH AND TCTE TERMINATING MODE ........................................................141
12.1.7
RECEIVE TCTE BYPASS MODE....................................................................142
12.1.8
TRANSMIT TCTE BYPASS MODE .................................................................142
13
FUNCTIONAL TIMING ................................................................................................................143
13.1
RECEIVE SECTION......................................................................................................143
13.1.1
RECEIVE STREAM TIMING ...........................................................................143
13.1.2
EXTERNAL PATH TERMINATION RECEIVE BUS TIMING ............................144
13.1.3
DROP BUS TIMING ........................................................................................147
13.1.4
RECEIVE LOW-SPEED INTERFACE TIMING ................................................150
13.1.5
RECEIVE ALARM STATUS TIMING................................................................153
13.2
TRANSMIT SECTION ...................................................................................................155
13.2.1
GENERATED BUS TIMING.............................................................................155
13.2.2
ADD BUS TIMING...........................................................................................158
13.2.3
TRANSMIT LOW-SPEED INTERFACE TIMING..............................................161
13.2.4
TRANSMIT BUS TIMING ................................................................................163
13.2.5
ELASTIC STORE BYPASS TIMING................................................................166
14
ABSOLUTE MAXIMUM RATINGS ...............................................................................................170
15
D.C. CHARACTERISTICS ...........................................................................................................171
16
MICROPROCESSOR INTERFACE TIMING CHARACTERISTICS .............................................174
17
SPTX TIMING CHARACTERISTICS ...........................................................................................181
18
ORDERING AND THERMAL INFORMATION .............................................................................195
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