MSP5000
Released
MSP for Multi-Service Platforms and Intelligent IADs
Multi-Service Processor
PMC-2041691
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC.,
Copyright PMC-Sierra, Inc. 2004
Issue 2
AND FOR ITS CUSTOMERS' INTERNAL USE
All rights reserved.
GENERAL
Today's networks must support multi-
service applications such as combined
packetized voice and data while
maintaining service level agreements.
The challenge is to design products that
meet customer expectations for quality
without the need for expensive
processors or complicated software.
The MSP5000 belongs to a full family of
Multi-Service Processors designed to
meet the performance, QoS, and
security needs of communications
equipment used within the customer
premise.
The MSP5000 is an ideal solution for
IADs, IP PBX's, and Multi-Service
Access Devices (MSAD). As shown
below, it includes a MIPS CPU, two
10/100 Ethernet MACs, a Security
Engine, a Voice Engine, and a Packet
Engine.
Because the MSP5000 eliminates the
need for a separate processor, DSP, and
a security chip, it provides a new level of
price/performance for IADs and MSADs.
The MSP5000 has a unique system
architecture that provides wire-speed
performance. This architecture includes
a powerful MIPS CPU, a 3.2 Gbit/s bus,
and intelligent context aware DMA
engines. Together, this results in an
extremely cost effective CPE solution
that includes security.
To reduce time-to-market, PMC-Sierra
offers comprehensive support for the
MSP5000, including evaluation boards,
software, application engineering
support, training, and documentation
that together accelerate the product
development process. In addition, the
MSP5000 supports Linux, VxWorks, or
custom operating systems.
ADVANTAGES
Built-in quality of service
Support for up to 20 voice channels on
a single chip
Support for voice over TDM, VoIP, and
VoATM
Support for multiple simultaneous
CODECs
High performance systems
architecture with on-chip VPN
acceleration
Flexible WAN interfaces
Significant cost reduction through
integration of multiple processors and
discrete parts on a single chip
Support for VxWorks and Linux
APPLICATIONS
Multi-service Access Devices
Integrated Access Devices (IADs)
IP PBXs
BLOCK DIAGRAM
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External Local Bus
Memory Controller
High Performance
MIPS32 4Km
MSP5000
LAN
Console
DMZ
SDRAM
Flash/USB
Security Engine
SPI/MPI
UART/SCC
10/100 MAC
10/100 MAC
Voice Engine
TDMs
WANs
Packet Engine
Serial
SLIC/SLACs
Real Time Clock
TDMs
Phones, PBX
Head Office:
PMC-Sierra, Inc.
8555 Baxter Place
Burnaby, B.C. V5A 4V7
Canada
Tel: 1.604.415.6000
Fax: 1.604.415.6200
MSP for Multi-Service Platforms and Intelligent IADs
To order documentation,
send email to:
document@pmc-sierra.com
or contact the head office,
Attn: Document Coordinator
PMC-2041691 (R2)
Copyright PMC-Sierra, Inc. 2004. All
rights reserved.
For a complete list of PMC-Sierra's
trademarks and registered trademarks,
visit: http://www.pmc-sierra.com/legal/
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE
MSP5000
Multi-Service Processor
All product documentation is available
on our web site at:
http://www.pmc-sierra.com
For corporate information,
send email to:
info@pmc-sierra.com
ELECTRICAL
369 pin PBGA
Vcc 3.3V I/O, 1.8V core
Power consumption 2W
SYSTEM PROCESSOR
High performance MIPS32 4Km
processor at 150 MHz
16 KB instruction cache, 16 KB data
cache
ULTRAFAST MULTI-SERVICE
BUS (MS BUS)
Peak bandwidth of 3.2 Gbit/s
True parallel processing
Fast path low latency voice
processing
Prioritized access
VOICE ENGINE
LSI ZSP processor up to 125 MHz
80 KB instruction, 80 KB data on-chip
SRAM
ADPCM hardware accelerator
TELEPHONY INTERFACE
Dual TDM interfaces each capable of
128 full duplex channels
PACKET ENGINE
LSI ZSP processor up to 125 MHz
80 KB instruction, 80 KB data on-chip
SRAM
WAN INTERFACE OPTIONS
UTOPIA I/II interface
Two Synchronous serial interfaces
LAN Interface
Two Independent 10/100 Ethernet
MACs (MII or 7-wire)
Supports VLAN tagging and DMZ
SECURITY ENGINE
Hardware accelerator for DES, 3DES,
MD5, and SHA-1
IPSec compliant
SYSTEM CONTROL
Eight interrupt inputs
GPIOs
MIPS timer, two system timers, and
watchdog timer
Block copy engine
Flexible external local bus interface
MISCELLANEOUS INTERFACES
UART
SPI/MPI
Two-wire serial
Two Serial communications controllers
(asynchronous, synchronous, HDLC)
MEMORY CONTROLLER
Glueless interface to 128 MB of
SDRAM
Glueless interface to 32 MB of flash
PACKET ENGINE FIRMWARE
AAL0, AAL1, AAL2, AAL5, ATM SAR,
OAM-F5 (loop back)
RFC1483 - Multiprotocol ncapsulation
over AAL5
QoS
CES support
VOICE PROCESSING
Voice CODECs (G.711, G.726,
G.729a/b, G.723.1)
G.168 echo cancellers
G.711-Fax, fax/modem tone detection
T.38 Fax relay
DTMF generation/detection
Call progress generation
Caller ID
Voice activity detection and comfort
noise
Silence suppression
Channel cross-switch and
conferencing
Gain control
Jitter buffer
Adaptive clocking
Packet playout
Hardware Fastpath (VoATM)
BLES VoATM profiles (9,10,11)
VoIP Inband caller ID/DTMF
processing of fax
CODEC switching and simultaneous
multiple CODECs
SOFTWARE
APIs: Voice and Packet engines,
MACs, Security engine, and Block
Copy
Sample code for voice gateway
interoperability verification, signaling,
and switching
Sample drivers for selected WAN
options (G.SHDSL, SDSL, T1)
CERTIFICATIONS
NIST certification for security
algorithms (FIPS 46-3, 81, and 180-1)
DEVELOPMENT TOOLS
Support for Linux and VxWorks
Evaluation boards
THIRD PARTY SUPPORT
Security Applications
Ashley Laurent - Broadway Engine
INTOTO - iGateway
SofaWare Technologies -
Safe@Office
Voice Processing
GIPS - Global IP Sound - NetEq
RADVISION - H.323, SIP, MGCP
EJTAG Debuggers
EPI - MAJIC probe
WindRiver - visionICE II
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