Document Outline
- FEATURES
- GENERAL DESCRIPTION
- QUICK REFERENCE DATA
- ORDERING INFORMATION
- BLOCK DIAGRAM
- PINNING
- FUNCTIONAL DESCRIPTION
- Y-signal path
- Colour-difference signal paths
- LIMITING VALUES
- THERMAL CHARACTERISTICS
- CHARACTERISTICS
- I 2 C-BUS FORMAT
- Remarks to the subaddress bytes
- INTERNAL CIRCUITRY
- TEST AND APPLICATION INFORMATION
- PACKAGE OUTLINE
- SOLDERING
- DEFINITIONS
- LIFE SUPPORT APPLICATIONS
- PURCHASE OF PHILIPS I 2 C COMPONENTS
DATA SHEET
Product specification
Supersedes data of June 1993
File under Integrated Circuits, IC02
1996 Dec 11
INTEGRATED CIRCUITS
TDA4671
Picture Signal Improvement (PSI)
circuit
1996 Dec 11
2
Philips Semiconductors
Product specification
Picture Signal Improvement (PSI) circuit
TDA4671
FEATURES
Luminance signal delay from 20 to 1100 ns (minimum
step 45 ns)
Luminance signal peaking with symmetrical overshoots
selectable
Selectable 2.6 or 5 MHz peaking centre frequency and
degree of peaking (
-
3, 0, +3 and +6 dB)
Selectable noise reduction by coring
Handles negative as well as positive colour-difference
signals
Selectable Colour Transient Improvement (CTI) to
decrease the colour-difference signal transient times to
those of the high frequency luminance signals
Selectable 5 or 12 V sandcastle input voltage
All controls selected via the I
2
C-bus
Timing pulse generation for clamping and delay time
control synchronized by sandcastle pulse
Automatic luminance signal delay correction using a
control loop
Luminance and colour-difference input signal clamping
with coupling capacitor
4.5 to 8.8 V supply voltage range
Minimum of external components.
GENERAL DESCRIPTION
The TDA4671 delays the luminance signal and improves
colour-difference signal transients. The luminance signal
can also be improved by peaking and noise reduction
(coring).
QUICK REFERENCE DATA
ORDERING INFORMATION
SYMBOL
PARAMETER
MIN.
TYP.
MAX.
UNIT
V
P
supply voltage (pins 1 and 5)
4.5
5
8.8
V
I
P(tot)
total supply current
31
41
52
mA
t
d(Y)
Y signal delay time
20
-
1130
ns
V
i(VBS)(p-p)
composite Y input signal (peak-to-peak value,
pin 16)
-
450
640
mV
V
i(CD)(p-p)
colour-difference input signal
(peak-to-peak value)
(R
-
Y) on pin 3
-
1.05
1.48
V
(R
-
Y) on pin 7
-
1.33
1.88
V
G
Y
gain of Y channel
-
-
1
-
dB
G
CD
gain of colour-difference channel
-
0
-
dB
T
amb
operating ambient temperature
0
-
70
C
TYPE
NUMBER
PACKAGE
NAME
DESCRIPTION
VERSION
TDA4671
DIP18
plastic dual in-line package; 18 leads (300 mil)
SOT102-1
1996 Dec 11
3
Philips Semiconductors
Product specification
Picture Signal Improvement (PSI) circuit
TDA4671
BLOCK DIAGRAM
handbook, full pagewidth
MED746
BLACK
LEVEL
CLAMP
180
ns
90
ns
45
ns
90
ns
100
ns
BLACK
LEVEL
CLAMP
450
ns
180
ns
control signal
100 nF
13
100 nF
14
10 nF
3
BLACK LEVEL
CLAMP
-
(R
-
Y)
DIFFERENTIATOR
DIFFERENTIATOR
10 nF
7
BLACK LEVEL
CLAMP
-
(B
-
Y)
V
ref
V
ref
V
ref
FULL-WAVE
RECTIFIER
FULL-WAVE
RECTIFIER
HIGH-PASS
FILTER
+
1
-
0.5
5 MHz
2.6 MHz
100
ns
90
ns
5 MHz
2.6 MHz
-
0.5
V
ref
V
ref
DELAY TIME
CONTROL
BK
SANDCASTLE PULSE
DETECTOR
BLACK LEVEL
CLAMP
sandcastle
5 V/12 V
CTI
on/off
coring
on/off
peaking
frequency
degree of
peaking
I
2
C-BUS RECEIVER
9
10
Y delay
BK
BK, H
+
V
16
17
I
2
C-BUS
V
ref
V
ref
100 nF
Y
8
18
5
V
P2
= 5 to 8 V
100 nF
2
sandcastle
pulse
SDA
SCL
CORING
PEAKING
CORING
I
2
C-BUS
I
2
C-BUS
I
2
C-BUS
100
nF
100 nF
15
V
P1
= 5 to 8 V
V
ref
GENERATION
1
-
(R
-
Y)
-
(B
-
Y)
Y
11
12
4
6
storage
capacitors
analog switch
analog switch
V
T
comparator
TDA4671
+
+
Fig.1 Block diagram.
1996 Dec 11
4
Philips Semiconductors
Product specification
Picture Signal Improvement (PSI) circuit
TDA4671
PINNING
SYMBOL
PIN
DESCRIPTION
V
P1
1
positive supply voltage 1
C
DL
2
capacitor of delay time control
V
i(R
-
Y)
3
(R
-
Y) colour-difference input signal
V
o(R
-
Y)
4
(R
-
Y) colour-difference output
signal
V
P2
5
positive supply voltage 2
V
o(B
-
Y)
6
(B
-
Y) colour-difference output
signal
V
i(B
-
Y)
7
(B
-
Y) colour-difference input signal
GND2
8
ground 2 (0 V)
SDA
9
I
2
C-bus serial data input/output
SCL
10
I
2
C-bus serial clock input
C
COR
11
coring capacitor
V
oY
12
delayed luminance output signal
C
CLP1
13
black level clamping capacitor 1
C
CLP2
14
black level clamping capacitor 2
C
ref
15
capacitor of reference voltage
V
iY
16
luminance input signal
SAND
17
sandcastle pulse input
GND1
18
ground 1 (0 V)
Fig.2 Pin configuration.
handbook, halfpage
TDA4671
MED747
1
2
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
10
VP1
VP2
CDL
GND2
SDA
Vi(R
-
Y)
Vo(R
-
Y)
Vo(B
-
Y)
Vi(B
-
Y)
GND1
SAND
ViY
VoY
Cref
CCLP2
CCLP1
CCOR
SCL
1996 Dec 11
5
Philips Semiconductors
Product specification
Picture Signal Improvement (PSI) circuit
TDA4671
FUNCTIONAL DESCRIPTION
The TDA4671 contains luminance signal processing and
colour-difference signal processing. The luminance signal
section comprises a variable, integrated luminance delay
line with luminance signal peaking and a noise reduction
by coring.
The colour-difference section consists of a transient
improvement circuit to decrease the rise and fall times of
the colour-difference signal transients. All functions and
parameters are controlled via the I
2
C-bus.
Y-signal path
The video and blanking signal is AC-coupled to the input
pin 16. Its black porch is clamped to a DC reference
voltage to ensure the correct operating range of the
luminance delay stage.
The luminance delay line consists of all-pass filter sections
with delay times of 45, 90, 100, 180 and 450 ns
(see Fig.1). The luminance signal delay is controlled via
the I
2
C-bus in steps of 45 ns in the range of 20 to 1100 ns,
this ensures that the maximum delay difference between
the luminance and colour-difference signals is
22.5 ns.
An automatic luminance delay time adjustment in an
internal control loop (with the horizontal frequency as a
reference) is used to correct changes in the delay time,
due to component tolerances. The control loop is
automatically enabled between the burst key pulses of
lines 16 (330) and 17 (331) during the vertical blanking
interval. The control voltage is stored in capacitor C
DL
connected to pin 2.
The peaking section is using a transversal filter circuit with
selectable centre frequencies of 2.6 and 5.0 MHz.
It provides selectable degrees of peaking of
-
3, 0, +3 and
+6 dB and noise reduction by coring, which attenuates the
high-frequency noise introduced by peaking.
The output buffer stage ensures a low-ohmic VBS output
signal on pin 12 (<160
). The gain of the luminance
signal path from pin 16 to pin 12 is unity.
An oscillation signal of the delay time control loop is
present on output pin 12 instead of the VBS signal. It is
present during the vertical blanking interval of the burst key
pulses in lines 16 (330) to 18 (332). This sync should not
be applied for synchronization.
Colour-difference signal paths
The colour-difference input signals (on pins 3 and 7) are
clamped to a reference voltage.
Each colour-difference signal is fed to a transient detector
and to an analog signal switch with an attached voltage
storage stage.
The transient detectors consist of differentiators and
full-wave rectifiers. The output voltages of both transient
detectors are added and then compared. The comparator
controls both following analog signal switches
simultaneously.
The analog signal switches are in open position at a
certain value of transient time; the held value (held by
capacitors) is then applied to the outputs. The switches
close to rapidly accept the actual signal levels at the end
of these transients. The improved transient time is
approximately 100 ns long independent of the input
transient time.
Colour-difference paths are independent of the input
signal polarity and have a nominal unity gain.
The CTI functions are switched on and off via the I
2
C-bus.
1996 Dec 11
6
Philips Semiconductors
Product specification
Picture Signal Improvement (PSI) circuit
TDA4671
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134). V
P1
and V
P2
as well as GND1 and GND2
connected together.
Note
1. Equivalent to discharging a 200 pF capacitor through a 0
series resistor.
THERMAL CHARACTERISTICS
CHARACTERISTICS
V
P1
= V
P2
= 5 V; nominal video amplitude V
VB
= 315 mV; t
H
= 64
s; t
BK
= 4
s (burst key); T
amb
= 25
C and
measurements taken in Fig.4; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
V
P1
supply voltage (pin 1)
0
8.8
V
V
P2
supply voltage (pin 5)
0
8.8
V
P
tot
total power dissipation
0
0.97
W
T
stg
storage temperature
-
25
+150
C
T
amb
operating ambient temperature
0
70
C
V
ESD
electrostatic handling
note 1
for pins 9 and 10
-
+300
V
-
-
500
V
for other pins
-
500
V
SYMBOL
PARAMETER
VALUE
UNIT
R
th j-a
thermal resistance from junction to ambient in free air
82
K/W
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
V
P1
supply voltage (pin 1)
4.5
5
8.8
V
V
P2
supply voltage (pin 5)
4.5
5
8.8
V
I
P(tot)
total supply current
31
41
52
mA
Y-signal path
V
i(Y)(p-p)
VBS input signal on pin 16
(peak-to-peak value)
-
450
640
mV
V
16
black level clamping voltage
-
3.1
-
V
I
16
input current
during clamping
95
-
190
A
outside clamping
-
-
0.1
A
R
16
input resistance
outside clamping
5
-
-
M
C
16
input capacitance
-
3
10
pF
t
d(Y)(max)
maximum Y delay time
set via I
2
C-bus
1070
1100
1130
ns
t
d(Y)(min)
minimum Y delay time
set via I
2
C-bus
-
20
-
ns
1996 Dec 11
7
Philips Semiconductors
Product specification
Picture Signal Improvement (PSI) circuit
TDA4671
t
d(Y)
minimum delay step
set via I
2
C-bus
40
45
50
ns
group delay time difference
f = 0.5 to 5 MHz;
maximum delay
-
0
25
ns
delay time difference between Y
and colour-difference signals
Y delay;
CTI and peaking off
70
100
130
ns
t
d(peak)
minimum delay time for peaking
185
215
245
ns
G
Y
VBS signal gain measured on
output pin 12 (composite signal,
peak-to-peak value)
V
o
/V
i
; f = 500 kHz;
maximum delay
-
2
-
1
0
dB
I
12
output current (emitter-follower with
constant current source)
source current
-
1
-
-
mA
sink current
0.4
-
-
mA
R
12
output resistance
-
-
160
f
res
frequency response for
maximum delay
f = 0.5 to 3 MHz
-
2
-
1
0
dB
f = 0.5 to 5 MHz
-
4
-
3
-
1
dB
LIN
signal linearity for
min
/
max
;
video contents of 315 mV (p-p)
V
VBS
= 450 mV (p-p)
0.85
-
-
-
video contents of 450 mV (p-p)
V
VBS
= 640 mV (p-p)
0.60
-
-
-
Luminance peaking, selected via I
2
C-bus
f
peak
peaking frequency
f
C1
; LCF-bit = 0
4.5
5
5.5
MHz
f
C2
; LCF-bit = 1
2.3
2.6
2.9
MHz
V
peak
peaking amplitude for grade of
peaking (f
C
amplitude over 0.5 MHz
amplitude)
selectable values
-
-
3
-
dB
-
0
-
dB
-
+3
-
dB
-
+6
-
dB
limitation of peaking (positive
amplitude of correction signal
referred to 315 mV)
-
20
-
%
V
n(rms)
noise voltage on pin 12
(RMS value)
without peaking;
f = 0 to 5 MHz
-
-
1
mV
COR
coring of peaking
(coring part referred to 315 mV)
COR-bit = 1
-
20
-
%
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
1996 Dec 11
8
Philips Semiconductors
Product specification
Picture Signal Improvement (PSI) circuit
TDA4671
Colour-difference paths measured with transient times t
r
= t
f
= 1
s; t
p H
1
s; V
i
= 1.33 V (p-p) on
pins 3 and 7 and with burst key pulse t
BK
= 4
s
V
i(CD)(p-p)
(R
-
Y) input signal
(peak-to-peak value; pin 3)
75% colour bar
-
1.05
1.48
V
(B
-
Y) input signal
(peak-to-peak value; pin 7)
75% colour bar
-
1.33
1.88
V
input transient sensitivity
V
3,7
/
t
0.22
-
-
V/
s
V
3,7
internal clamping voltage level
-
2.45
-
V
I
3,7
input current
outside clamping
-
-
1
A
during clamping
100
-
190
A
C
3,7
input capacitance
-
6
12
pF
V
4,6
DC output voltage
-
2
-
V
V
4,6
output offset voltage
R
S
300
; note 1
-
-
5
mV
during and after storage time
-
-
18
mV
V
spike
spurious spike signals on pins 4
and 6
R
S
300
; note 1
-
-
30
mV
I
4,6
output current (emitter-follower with
constant current source)
source current
-
1
-
-
mA
sink current
0.4
-
-
mA
R
4,6
output resistance
-
-
100
G
v
signal gain in each path
V
o
/V
i
-
1
0
+1
dB
G
v
gain difference
-
(R
-
Y)/
-
(B
-
Y)
-
0
0.3
dB
LIN
signal linearity for
min
/
max
;
nominal signal
V
i
= 1.33 V (p-p)
0.90
-
-
-
+3 dB signal
V
i
= 1.88 V (p-p)
0.65
-
-
-
V
o
signal reduction at higher frequency
(output signal ratio V
i
/V
o
)
signal with t
p H
= 50 ns;
t
r
= t
f
= 1
s
-
1.5
-
-
dB
Sandcastle pulse, input voltage selectable via I
2
C-bus
V
17
input voltage threshold for H and V
sync
SC5-bit = 0 (12 V)
1.1
1.5
1.9
V
input voltage threshold for burst
SC5-bit = 0 (12 V)
5.5
6.5
7.5
V
input voltage threshold for H and V
sync
SC5-bit = 1 (5 V)
1.1
1.5
1.9
V
input voltage threshold for burst
SC5-bit = 1 (5 V)
3.0
3.5
4.0
V
R
17
input resistance
+12 V input level
30
40
50
k
+5 V input level
15
20
25
k
C
17
input capacitance
-
4
8
pF
t
BK
burst key pulse width
3.0
4.0
4.6
s
t
d
leading edge delay for clamping
pulse
referred to t
BK
-
1
-
s
n
p
number of required burst key pulses
vertical blanking interval
note 2
4
-
31
-
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
1996 Dec 11
9
Philips Semiconductors
Product specification
Picture Signal Improvement (PSI) circuit
TDA4671
Notes
1. Crosstalk on output, measured in the unused channel when the other channel is provided with a nominal input signal
(CTI active).
2. A number of more than 31 burst key pulses repeats the counter cycle of delay time control.
I
2
C-BUS FORMAT
Notes
1. S = START condition.
2. SLAVE ADDRESS = 1000 100X.
3. ACK = acknowledge, generated by the slave.
4. SUBADDRESS = subaddress byte, see Table 1.
5. DATA = data byte, see Table 1.
6. P = STOP condition.
7. X = read/write control bit.
X = 0, order to write (the circuit is slave receiver).
X = 1, order to read (the circuit is slave transmitter).
If more than 1 byte of DATA is transmitted, then auto-increment of the subaddress is performed.
Table 1
I
2
C-bus transmission; see Table 2
I
2
C-bus control, SDA and SCL
V
IH
HIGH level input voltage on pins 9
and 10
3
-
5
V
V
IL
LOW level input voltage
0
-
1.5
V
I
9,10
input current
-
-
10
A
V
o(ACK)
output voltage at acknowledge on
pin 9
I
o(ACK)
= 3 mA
-
-
0.4
V
I
o(ACK)
output current at acknowledge on
pin 9
sink current
3
-
-
mA
S
(1)
SLAVE ADDRESS
(2)
ACK
(3)
SUBADDRESS
(4)
ACK
(3)
DATA
(5)
P
(6)
FUNCTION
SUBADDRESS
DATA
D7
D6
D5
D4
D3
D2
D1
D0
Y delay/CTI/SC
00010000
0
SC5
CTI
DL4
DL3
DL2
DL1
DL0
Peaking and coring 00010001
COR
PEAK
LCF
0
0
0
PCON1
PCON0
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
1996 Dec 11
10
Philips Semiconductors
Product specification
Picture Signal Improvement (PSI) circuit
TDA4671
Table 2
Function of the bits
Table 3
Peaking amplification
Remarks to the subaddress bytes
Subaddresses 00H to 0FH are reserved for colour decoders and RGB processors.
Subaddresses 10 and 11 only are acknowledged.
General call address is not acknowledged.
Power-on-reset: D7 to D1 bits of data bytes are set to logic 0, D0 bit is set to logic 1.
DATA
FUNCTION
LOGIC 1
LOGIC 0
DL0
set delay in luminance channel
45 ns
0 ns
DL1
90 ns
0 ns
DL2
180 ns
0 ns
DL3
180 ns
0 ns
DL4
450 ns
0 ns
CTI
set colour transient improvement
active
inactive
SC5
select sandcastle pulse voltage
+5 V
+12 V
LCF
set peaking frequency response
2.6 MHz
5.0 MHz
PEAK
set peaking delay
active
inactive
COR
set coring control
active
inactive
PCONx
set peaking amplification
see Table 3
PCON1
PCON0
GRADE OF PEAKING
(dB)
0
0
-
3
0
1
0
1
0
+3
1
1
+6
1996 Dec 11
11
Philips Semiconductors
Product specification
Picture Signal Improvement (PSI) circuit
TDA4671
INTERNAL CIRCUITRY
handbook, full pagewidth
MED749
+
+
+
+
13
C
CLP
+
14
C
CLP
15
C
ref
C
COR
11
SCL
10
12
Y output
9
SDA
8
GND
7
CD input
6
CD output
5
V
P
+
+
4
CD output
3
CD input
2
1
18
C
DL
+
+
+
+
16
Y input
17
SC
TDA4671
V
P
GND
all input
and output
pins without
pins 9 and 10
Fig.3 Internal circuit.
1996 Dec 11
12
Philips Semiconductors
Product specification
Picture Signal Improvement (PSI) circuit
TDA4671
handbook, full pagewidth
MED748
VP1
+
5 V
VB
18
17
16
15
14
13
12
11
10
VP2
CDL
GND2
SDA
SDA
I
2
C-bus
0.1
F
0.1
F
15
TDA4671
Vi(R
-
Y)
Vo(R
-
Y)
Vo(B
-
Y)
Vi(B
-
Y)
GND1
SAND
sandcastle
pulse input
(VBS)
(VBS)
ViY
VoY
Cref
CCLP2
CCLP1
CCOR
SCL
1
2
3
4
5
6
7
8
9
0.1
F
0.1
F
0.1
F
0.1
F
10 nF
10 nF
47
F
TEST AND APPLICATION INFORMATION
Fig.4 Test and application circuit.
1996 Dec 11
13
Philips Semiconductors
Product specification
Picture Signal Improvement (PSI) circuit
TDA4671
PACKAGE OUTLINE
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
JEDEC
EIAJ
SOT102-1
93-10-14
95-01-23
UNIT
A
max.
1
2
b
1
(1)
(1)
(1)
b
2
c
D
E
e
M
Z
H
L
mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
min.
A
max.
b
max.
w
M
E
e
1
1.40
1.14
0.53
0.38
0.32
0.23
21.8
21.4
6.48
6.20
3.9
3.4
0.254
2.54
7.62
8.25
7.80
9.5
8.3
0.85
4.7
0.51
3.7
inches
0.055
0.044
0.021
0.015
0.013
0.009
1.40
1.14
0.055
0.044
0.86
0.84
0.26
0.24
0.15
0.13
0.01
0.10
0.30
0.32
0.31
0.37
0.33
0.033
0.19
0.020
0.15
M
H
c
(e )
1
M
E
A
L
seating plane
A
1
w
M
b
1
b
2
e
D
A
2
Z
18
1
10
9
b
E
pin 1 index
0
5
10 mm
scale
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
DIP18: plastic dual in-line package; 18 leads (300 mil)
SOT102-1
1996 Dec 11
14
Philips Semiconductors
Product specification
Picture Signal Improvement (PSI) circuit
TDA4671
SOLDERING
Introduction
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our
"IC Package Databook" (order code 9398 652 90011).
Soldering by dipping or by wave
The maximum permissible temperature of the solder is
260
C; solder at this temperature must not be in contact
with the joint for more than 5 seconds. The total contact
time of successive solder waves must not exceed
5 seconds.
The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified maximum storage temperature (T
stg max
). If the
printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the
temperature within the permissible limit.
Repairing soldered joints
Apply a low voltage soldering iron (less than 24 V) to the
lead(s) of the package, below the seating plane or not
more than 2 mm above it. If the temperature of the
soldering iron bit is less than 300
C it may remain in
contact for up to 10 seconds. If the bit temperature is
between 300 and 400
C, contact may be up to 5 seconds.
DEFINITIONS
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
PURCHASE OF PHILIPS I
2
C COMPONENTS
Data sheet status
Objective specification
This data sheet contains target or goal specifications for product development.
Preliminary specification
This data sheet contains preliminary data; supplementary data may be published later.
Product specification
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
Purchase of Philips I
2
C components conveys a license under the Philips' I
2
C patent to use the
components in the I
2
C system provided the system conforms to the I
2
C specification defined by
Philips. This specification can be ordered using the code 9398 393 40011.
1996 Dec 11
15
Philips Semiconductors
Product specification
Picture Signal Improvement (PSI) circuit
TDA4671
NOTES
Internet: http://www.semiconductors.philips.com
Philips Semiconductors a worldwide company
Philips Electronics N.V. 1996
SCA52
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
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under patent- or other industrial or intellectual property rights.
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Printed in The Netherlands
537021/1200/03/pp16
Date of release: 1996 Dec 11
Document order number:
9397 750 01472
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