1995 Nov 15

Philips Semiconductors

Product specification

Bitstream continuous calibration filter-DAC
with headphone driver and DSP

TDA1548T

FEATURESPRODUCT SPECIFICATION

Easy application

Only first-order analog post-filtering required

Headphone amplifiers and digital filter integrated

Component saving common headphone output

Selectable system clock (SYSCLK) 64f

, 256f

or 384f

16, 18 or 20 bits I

S-bus or LSB justified serial input

format

Input pins suitable with 5 V low supply voltage
interfacing

Small package (SSOP28)

Single rail supply (3 V).

High performance

Superior signal-to-noise ratio

Wide dynamic range

Continuous calibration digital-to-analog conversion
combined with noise shaping technique.

Features

Low power dissipation

Digital volume control

Soft mute

Digital tone control (Bass Boost and Treble)

Digital de-emphasis

Analog control of digital sound control functions.

GENERAL DESCRIPTION

The TDA1548T is a dual CMOS digital-to-analog converter
(DAC) with up-sampling filter and noise shaper and

integrated headphone driver featuring unique signal
processing functions. The digital processing features are
of high sound processing quality due to the wide dynamic
range of the bitstream conversion technique.

The TDA1548T supports the I

S-bus data input mode with

word lengths of up to 20 bits and the LSB justified serial
data input format with word lengths of 16, 18 or 20 bits.
The clock system is selectable (64f

, 256f

or 384f

) by

means of selection pins. Two cascaded half band filters,
linear interpolator and a sample-and-hold function
increase the oversampling rate from 1f

to 64f

A second-order noise shaper converts this oversampled
data into a bitstream for the 5-bit continuous calibration
DACs.

On board amplifiers convert the output current to a voltage
signal capable of driving a headphone or line output.
The common operational amplifier application eliminates
the need for capacitors.

The TDA1548T has some sound processing functions
which are controllable by a potentiometer. These functions
are volume, bass boost and treble. The flat/min/max
switch can also be controlled by a potentiometer.
The analog values are converted to a digital code, which is
then further translated internally to a set of coefficients for
either volume, bass boost or treble.

ORDERING INFORMATION

TYPE

NUMBER

PACKAGE

NAME

DESCRIPTION

VERSION

TDA1548T

SO28

plastic small outline package; 28 leads; body width 7.5 mm

SOT136-1

TDA1548TZ

SSOP28

plastic shrink small outline package; 28 leads; body width 5.3 mm

SOT341-1

1995 Nov 15

Philips Semiconductors

Product specification

Bitstream continuous calibration filter-DAC
with headphone driver and DSP

TDA1548T

QUICK REFERENCE DATA

Notes

1. All V

and V

pins must be connected to the same supply or ground respectively.

2. Measured at input code 00000H and V

= 3 V.

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

supply voltage

note 1

2.7

3.0

4.0

supply current

note 2

oFS(rms)

full-scale output voltage

= 3 V

0.57

0.64

0.71

(THD+N)/S

total harmonic distortion
plus noise as a function of
signal

0 dB signal

0.056

0.1

0 dB signal; R

= 5 k

0.006

0.013

60 dB signal; R

= 32

or R

= 5 k

dBA

1.778

3.162

S/N

signal-to-noise ratio

A-weighted;
at code 00000H

dBA

input bit rate at data input

sys

= 384f

48f

sys

= 256f

64f

sys

= 64f

64f

sys

system clock frequency

2.048

18.432

MHz

full-scale temperature
coefficient at analog
outputs (VOL and VOR)

100

amb

operating ambient
temperature

+70

1995 Nov 15

Philips Semiconductors

Product specification

Bitstream continuous calibration filter-DAC
with headphone driver and DSP

TDA1548T

BLOCK DIAGRAM

Fig.1 Block diagram.

handbook, full pagewidth

16 (4-bit)

CALIBRATED

CURRENT
SOURCES

16 (4-bit)

CALIBRATED

CURRENT

SINKS

LEFT

OUTPUT

SWITCHES

16 (4-bit)

CALIBRATED

CURRENT
SOURCES

16 (4-bit)

CALIBRATED

CURRENT

SINKS

RIGHT

OUTPUT

SWITCHES

REFERENCE

SOURCE

2nd ORDER

NOISE SHAPER

DATA

ENCODER

2nd ORDER

NOISE SHAPER

DATA

ENCODER

8 x OVERSAMPLING

(SAMPLE-AND-HOLD)

8 x OVERSAMPLING

(SAMPLE-AND-HOLD)

LINEAR INTERPOLATOR

FILTER STAGE 2

FILTER STAGE 1

SOUND CONTROL

SERIAL DATA INPUT

SOFT MUTE CONTROL

VOLUME CONTROL

VOLUME

AND

SOUND

CONTROL

DDA

SSA

Vref

OP4

OP2

OP3

OP1

6 k

1 fs

2 fs

4 fs

8 fs

TIMING

MUTE

DEEM

AD3S

ADVC

ADBB

ADTR

ADref

IF1

IF2

DATA

BCK

SYSCLK

CLSEL

MODE0

MODE1

SSD

DDD

CONV2

CONV1

1.2 k

FILTCR

FILTCL

VOR

1.8 nF

CEXT2

VOL

1.8 nF

CEXT1

MGC668

TDA1548T

SSO

SSA

DDO

DDA

COM

1995 Nov 15

Philips Semiconductors

Product specification

Bitstream continuous calibration filter-DAC
with headphone driver and DSP

TDA1548T

PINNING

SYMBOL

PIN

DESCRIPTION

SSO

operational amplifier ground

COM

common output pin

VOL

left channel audio voltage output

FILTCL

capacitor for left channel first-order
filter function should be connected
between this pin and VOL (pin 3)

MODE0

mode 0 selection pin

MODE1

mode 1 selection pin

BCK

bit clock input

word select input

DATA

data input

DDD

digital supply voltage

SSD

digital ground

SYSCLK

system clock 64f

, 256f

or 384f

IF1

input format selection 1

IF2

input format selection 2

DEEM

de-emphasis input (f

= 44.1 kHz)

(active HIGH)

MUTE

soft-mute input (active HIGH)

CLSEL

system clock selection input

ref

reference voltage output to
external potentiometer

ADTR

analog sense input for treble
setting

ADBB

analog sense input for bass boost
setting

ADVC

analog sense input for volume
control setting

AD3S

3-position switch input for
flat/min/max setting

DDA

analog supply voltage

SSA

analog ground

ref

internal reference voltage
(0.5V

DDA

typ)

FILTCR

capacitor for right channel
first-order filter function should be
connected between this pin and
VOR (pin 27)

VOR

right channel audio voltage output

DDO

operational amplifier supply
voltage

Fig.2 Pin configuration.

handbook, halfpage

TDA1548T

MGC669

SSO

COM

VOL

FILTCL

MODE0

MODE1

BCK

DATA

DDD

SSD

SYSCLK

IF1

IF2

DDO

VOR

FILTCR

ref

SSA

DDA

AD3S

ADVC

ADBB

ADTR

ref

CLSEL

MUTE

DEEM

1995 Nov 15

Philips Semiconductors

Product specification

Bitstream continuous calibration filter-DAC
with headphone driver and DSP

TDA1548T

FUNCTIONAL DESCRIPTION

The TDA1548T CMOS DAC incorporates an up-sampling
digital filter, a linear interpolator, a noise shaper,
continuous calibrated current sources and headphone
amplifiers. The 1f

input data is increased to an

oversampling rate of 64f

. This high-rate oversampling,

together with the 5-bit DAC, enables the filtering required
for waveform smoothing and out-of-band noise reduction
to be achieved by simple first-order analog post-filtering.

System clock and data input format

The TDA1548T accommodates slave mode only, this
means that in all applications the system devices must
provide the system clock. The system frequency is
selectable at pins CLSEL, MODE0 and MODE1
(see Table 1).

The TDA1548T supports the following data input modes
(see Table 2):

S-bus with data word length of up to 20 bits

LSB justified serial format with data word length of 16,
18 or 20 bits.

The input formats are illustrated in Fig.4. Left and right
data-channel words are time multiplexed.

Analog control of digital sound processing features

Digital sound processing settings are controlled via analog
sense inputs that translate an analog voltage from, for
example, a potentiometer wiper to a digital code, which is
then further translated internally to a set of coefficients for
either treble, bass boost or volume.

The analog input value is acquired by an internal 6-bit
ADC, sampling the three input pins ADVC, ADBB and
ADTR and the three-mode selection pin ADS3 (see
Section "Single pin three mode selection") in a multiplexed
fashion. Sampling of the input voltage is performed by a
straight forward technique of linear approximation; from
the starting value of 0 V, an internal linear approximation
voltage is incremented periodically in steps of 1/66th of the
scale, with an internal comparator detecting when the
approximation value oversteps the input value. Tolerance
is built in at the top and bottom end of the scale by
dimensioning the resistive elements at the top and bottom
of the ladder equals 1R. Thus the ladder is built up of
64 elements of value R, two of value R, making a typical
quantization step size of approximately 1.5 V (AD

ref

)

divided-by-66 (amount of Rs), equals 22.7 mV.

For each multiplexed timeslot the full approximation cycle
is completed, immediately after which the next input will
start being sampled.

The time slot for one input lasts 64 steps at a step advance
rate of 8

, which amounts to 181

s at f

= 44.1 kHz.

Because four inputs are multiplexed, the sample rate for
each analog input is 1.38 kHz.

A buffered version of an internally generated reference
voltage is available at output pin AD

ref

. Because the

internal AD derives from the same reference voltage, this
allows for optimum mapping of the external analog control
value onto the useful AD input voltage range. The idea is
to bias a potentiometer to AD

ref

, using a wiper to control

the input voltage between 0 V and AD

ref

. Hysteresis is

implemented to improve noise immunity of the AD in order
to prevent a stable setting of the potentiometer, to a point
near a quantization threshold, from producing two
alternating digital codes which could give rise to audible
volume or boost changes. An hysteresis of 1 LSB is
implemented digital. A shift in code must be at least 2 LSB
either up or down from the current value, otherwise the
internal digital code will remain at the current value.

INGLE PIN THREE MODE SELECTION

A special input pin AD3S (pin 22), controls the mode in
which the sound processing block operates. Not between
two but three modes; whether the DSP should follow the
AD inputs applying maximum effect, the minimum effect or
overrule the boost effects thereby resulting in a flat
frequency characteristic in the treble and bass boost
sections.

Internally the same AD is used to detect the input level
present at this pin as is used for the three sound control
pins. An internal bias circuit containing of two MOSTs
supplies a mid-range voltage so that this input can be
operated with a minimum of external components. A HIGH
or LOW input level is created by tying the pin to AD

ref

ground respectively, the intermediate value is achieved by
leaving the pin open-circuit.

Volume control

Since there is no headroom included into the sound control
section, the volume control precedes the sound control.
Full volume and neutral setting (flat) of the sound control
results in a full-scale output. Any tone boost will
immediately cause clipping, which can be avoided by
reducing the volume setting.

1995 Nov 15

Philips Semiconductors

Product specification

Bitstream continuous calibration filter-DAC
with headphone driver and DSP

TDA1548T

Soft mute

Soft mute is controlled by MUTE (pin 16). When the input
is active HIGH the value of the sample is decreased
smoothly to zero following a raised cosine curve.
32 coefficients are used to step down the value of the data,
each one being used 32 times before stepping on to the
next. This amounts to a mute transition time of 23 ms at
f

= 44.1 kHz. When MUTE is released (LOW), the

samples are returned to the full level again following a
raised cosine curve with the same coefficients being used
in the reverse order. Mute is synchronized to the sample
clock, so that the operation always takes place on
complete samples.

Digital sound processing features

ASS BOOST

A strong bass boost effect, which is useful in
compensating for poor bass response of portable
headphone sets, is implemented digitally in the TDA1548T
and can be controlled by ADBB (pin 20) and AD3S
(pin 22). Table 3 shows the bass boost values at different
input voltages. Table 4 shows the selection mode status
(flat/min/max) at different input voltages. Valid settings
range from "flat" (no influence on audio) to +18 dB with
step sizes of 2 dB in "minimum" and to +24 dB with step
sizes of 2 dB in "maximum". The programmable bass
boost filter is a second-order shelving type with a fixed
corner frequency of 130 Hz for the "minimum" setting and
a fixed corner frequency of 230 Hz for the "maximum"
setting and has a Butterworth characteristic. Because of
the exceptional amount of programmable gain, bass boost
should be used in conjunction with adequate prior
attenuation, using the volume control.

REBLE

A treble effect is implemented digitally in the TDA1548T
and can be controlled by ADTR (pin 19) and AD3S
(pin 22). Table 3 shows the treble values at different input
voltages. Table 4 shows the selection mode status
(flat/min/max) at different input voltages. Valid settings
range from "flat" (no influence on audio) to +6 dB with step
sizes of 2 dB in "minimum" and to +6 dB with a step size of
2 dB in "maximum". The programmable treble filter is a
first-order shelving type with a fixed corner frequency of
2.8 kHz for the "minimum" setting and a fixed corner
frequency of 5.0 kHz for the "maximum" setting.

EMPHASIS

De-emphasis is controlled by DEEM (pin 15). The digital
de-emphasis filter is dimensioned to produce the

de-emphasis frequency characteristics for the sample rate
44.1 kHz. With its 18-bit dynamic range, the digital
de-emphasis of the TDA1548T is a convenient and
component-saving alternative to analog de-emphasis.

When the DEEM pin is active HIGH, de-emphasis is
enabled. De-emphasis is synchronized to the sample
clock, so that operation always takes place on complete
samples.

Oversampling filter and noise shaper

The digital filter is a four times oversampling filter.
It consists of two sections which each increase the sample
rate by 2.

The second order noise shaper operates at 64f

. It shifts

in-band quantization noise to frequencies well above the
audio band. This noise shaping technique, used in
combination with a sign-magnitude coding, enables high
signal-to-noise ratios to be achieved. The noise shaper
outputs a 5-bit PDM bitstream signal to the DAC.

Continuous calibration DAC

The dual 5-bit DAC uses the continuous calibration
technique. This method, based on charge storage,
involves exact duplication of a single reference current
source. In the TDA1548T, 32 such current sources
plus 1 spare source are continuously calibrated.
The spare source is included to allow continuous converter
operation.

The DAC receives a 5-bit data bitstream from the noise
shaper. This data is converted to a sign-magnitude code
so that no current is switched to the output during digital
silence (input 00000H). In this way very high
signal-to-noise performance is achieved.

Component-saving stereo headphone driver

High precision, low-noise amplifiers together with the
internal conversion resistors R

CONV1

and R

CONV2

convert

the converter output current to a voltage capable of driving
a line output or headphone. The voltage is available at
VOL and VOR (0.64 V RMS typical).

A major component saving feature of the TDA1548T is that
no DC-blocking capacitors are needed in the application,
despite the asymmetrical supply. The V

COM

output, pin 2,

is biased to the same voltage that the right and left channel
voltage outputs are, V

ref

, and is capable of sinking the sum

of left and right channel load currents. Therefore,
connecting a load between one of the outputs and V

COM

only gives rise to a negligible amount of DC current
through the load.

1995 Nov 15

Philips Semiconductors

Product specification

Bitstream continuous calibration filter-DAC
with headphone driver and DSP

TDA1548T

Table 1

System clock selection

PINS

DESCRIPTION

CLSEL

MODE0

MODE1

256f

64f

reserved 1

384f

reserved 2

reserved 3

Table 2

Data input formats

PINS

FORMAT

IF1

IF2

S-bus

LSB justified, 16 bits

LSB justified, 18 bits

LSB justified, 20 bits

Table 3

Relationship between VC, BB and TR

ANALOG INPUT VALUES (V);

PINS ADTR, ADBB AND ADVC

VOLUME

(ADVC)

BASS BOOST

(ADBB)

TREBLE (ADTR)

MAX.

MIN.

MAX.

MIN.

ref

65/66

ref

64/66

ref

63/66

ref

62/66

ref

61/66

ref

60/66

ref

59/66

ref

58/66

ref

57/66

ref

56/66

ref

55/66

ref

54/66

ref

53/66

ref

52/66

ref

51/66

ref

50/66

ref

49/66

....

ref

48/66

....

ref

47/66

....

ref

46/66

....

ref

45/66

....

ref

44/66

....

ref

/4366

....

ref

42/66

....

ref

41/66

....

ref

40/66

....

ref

39/66

....

1995 Nov 15

Philips Semiconductors

Product specification

Bitstream continuous calibration filter-DAC
with headphone driver and DSP

TDA1548T

Table 4

Relationship mode selection

ref

38/66

....

ref

37/66

....

ref

36/66

....

ref

5/66

ref

4/66

ref

3/66

ref

2/66

ANALOG INPUT VALUE (V);

PIN AD3S

FLAT, MINIMUM OR MAXIMUM

ref

65/66

flat

ref

64/66

flat

....

ref

51/66

flat

ref

50/66

flat

ref

49/66

minimum

ref

48/66

minimum

....

ref

19/66

minimum

ref

18/66

minimum

ref

17/66

maximum

ref

16/66

maximum

....

ref

3/66

maximum

ref

2/66

maximum

ANALOG INPUT VALUES (V);

PINS ADTR, ADBB AND ADVC

VOLUME

(ADVC)

BASS BOOST

(ADBB)

TREBLE (ADTR)

MAX.

MIN.

MAX.

MIN.

1995 Nov 15

Philips Semiconductors

Product specification

Bitstream continuous calibration filter-DAC
with headphone driver and DSP

TDA1548T

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

Notes

1. All V

and V

connections must be made to the same power supply.

2. Equivalent to discharging a 100 pF capacitor via a 1.5 k

series resistor. Pin 18 =

1500 V (min) and +1500 V

(max).

3. Equivalent to discharging a 200 pF capacitor via a 2.5

H series inductor.

THERMAL CHARACTERISTICS

QUALITY SPECIFICATION

In accordance with UZW-BO/FQ-0601. The numbers of the quality specification can be found in the

"Quality Reference

Handbook". The Handbook can be ordered using the code 9397 750 00192.

SYMBOL

PARAMETER

CONDITIONS

MIN.

MAX.

UNIT

supply voltage

note 1

4.5

xtal

maximum crystal temperature

+150

stg

storage temperature

+125

amb

operating ambient temperature

+70

electrostatic handling

note 2

3000

+3000

note 3

300

+300

SYMBOL

DESCRIPTION

VALUE

UNIT

th j-a

thermal resistance from junction to ambient in free air

SO28

K/W

SSOP28

K/W

1995 Nov 15

Philips Semiconductors

Product specification

Bitstream continuous calibration filter-DAC
with headphone driver and DSP

TDA1548T

DC CHARACTERISTICS
All voltages referenced to ground (pins 1, 11 and 24); V

DDD

= V

DDA

= V

DDO

= 3 V; T

amb

= 25

C, R

= 32

(note 1);

common operational amplifier application; unless otherwise specified.

Notes

1. R

is the AC impedance of the external circuitry connected to the audio outputs of the application circuit.

2. All power supply pins (V

and V

) must be connected to the same external power supply unit.

3. No operational amplifier load resistor.

4. Load capacitance greater than 50 pF, an inductor of 22

H connected in parallel with a resistor of 270

must be

inserted between the load and the operational amplifier output.

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

DDD

digital supply voltage pin 10

note 2

2.7

3.0

4.0

DDA

analog supply voltage pin 23 note 2

2.7

3.0

4.0

DDO

opamp supply voltage pin 28 note 2

2.7

3.0

4.0

DDD

digital supply current

at digital silence

4.5

DDA

analog supply current

at digital silence

4.5

DDO

opamp supply current

at digital silence; note 3

6.0

tot

total power dissipation

note 3

Digital inputs

HIGH level input voltage on
pins 5 to 9 and 12 to 17

0.7V

DDD

LOW level input voltage on
pins 5 to 9 and 12 to 17

0.3V

DDD

input leakage current on
pins 7 to 9 and 12 to 17

input capacitance on
pins 5 to 9 and 12 to 17

Analog inputs pins ADVC, ADBB, ADTR and AD3S

RES

input resolution

bit

input capacitance

input resistance

pins ADBB, ADTR and ADVC

pin AD3S

Analog reference pin AD

ref

ADref

reference voltage pin 18

0.45V

DDA

0.5V

DDA

0.55V

DDA

L(ADref

)

reference output load pin 18

3.0

Analog audio pins

ref

reference voltage pin 25

with respect to V

SSO

0.45V

DDA

0.5V

DDA

0.55V

DDA

output resistance pin 25

CONV

current-to-voltage
conversion resistor

1.2

O(max)

maximum output current

(THD + N)/S < 0.1%

output load capacitance

note 4

1995 Nov 15

Philips Semiconductors

Product specification

Bitstream continuous calibration filter-DAC
with headphone driver and DSP

TDA1548T

AC CHARACTERISTICS (ANALOG)
All voltages referenced to ground (pins 2, 9 and 23); V

DDD

= V

DDA

= V

DDO

= 3 V; f

= 1 kHz; T

amb

= 25

C, R

= 32

(note 1); common operational amplifier application; unless otherwise specified.

Note

1. R

is the AC impedance of the external circuitry connected to the audio outputs of the application circuit.

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

RES

input resolution

bit

sAD

AD sample frequency

/32

kHz

ADref

input voltage range

ADref

FS(rms)

output voltage swing (RMS
value) (pins 3 and 27)

0.57

0.64

0.71

DC(os)

DC offset output voltage
w.r.t. reference voltage
level V

ref

full scale temperature
coefficient

100

SVRR

supply voltage ripple
rejection V

DDA

and V

DDO

= 10

F; f

ripple

= 1 kHz;

ripple

= 100 mV (peak)

UNBAL

unbalance between the 2
DAC voltage outputs
(pins 3 and 27)

maximum volume

0.1

crosstalk between the 2
DAC voltage outputs
(pins 3 and 27)

one output digital silence the
other maximum volume

one output digital silence the
other maximum volume
R

= 5 k

crosstalk between the 2
DAC voltage outputs
(pins 3 and 27) with R

connected to ground

one output digital silence the
other maximum volume

one output digital silence the
other maximum volume
R

= 5 k

100

(THD+N)/S

total harmonic distortion
plus noise as a function of
signal

0 dB signal

0.056

0.1

0 dB signal; R

= 5 k

0.006

0.013

60 dB signal; R

= 32

= 5 k

dBA

1.778

3.162

S/N

signal-to-noise ratio at
bipolar zero

A-weighted at code 00000H

dBA

1995 Nov 15

Philips Semiconductors

Product specification

Bitstream continuous calibration filter-DAC
with headphone driver and DSP

TDA1548T

AC CHARACTERISTICS (DIGITAL)
All voltages referenced to ground (pins 2, 9 and 23); V

DDD

= V

DDA

= V

DDO

= 2.7 to 4.0 V; T

amb

= +70

C, R

= 32

(note 1); unless otherwise specified.

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

clock cycle

sys

= 384f

54.2

59.1

81.3

sys

= 256f

81.3

88.6

122

sys

= 64f

325.5

354.3

488.3

CW(L)

sys

LOW level pulse width

CW(H)

sys

HIGH level pulse width

Serial input data timing (see Fig.3)

clock input = data input rate

sys

= 384f

48f

sys

= 256f

64f

sys

= 64f

64f

sys

system clock frequency

2.048

18.432

MHz

word select input frequency

44.1

48.0

kHz

rise time

fall time

BCK(H)

bit clock HIGH time

BCK(L)

bit clock LOW time

s;DAT

data set-up time

h;DAT

data hold time

s;WS

word select set-up time

h;WS

word select hold time

Fig.3 Timing of input signals.

handbook, full pagewidth

MGC670

BCK(H)

BCK(L)

h;WS

s;WS

s;DAT

h;DAT

SAMPLE OUT

Tcy

RIGHT

LEFT

BCK

DATA

LSB

MSB

1995

Nov

Philips Semiconductors

Product

specification

Bitstream continuous calibration filter-DAC

with headphone driver and DSP

TDA1548T

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handbook, full pagewidth

MGC671

MSB

LEFT

LSB JUSTIFIED FORMAT 16 BITS

BCK

DATA

RIGHT

B15

LSB

MSB

B15

LSB

= 8

LEFT

INPUT FORMAT I

BCK

DATA

RIGHT

= 8

LEFT

LSB JUSTIFIED FORMAT 18 BITS

BCK

DATA

RIGHT

MSB

B17

LSB

MSB

B17

LSB

LEFT

LSB JUSTIFIED FORMAT 20 BITS

BCK

DATA

RIGHT

MSB

B19

LSB

MSB

B19

LSB

Fig.4 Data input formats.

1995 Nov 15

Philips Semiconductors

Product specification

Bitstream continuous calibration filter-DAC
with headphone driver and DSP

TDA1548T

TEST AND APPLICATION INFORMATION

Filter characteristics

Table 5

Digital filter characteristics (f

= 44.1 kHz)

The band frequencies scale with the sample frequency.

BAND

ATTENUATION

0 to 20 kHz

0.001 dB

24 to 64 kHz

39 dB

64 to 69 kHz

33 dB

69 to 88 kHz

37 dB

handbook, full pagewidth

Vref

MUTE

DEEM

AD3S

FLAT

MID

MAX

ADVC

ADBB

ADTR

ADref

IF1

IF2

DATA

BCK

SYSCLK

CLSEL

MODE0

MODE1

VSSD VDDD

FILTCR

FILTCL

VOR

VOL

TDA1548T

VSSO

VSSA

VDDO

VDDA

VCOM

10 k

330

100

4.7

100 nF

100

3 V

S-BUS OR

LSB-JUSTIFIED

SERIAL INPUT DATA

SYSTEM

CLOCK

INPUT

(1)
(2)

(1)

RIGHT

330

100

(1)

LEFT

MGB709

Fig.5 Application diagram.

(1) Optional.

(2) Chip inductor BLM32A07.

1995 Nov 15

Philips Semiconductors

Product specification

Bitstream continuous calibration filter-DAC
with headphone driver and DSP

TDA1548T

PACKAGE OUTLINES

UNIT

max.

(1)

REFERENCES

OUTLINE

VERSION

EUROPEAN

PROJECTION

ISSUE DATE

IEC

JEDEC

EIAJ

inches

2.65

0.30
0.10

2.45
2.25

0.49
0.36

0.32
0.23

18.1
17.7

7.6
7.4

1.27

10.65
10.00

1.1
1.0

0.9
0.4

8
0

0.25

0.1

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

Note

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

1.1
0.4

SOT136-1

detail X

(A )

0.25

075E06

MS-013AE

pin 1 index

0.10

0.012
0.004

0.096
0.089

0.019
0.014

0.013
0.009

0.71
0.69

0.30
0.29

0.050

1.4

0.055

0.419
0.394

0.043
0.039

0.035
0.016

0.01

0.25

0.01

0.004

0.043
0.016

0.01

10 mm

scale

SO28: plastic small outline package; 28 leads; body width 7.5 mm

SOT136-1

95-01-24
97-05-22

1995 Nov 15

Philips Semiconductors

Product specification

Bitstream continuous calibration filter-DAC
with headphone driver and DSP

TDA1548T

SOLDERING

Introduction

There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.

This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our

"IC Package Databook" (order code 9398 652 90011).

Reflow soldering

Reflow soldering techniques are suitable for all SO and
SSOP packages.

Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.

Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method. Typical reflow temperatures range from
215 to 250

Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45

Wave soldering

Wave soldering techniques can be used for all SO
packages if the following conditions are observed:

A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave) soldering
technique should be used.

The longitudinal axis of the package footprint must be
parallel to the solder flow.

The package footprint must incorporate solder thieves at
the downstream end.

SSOP

Wave soldering is not recommended for SSOP packages.
This is because of the likelihood of solder bridging due to
closely-spaced leads and the possibility of incomplete
solder penetration in multi-lead devices.

If wave soldering cannot be avoided, the following
conditions must be observed:

A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave)
soldering technique should be used.

The longitudinal axis of the package footprint must
be parallel to the solder flow and must incorporate
solder thieves at the downstream end.

Even with these conditions, only consider wave
soldering SSOP packages that have a body width of
4.4 mm, that is SSOP16 (SOT369-1) or
SSOP20 (SOT266-1).

ETHOD

(SO

AND

SSOP)

During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.

Maximum permissible solder temperature is 260

C, and

maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150

C within

6 seconds. Typical dwell time is 4 seconds at 250

A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.

Repairing soldered joints

Fix the component by first soldering two diagonally-
opposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300

C. When

using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320

1995 Nov 15

Philips Semiconductors

Product specification

Bitstream continuous calibration filter-DAC
with headphone driver and DSP

TDA1548T

DEFINITIONS

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

Data sheet status

Objective specification

This data sheet contains target or goal specifications for product development.

Preliminary specification

This data sheet contains preliminary data; supplementary data may be published later.

Product specification

This data sheet contains final product specifications.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

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SCD45

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Document Outline

Ð­Ð»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: TDA1548TZ

Document Outline

ÐÐ»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: TDA1548TZ