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Электронный компонент: SAA7750-N1D

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DATA SHEET
Preliminary Specification version 1.3
File under Integrated Circuits, <Handbook>
2002 Jan 21
INTEGRATED CIRCUITS
Generic device for portable
multimedia applications
SAA7750-N1D
2002 Jan 21
2
Philips Semiconductors
Preliminary Specification version 1.3
SAA7750-N1D
Generic device for portable
multimedia applications
CONTENTS
1
FEATURES
1.1
Hardware Features
1.2
General Features
1.3
Software features
2
GENERAL DESCRIPTION
3
APPLICATIONS
4
BLOCK DIAGRAM
5
PINNING
6
HARDWARE DESCRIPTION SSA
6.1
ARM720T microcontroller
6.1.1
Overview
6.1.2
BLOCK DIAGRAM
6.1.3
The THUMB Concept
6.2
Internal busses
6.2.1
Advanced High-performance Bus (AHB)
6.2.2
AHB Address Decoder
6.3
Memory controllers
6.3.1
Overview
6.3.2
Static Memory Controller
6.3.3
SDRAM Interface Controller
6.3.4
Internal Memory Controller
6.3.5
FLASH memory controller
6.3.5.1
FLASH reads
6.3.5.2
Erasing the FLASH block
6.3.5.3
Programming the FLASH block
6.3.5.4
Operating conditions
6.4
Interrupt Controller
6.4.1
Overview
6.4.2
Functional Description
6.5
Power Management Unit (PMU)
6.5.1
Functional Description
6.5.2
Wake-up behaviour
6.5.3
Watchdog behaviour
6.5.4
Pause behaviour
6.5.5
Power down behaviour
6.5.5.1
Power down Request
6.5.5.2
Power down Acknowledge
6.6
Oscillators and clock generation
6.6.1
Overview clock generation module
6.6.2
Functional Description
6.7
Multi Media Card Interface (MMC)
6.7.1
Choice of flash memory cards
6.8
10-bit ADC
6.8.1
Overview
6.8.2
Functional description
6.8.3
Multi channel A/D conversion scan
6.8.4
ADC resolution
6.8.5
Interrupts
6.9
UART
6.9.1
Functional Description
6.9.2
UART Pin Description
6.9.3
BaudRate Generator
6.10
General Purpose I/O
6.10.1
Functional Description
6.10.2
Interrupts
6.11
Real Time Clock (RTC)
6.11.1
Functional Description
6.11.2
Interrupts
6.11.3
Power Down operation
6.12
Timers
6.12.1
Functional description
6.12.2
Interrupts
6.13
Watchdog Timer
6.13.1
Functional description
6.13.2
Interrupts
6.14
IIC master Interface
6.14.1
Functional Description
6.14.2
Interrupt
6.15
IIC slave Interface
6.15.1
Functional description
6.15.2
Interrupt
6.16
LCD Interface
6.16.1
Functional Description
6.16.2
Interface
6.16.3
System Interface
6.16.4
Resetting the LCD controller
6.16.5
Serial mode:
6.16.6
Using wait states
6.16.7
Checking the busy flag of the LCD controller
6.16.8
Loopback mode
6.16.9
Interrupt
6.17
Remote Control Interface
6.17.1
Functional Description
6.18
Parallel Port Interface (PPI)
6.19
USB Interface
6.19.1
Interrupts
6.19.1.1
USB_int_req_FIQ
6.19.1.2
USB_int_req_IRQ
6.19.1.3
Interrupt handling
6.19.1.4
Zero overhead operation
6.20
CD Block Decoder
6.20.1
Functional Description
6.20.1.1
Features
6.20.2
Input/Output Pin Function
6.20.3
I2C Interface
6.20.4
Standard Serial Interface UART
6.20.5
Subcode Interface
6.20.6
Serial Data Interface
6.20.7
Minimal Block Decoder
6.20.8
CD TEXT Mode
6.20.9
Q-subcode Frame Format
6.21
Digital Signal Processor (EPICS7a)
2002 Jan 21
3
Philips Semiconductors
Preliminary Specification version 1.3
SAA7750-N1D
Generic device for portable
multimedia applications
6.22
Digital Audio input and output
7
HARDWARE DESCRIPTION SSA CODEC
7.1
General
7.2
Multiple format data INPUT interface
7.3
Multiple format data OUTPUT interface
7.4
DAC digital sound processing
7.5
Block diagram
7.6
Connections to SAA7750
8
HARDWARE DESCRIPTION FLASH
9
LIMITING VALUES
10
THERMAL CHARACTERISTICS
11
DC CHARACTERISTICS
12
AC CHARACTERISTICS
13
PACKAGE OUTLINE
14
SOLDERING
15
DEFINITIONS
16
DISCLAIMERS
17PURCHASE OF PHILIPS I
2
C COMPONENTS
2002 Jan 21
4
PHILIPS CONFIDENTIAL
Philips Semiconductors
Preliminary Specification version 1.3
SAA7750-N1D
Generic device for portable
multimedia applications
1
FEATURES
NOTE: this datasheet is for SAA7750El version N1D onwards!!
1.1
Hardware Features
Integrated ARM720T 32 bit RISC processor, capable of running at 72MHz.
High performance 32-bits bus (AHB)
Centralized address decoding for all AHB devices
Four possible memory maps:
external boot
internal flash boot
internal ROM boot
normal operation
Supports USB 1.1 compliant interface for down loading data from PC
Support for flash-card applications:
Supports the Multi Media Card (MMC)
Supports Smart Media Card (EBI)
NAND FLASH (EBI)
Memory interface (EBI) supporting a number of memory types like Static RAM, SDRAM, external Flash.
The maximum bus frequency can be up to 48MHz.
Integrated CD block decoder for CD-DA and MP3 CD applications
UART + IrDA (IrDA is a new block on the N1D version)
Integrated Master and Slave IIC interface
Real-Time Clock (RTC)
General-Purpose IO pins (28 pins)
Integrated Remote Control interface
Integrated LCD interface with 6800 / 8080 type interface
Integrated 10 bits ADC with 8 selectable inputs (via analog multiplexer).
Integrated SPDIF output interface
Integrated IIS input and output interface
Integrated stereo Audio Codec
Stereo Line input with Programmable Gain Amplifier (PGA)
Mono Microphone input with embedded Low Noise Amplifier (LNA) and Variable Gain Amplifier (VGA
stereo analog input with analog volume control (e.g. for tuner applications)
stereo line output
integrated stereo headphone driver which can be used in DC coupling (short circuit protection and detection build
in).
1.2
General Features
Integrated ARM720T 32 bit RISC processor
Programmable architecture enables support of multiple audio decompression algorithms.
Designed for applications that require long battery life
2002 Jan 21
5
PHILIPS CONFIDENTIAL
Philips Semiconductors
Preliminary Specification version 1.3
SAA7750-N1D
Generic device for portable
multimedia applications
Embedded 3Mbit (384kbyte) flash for Field upgradibility
Embedded Audio Codec with headphone driver
small footprint LFBGA208 package
1.3
Software features
Audio Decoder support:
Supports MPEG 1 layer 3 and MPEG 2 layer 2.5 and layer 3 audio decoding (MP3), up to 320kbit/s , fixed and
variable bitrate.
Supports Microsoft WMTA 4.0 decoding
Supports AAC-LC decoding
Features on the audio codec:
Digital Automatic Gain Control (AGC) on the microphone input.
Programmable Gain Amplifier (PGA) for analog stereo line input
Volume control (incl. balance)
Bass-boost and Treble (left/right)
DSP features:
UltraBass II
Incredible headphone
Infrapitch
2
GENERAL DESCRIPTION
The SAA7750 is an IC based on an embedded RISC processor in combination with a simple embedded DSP core for
audio post-processing. The device is designed for hand-held applications like portable CD-DA/ MP3 players, memory
card applications or other portable applications. The high level of integration, low power consumption and high processor
performances make the SAA7750 very suitable for portable hand-held devices.
The SAA7750 is based on the powerful ARM720T CPU core, which is a full 32-bit RISC processor featuring the 16-bit
Thumb instruction set for effective memory usage. The audio streaming and post-processing for the SAA7750 is handled
by a separate audio co-processor DSP, which is a small, fast and powerful 24-bit Epics7A DSP core.
3
APPLICATIONS
Portable Solid State Audio player
Portable MP3 CD player
Home audio applications
Non-automotive Car applications
Other portable applications like PDA
4
ORDERING INFORMATION
TYPE NUMBER
PACKAGE
NAME
DESCRIPTION
VERSION
SAA7750EL/N1
LFBGA208
low profile fine-pitch ball grid array package; 208 balls;
body 15 x 15 x 1.2 mm.
SOT631-1