1998 Jul 06

Philips Semiconductors

Product specification

Digital servo processor and Compact Disc
decoder (CD7)

SAA7373

CONTENTS

FEATURES

GENERAL DESCRIPTION

QUICK REFERENCE DATA

ORDERING INFORMATION

BLOCK DIAGRAM

PINNING

FUNCTIONAL DESCRIPTION

7.1

Decoder part

7.1.1

Principle operational modes of the decoder

7.1.2

Decoding speed and crystal frequency

7.1.3

Lock-to-disc mode

7.1.4

Standby modes

7.2

Crystal oscillator

7.3

Data slicer and clock regenerator

7.4

Demodulator

7.4.1

Frame sync protection

7.4.2

EFM demodulation

7.5

Subcode data processing

7.5.1

Q-channel processing

7.5.2

EIAJ 3 and 4-wire subcode (CD graphics)
interface

7.5.3

V4 subcode interface

7.6

FIFO error corrector

7.6.1

Flags output (CFLG)

7.6.2

C2FAIL

7.7

Audio functions

7.7.1

De-emphasis and phase linearity

7.7.2

Digital oversampling filter

7.7.3

Concealment

7.7.4

Mute, full-speed, attenuation and fade

7.7.5

Peak detector

7.8

DAC interface

7.9

EBU interface

7.9.1

Format

7.10

KILL circuit

7.11

Audio features off

7.12

The VIA interface

7.13

Spindle motor control

7.13.1

Motor output modes

7.13.3

Loop characteristics

7.13.4

FIFO overflow

7.14

Servo part

7.14.1

Diode signal processing

7.14.2

Signal conditioning

7.14.3

Focus servo system

7.14.4

Radial servo system

7.14.5

Off-track counting

7.14.6

Defect detection

7.14.7

Off-track detection

7.14.8

High level features

7.14.9

Driver interface

7.15

Microcontroller interface

7.15.1

Microprocessor interface (4-wire bus mode)

7.15.2

Microcontroller interface (I

C-bus mode)

7.15.3

Summary of functions controlled by
registers 0 to F

7.15.4

Summary of servo commands

7.15.5

Summary of servo command parameters

LIMITING VALUES

OPERATING CHARACTERISTICS

OPERATING CHARACTERISTICS
(SUBCODE INTERFACE TIMING)

OPERATING CHARACTERISTICS
(I

S-BUS TIMING)

OPERATING CHARACTERISTICS
(MICROCONTROLLER INTERFACE TIMING)

APPLICATION INFORMATION

PACKAGE OUTLINE

SOLDERING

15.1

Introduction

15.2

Reflow soldering

15.3

Wave soldering

15.4

Repairing soldered joints

DEFINITIONS

LIFE SUPPORT APPLICATIONS

PURCHASE OF PHILIPS I

C COMPONENTS

1998 Jul 06

Philips Semiconductors

Product specification

Digital servo processor and Compact Disc
decoder (CD7)

SAA7373

FEATURES

�

CD ROM mode

�

Single and double-speed modes

�

Lock-to-disc mode

�

Full error correction strategy, t = 2 and e = 4

�

Full CD graphics interface

�

All standard decoder functions implemented digitally on
chip

�

FIFO overflow concealment for rotational shock
resistance

�

Digital audio interface (EBU), audio and data

�

2 and 4 times oversampling integrated digital filter,
including f

mode

�

Audio data peak level detection

�

Kill interface for DAC deactivation during digital silence

�

All TDA1301 (DSIC2) digital servo functions, plus extra
high-level functions

�

Low focus noise

�

Improved playability on ABEX TCD-721R, TCD-725 and
TCD-714 discs

�

Automatic closed loop gain control available for focus
and radial loops

�

Pulsed sledge support

�

Microcontroller loading LOW

�

High-level servo control option

�

High-level mechanism monitor

�

Communication may be via TDA1301/SAA7345
compatible bus or I

C-bus

�

On-chip clock multiplier allows the use of 8.4672 MHz
crystal.

GENERAL DESCRIPTION

The SAA7373 is a single chip combining the functions of a
CD decoder IC and digital servo IC. The decoder part is
based on the SAA7345 (CD6) with an improved error
correction strategy. The servo part is based on the
TDA1301T (DSIC2) with improvements incorporated,
extra features have also been added.

Supply of this Compact Disc IC does not convey an implied
license under any patent right to use this IC in any
Compact Disc application.

QUICK REFERENCE DATA

ORDERING INFORMATION

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

supply voltage

3.4

5.0

5.5

supply current

n = 1 mode

xtal

crystal frequency

8.4672

MHz

amb

operating ambient temperature

+85

�

stg

storage temperature

+125

�

TYPE

NUMBER

PACKAGE

NAME

DESCRIPTION

VERSION

SAA7373GP

QFP64

plastic quad flat package; 64 leads (lead length 1.6 mm);
body 14

�

2.7 mm

SOT393-1

1998 Jul 06

Philips Semiconductors

Product specification

Digital servo processor and Compact Disc
decoder (CD7)

SAA7373

BLOCK DIAGRAM

Fig.1 Block diagram.

handbook, full pagewidth

DECODER

MICRO-

CONTROLLER

INTERFACE

VERSATILE PINS

INTERFACE

SUBCODE

PROCESSOR

KILL

PEAK

DETECT

SERIAL DATA

INTERFACE

TIMING

TEST

ADC

Vref

GENERATOR

FRONT END

DIGITAL

PLL

MOTOR

CONTROL

AUDIO

PROCESSOR

EBU

INTERFACE

ERROR

CORRECTOR

MICROCONTROLLER

INTERFACE

PRE-

PROCESSING

CONTROL

FUNCTION

CONTROL

PART

EFM

DEMODULATOR

SRAM

RAM

ADDRESSER

OUTPUT
STAGES

FLAGS

VRL

VRH

Iref

SCL

SDA

RAB

SILD

HFIN

HFREF

ISLICE

TEST1

TEST2

TEST3

SELPLL

CRIN

CROUT

CL16

CL11

CL4

SBSY

SFSY

SUB

RCK

STATUS

RESET

D4 IrefT VSSA1

VSSA3

VDDA2

VSSD2

VSSD4

VDDD2(P)

VSSA2

VDDA1

VSSD1

VSSD3 VDDD1(P) VDDD3(C)

KILL

DATA

WCLK

SCLK

DOBM

C2FAIL

MOTO2

MOTO1

LDON

CFLG

SAA7373

MGR321

1998 Jul 06

Philips Semiconductors

Product specification

Digital servo processor and Compact Disc
decoder (CD7)

SAA7373

PINNING

SYMBOL

PIN

DESCRIPTION

SSA1

(1)

analog ground 1

DDA1

(1)

analog supply voltage 1

unipolar current input (central diode signal input)

reference voltage input for ADC

unipolar current input (central diode signal input)

unipolar current input (satellite diode signal input)

refT

current reference output for ADC calibration

reference voltage output from ADC

SSA2

(1)

analog ground 2

SELPLL

selects whether internal clock multiplier PLL is used

ISLICE

current feedback output from data slicer

HFIN

comparator signal input

SSA3

(1)

analog ground 3

HFREF

comparator common mode input

ref

reference current output pin (nominally 0.5V

)

DDA2

(1)

analog supply voltage 2

TEST1

test control input 1; this pin should be tied LOW

CRIN

crystal/resonator input

CROUT

crystal/resonator output

TEST2

test control input 2; this pin should be tied LOW

CL16

16.9344 MHz system clock output

CL11

11.2896 or 5.6448 MHz clock output (3-state)

radial actuator output

focus actuator output

sledge control output

TEST3

test control input 3; this pin should be tied LOW

DDD1(P)

(1)

digital supply voltage 1 for periphery

DOBM

bi-phase mark output (externally buffered; 3-state)

SSD1

(1)

digital ground 1

MOTO1

motor output 1; versatile (3-state)

MOTO2

motor output 2; versatile (3-state)

SBSY

subcode block sync output (3-state)

SFSY

subcode frame sync output (3-state)

RCK

subcode clock input

SUB

P-to-W subcode output bits (3-state)

SSD2

(1)

digital ground 2

versatile output pin 5

Электронный компонент: SAA7373GP