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Электронный компонент: SAA7167H/00

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DATA SHEET
Preliminary specification
Supersedes data of 1995 Jun 13
File under Integrated Circuits, IC22
1995 Nov 03
INTEGRATED CIRCUITS
SAA7167
YUV-to-RGB Digital-to-Analog
Converter (DAC)
1995 Nov 03
2
Philips Semiconductors
Preliminary specification
YUV-to-RGB Digital-to-Analog
Converter (DAC)
SAA7167
FEATURES
On-chip mixing of digital video data and analog
RGB signals
Supports video input format of YUV 4 : 2 : 2, 4 : 1 : 1,
2 : 1 : 1 and RGB 5 : 6 : 5
Video input rate up to 50 MHz
Allows for both binary and two's complement video
input data
Triple 8-bit DACs for video output
Built-in voltage output amplifier
Provide keying control with external key and internal
8-bit, 2
8-bit and 3
8-bit pixel colour key
Programmable via the I
2
C-bus
5 V CMOS device; LQFP48 package.
GENERAL DESCRIPTION
The SAA7167 is a mixed-mode designed IC containing a
video data path, keying control block, analog mixer, and a
voltage output amplifier, capable of converting digital video
data to analog RGB video, and then mixing video and
external analog RGB inputs.
The video data path contains a data re-formatter,
YUV-to-RGB colour space matrix as well as triple DACs for
video data processing. An analog mixer performs
multiplexing between DAC outputs of the video path and
external analog RGB inputs.
The final analog outputs are buffered with built-in voltage
output amplifiers to provide the direct driving capability for
a 150
load. Figure 1 shows the overall block diagram.
The operation of SAA7167 is controlled via the I
2
C-bus.
QUICK REFERENCE DATA
ORDERING INFORMATION
SYMBOL
PARAMETER
MIN.
MAX.
UNIT
V
DDD
digital supply voltage
4.75
5.25
V
V
DDA
analog supply voltage
4.75
5.25
V
T
amb
operating ambient temperature
0
70
C
TYPE
NUMBER
PACKAGE
NAME
DESCRIPTION
VERSION
SAA7167
LQFP48
plastic low profile quad flat package; 48 leads; body 7
7
1.4 mm
SOT313-2
1995 Nov 03
3
Philips Semiconductors
Preliminary specification
YUV-to-RGB Digital-to-Analog
Converter (DAC)
SAA7167
BLOCK DIAGRAM
Fig.1 Block diagram.
handbook, full pagewidth
Bin Gin Rin
Rout
32
YUV7 to
YUV0
UV7 to
UV0
38 to
45
SAA7167
46 to 48,
1 to 5
Cref(h)
MGB743
RE-
FORMATTER
YUV
TO
RGB
MATRIX
MUX
VCLK
PCLK
EXTKEY
P7 to P0
8-BIT
DAC
(3
)
MIXER
OPAMP
CLOCK
GENERATOR
KEYING CONTROL
Gout
30
MIXER
OPAMP
Bout
28
MIXER
OPAMP
8
13 to 20
21
10
6
29
36
31 33
HREF
I
2
C-BUS
CONTROL
22
9
23
24
SDA
SCL
RES
1995 Nov 03
4
Philips Semiconductors
Preliminary specification
YUV-to-RGB Digital-to-Analog
Converter (DAC)
SAA7167
PINNING
SYMBOL
PIN
DESCRIPTION
I/O
UV4
1
digital video UV (of YUV format 4 : 1 : 1 and 4 : 2 : 2) input data, or digital G and R
input data
I
UV3
2
digital video UV (of YUV format 4 : 1 : 1 and 4 : 2 : 2) input data, or digital G and R
input data
I
UV2
3
digital video UV (of YUV format 4 : 1 : 1 and 4 : 2 : 2) input data, or digital G and R
input data
I
UV1
4
digital video UV (of YUV format 4 : 1 : 1 and 4 : 2 : 2) input data, or digital G and R
input data
I
UV0
5
digital video UV (of YUV format 4 : 1 : 1 and 4 : 2 : 2) input data, or digital G and R
input data
I
VCLK
6
video clock input
I
V
DDD
7
digital supply voltage
I/O
V
SSD
8
digital ground
I/O
HREF
9
horizontal reference input signal
I
PCLK
10
pixel clock input
I
AP
11
test pins, normally connected to ground
I
SP
12
test pins, normally connected to ground
I
P7
13
pixel bus input 7 (for keying control)
I
P6
14
pixel bus input 6 (for keying control)
I
P5
15
pixel bus input 5 (for keying control)
I
P4
16
pixel bus input 4 (for keying control)
I
P3
17
pixel bus input 3 (for keying control)
I
P2
18
pixel bus input 2 (for keying control)
I
P1
19
pixel bus input 1 (for keying control)
I
P0
20
pixel bus input 0 (for keying control)
I
EXTKEY
21
external key signal input
I
SDA
22
I
2
C-bus data line
I/O
SCL
23
I
2
C-bus clock line
I
RES
24
set to LOW to reset the I
2
C-bus
I
n.c.
25
not connected
-
V
SSA2
26
analog ground 2
I/O
V
DDA2
27
analog supply voltage 2
I/O
Bout
28
analog Blue signal output
O
Bin
29
analog Blue signal input
I
Gout
30
analog Green signal output
O
Gin
31
analog Green signal input
I
Rout
32
analog Red signal output
O
Rin
33
analog Red signal input
I
V
SSA1
34
analog ground 1
I/O
V
DDA1
35
analog supply voltage 1
I/O
C
ref(h)
36
capacitor for reference high voltage output (2.25 V)
I/O
1995 Nov 03
5
Philips Semiconductors
Preliminary specification
YUV-to-RGB Digital-to-Analog
Converter (DAC)
SAA7167
n.c.
37
not connected
-
YUV7
38
digital video Y or UV (of YUV format 2 : 1 : 1) input data, or digital G and B input data
I
YUV6
39
digital video Y or UV (of YUV format 2 : 1 : 1) input data, or digital G and B input data
I
YUV5
40
digital video Y or UV (of YUV format 2 : 1 : 1) input data, or digital G and B input data
I
YUV4
41
digital video Y or UV (of YUV format 2 : 1 : 1) input data, or digital G and B input data
I
YUV3
42
digital video Y or UV (of YUV format 2 : 1 : 1) input data, or digital G and B input data
I
YUV2
43
digital video Y or UV (of YUV format 2 : 1 : 1) input data, or digital G and B input data
I
YUV1
44
digital video Y or UV (of YUV format 2 : 1 : 1) input data, or digital G and B input data
I
YUV0
45
digital video Y or UV (of YUV format 2 : 1 : 1) input data, or digital G and B input data
I
UV7
46
digital video UV (of YUV format 4 : 1 : 1 and 4 : 2 : 2) input data, or digital G and R
input data
I
UV6
47
digital video UV (of YUV format 4 : 1 : 1 and 4 : 2 : 2) input data, or digital G and R
input data
I
UV5
48
digital video UV (of YUV format 4 : 1 : 1 and 4 : 2 : 2) input data, or digital G and R
input data
I
SYMBOL
PIN
DESCRIPTION
I/O
Fig.2 Pin configuration.
1
2
3
4
5
6
7
8
9
10
11
36
35
34
33
32
31
30
29
28
27
26
13
14
15
16
17
18
19
20
21
22
23
48
47
46
45
44
43
42
41
40
39
38
12
24
37
25
index
corner
SAA7167
MGB744
Cref(h)
VDDA1
VSSA1
Rin
Gin
Gout
Bin
Bout
VDDA2
VSSA2
n.c.
UV4
UV3
UV2
UV1
UV0
VCLK
VSSD
HREF
AP
SP
Rout
UV6
UV7
YUV0
YUV1
YUV2
YUV3
YUV5
YUV6
YUV7
n.c.
UV5
YUV4
VDDD
PCLK
P6
P5
P4
P3
P2
P1
P0
SDA
SCL
RES
P7
EXTKEY