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Электронный компонент: BUT12AI

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Philips Semiconductors
Product specification
Silicon Diffused Power Transistor
BUT12AI
GENERAL DESCRIPTION
Improved high-voltage, high-speed glass-passivated npn power transistor in a TO220AB envelope specially suited
for use in overhead/high frequency lighting ballast applications and converters, inverters, switching regulators,
motor control systems, etc.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
TYP.
MAX.
UNIT
V
CESM
Collector-emitter voltage peak value
V
BE
= 0 V
-
1000
V
V
CEO
Collector-emitter voltage (open base)
-
450
V
I
C
Collector current (DC)
-
8
A
I
CM
Collector current peak value
-
20
A
P
tot
Total power dissipation
T
hs
25 C
-
110
W
V
CEsat
Collector-emitter saturation voltage
I
C
= 5 A; I
B
= 0.86A
-
1.5
V
I
Csat
Collector saturation current
5
-
A
t
f
Inductive fall time
I
Con
= 5 A; I
Bon
= 1.0 A;T
j
100C
300
ns
PINNING - TO220AB
PIN CONFIGURATION
SYMBOL
PIN
DESCRIPTION
1
base
2
collector
3
emitter
tab
collector
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum Rating System (IEC 134)
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
V
CESM
Collector-emitter voltage peak value
V
BE
= 0 V
-
1000
V
V
CEO
Collector-emitter voltage (open base)
-
450
V
I
C
Collector current (DC)
-
8
A
I
CM
Collector current peak value
-
20
A
I
B
Base current (DC)
-
4
A
I
BM
Base current peak value
-
6
A
P
tot
Total power dissipation
T
hs
25 C
-
110
W
T
stg
Storage temperature
-65
150
C
T
j
Junction temperature
-
150
C
THERMAL RESISTANCES
SYMBOL
PARAMETER
CONDITIONS
TYP.
MAX.
UNIT
R
th j-hs
Junction to heatsink
with heatsink compound
-
1.15
K/W
R
th j-a
Junction to ambient
in free air
-
60
K/W
1 2 3
tab
b
c
e
June 1997
1
Rev 1.000
Philips Semiconductors
Product specification
Silicon Diffused Power Transistor
BUT12AI
STATIC CHARACTERISTICS
T
hs
= 25 C unless otherwise specified
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
I
CES
Collector cut-off current
1
V
BE
= 0 V; V
CE
= V
CESMmax
-
-
1.0
mA
I
CES
V
BE
= 0 V; V
CE
= V
CESMmax
;
-
-
3.0
mA
T
j
= 125 C
I
EBO
Emitter cut-off current
V
EB
= 9 V; I
C
= 0 A
-
-
10
mA
V
CEOsust
Collector-emitter sustaining voltage
I
B
= 0 A; I
C
= 100 mA;
450
-
-
V
L = 25 mH
V
CEsat
Collector-emitter saturation voltages I
C
= 5 A; I
B
= 0.86 A
-
-
1.5
V
V
BEsat
Base-emitter saturation voltage
I
C
= 5 A; I
B
= 0.86 A
-
-
1.3
V
h
FE
DC current gain
I
C
= 10mA; V
CE
= 5 V
10
18
35
h
FE
I
C
= 1.0A; V
CE
= 5 V
14
20
35
h
FEsat
I
C
= 5.0A; V
CE
= 1.5 V
5.8
10
12.5
DYNAMIC CHARACTERISTICS
T
hs
= 25 C unless otherwise specified
SYMBOL
PARAMETER
CONDITIONS
TYP.
MAX.
UNIT
Switching times (resistive load)
I
Con
=5 A; I
Bon
= -I
Boff
= 1.0 A
t
on
Turn-on time
-
1.0
s
t
s
Turn-off storage time
-
4.0
s
t
f
Turn-off fall time
-
0.8
s
Switching times (inductive load)
I
Con
= 5 A; I
Bon
= 1.0 A; L
B
= 1
H;
-V
BB
= 5 V; T
j
= 100 C
t
s
Turn-off storage time
1.9
2.5
s
t
f
Turn-off fall time
150
300
ns
Fig.1. Test circuit for V
CEOsust
.
Fig.2. Oscilloscope display for V
CEOsust
.
+ 50v
100-200R
Horizontal
Vertical
Oscilloscope
1R
6V
30-60 Hz
300R
VCE / V
min
VCEOsust
IC / mA
100
200
250
0
1 Measured with half sine-wave voltage (curve tracer).
June 1997
2
Rev 1.000
Philips Semiconductors
Product specification
Silicon Diffused Power Transistor
BUT12AI
Fig.3. Test circuit resistive load. VIM = -6 to +8 V
V
CC
= 250 V; tp = 20
s;
= tp / T = 0.01.
R
B
and R
L
calculated from I
Con
and I
Bon
requirements.
Fig.4. Switching times waveforms with resistive load.
Fig.5. Test circuit inductive load.
V
CC
= 300 V; -V
BE
= 5 V;L
B
= 1 uH
Fig.6. Switching times waveforms with inductive load.
Fig.7. Test circuit RBSOA. V
CC
= 150 V; -V
BB
= 5 V
L
C
= 200
H; V
CL
850 V; L
B
= 1
H
Fig.8. Normalised power dissipation.
PD% = 100
PD/PD
25C
= f (T
mb
)
tp
T
VCC
R
R
T.U.T.
0
VIM
B
L
IC
IB
ICon
IBon
-IBoff
t
t
ts
tf
toff
10 %
90 %
IC
IB
10 %
10 %
90 %
90 %
ton
toff
ts
tf
IBon
-IBoff
ICon
tr
30ns
LB
IBend
-VBB
LC
T.U.T.
VCC
VCL
CFB
LB
IBon
-VBB
LC
T.U.T.
VCC
0
20
40
60
80
100
120
140
Tmb / C
PD%
Normalised Power Derating
120
110
100
90
80
70
60
50
40
30
20
10
0
June 1997
3
Rev 1.000
Philips Semiconductors
Product specification
Silicon Diffused Power Transistor
BUT12AI
Fig.9. Typical base-emitter saturation voltage.
V
BEsat
= f(I
C
); parameter I
C
/I
B
Fig.10. Typical collector-emitter saturation voltage.
V
CEsat
= f(I
C
); parameter I
C
/I
B
Fig.11. Typical base-emitter saturation voltage.
V
BEsat
= f(I
B
); parameter I
C
Fig.12. Typical collector-emitter saturation voltage.
VCEsat = f(IB); parameter IC
0.1
1
10
1.2
1.1
1
0.9
0.8
0.7
0.6
0.5
0.4
VBEsat / V
IC / A
Tj = 125 C
Tj = 25 C
IC/IB=
8
10
12
0
0.4
0.8
1.2
1.6
2
2.4
1.2
1.1
1
0.9
0.8
0.7
0.6
VBEsat / V
IB / A
Tj = 25 C
Tj = 125 C
IC =
6A
3A
2A
0.1
1
10
10
1
0.1
VCEsat / V
IB / A
Tj = 25 C
Tj = 125 C
IC=2A
4A
6A
0.1
1
10
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
VCEsat / V
IC / A
Tj = 25 C
Tj = 125 C
IC/IB=
12
10
8
5
June 1997
4
Rev 1.000
Philips Semiconductors
Product specification
Silicon Diffused Power Transistor
BUT12AI
Fig.13. Forward bias safe operating area. T
mb
= 25C
I
Region of permissible DC operation.
II
Extension for repetitive pulse operation.
NB:
Mounted with heatsink compound and
30
5 newton force on the centre of the
envelope.
Fig.14. Reverse bias safe operating area. T
j
T
j max
Fig.15. Typical DC current gain. hFE = f(IC)
parameter VCE
Fig.16. Transient thermal impedance.
Z
th j-mb
= f(t); parameter D = t
p
/T
100
10
1
0.1
0.01
1
10
100
1000
IC / A
VCE / V
DC
ICMmax
ICmax
I
II
0.01
1
100
10
1
0.1
10
h
FE
IC / A
Tj = 25 C
Tj = 125 C
1V
5V
BUX100
1E-05
1E-03
1E-01
1E+01
t / s
Zth / (K/W)
1E+01
1E+00
1E-01
1E-02
D=0
0.5
0.2
0.1
0.05
0.02
D =
tp
T
T
P
t
D
t
p
0
200
400
600
800
1000
6
5
4
3
2
1
0
IC / A
VCE / V
8
7
June 1997
5
Rev 1.000