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Электронный компонент: OV7930

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Version 1.1, January 15, 2003
Proprietary to OmniVision Technologies
1
Advanced Information
Preliminary Datasheet
OV7930 Color CMOS Analog C
AMERA
C
HIPTM
O
mni
TM
ision
General Description
The OV7930 (color) is a high performance quarter-inch
CMOS C
AMERA
C
HIPTM
designed for all applications
requiring a small footprint, low voltage, low power
consumption and low cost color video camera.
The device supports NTSC composite video output and
can directly interface with a VCR TV monitor or other
75 ohm terminated input with 2X standard TV signal
range. The OV7930 C
AMERA
C
HIP
s require only a single
5-volt DC power supply and have been designed for very
low power operation.
Features
Single chip 1/4" lens video camera
Composite video: NTSC
Sensitivity boost (+27 dB)/AGC ON/OFF
Automatic exposure/gain/white balance
External frame sync capability
Aperture correction
SCCB programmable controls:
Color saturation
Brightness
Hue
White balance
Exposure
Gain
Gamma curve
Aperture correction
Gamma correction (0.45) ON/OFF
Low power consumption
+5 volt only power supply
Wide dynamic range, anti-blooming, zero smearing
Ordering Information
Product
Packages
OV7930 (Color, VGA,
NTSC, CVO)
CLCC-28, PLCC-28
Applications
Video Conferencing
Video Phones
Video E-mail
PC Multimedia
Toys
Security
Surveillance
Finger Printing
Medical and Dental Equipment
Key Specifications
Figure 1 OV7930 Pin Diagram
Array Size 510 x 492
Power Supply 5 VDC + 5%
Power
Requirements
Without Loading 20 mA
With 75 ohm
Loading < 35 mA
Image Area 4.00 mm x 3.08 mm
Auto Electronic Exposure Time 1/60s - 6.3s
Minimum Illumination (3000K) < 2.0 Lux
S/N Ratio > 46 dB
Dynamic Range > 70 dB
Pixel Size 7.86 m x 6.25 m
Dark Current < 100 mV/s
Fixed Pattern Noise < 0.03% V
PEAK-TO-PEAK
Package Dimensions 0.45 in. x 0.45 in.
25
FASTB
24
PWDN
23
FODD/HGAIN
22
VHS/MIR
21
GAMMA
20
FSI
19
DGND
27
SI
O
_
D
26
SI
O
_
C
28
AW
B
1
S
1
AG
ND
2
AV
DD
3
AB
RT
4
BKL
T
12
EV
D
D
13
EG
N
D
14
S
CCB
_
E
15
VP
XO
/
V
F
L
P
16
XC
L
K
1
17
XC
L
K
2
18
DV
DD
5
NC
6
VREQ
7
VRCHG
8
NC
9
NC
10
CVO
11
OVDD
OV7930
2
Proprietary to OmniVision Technologies
Version 1.1, January 15, 2003
OV7930
Color CMOS Analog C
AMERA
C
HIP
TM
O
mni
ision
Functional Description
This section describes the various functions of the OV7930. Refer to
Figure 2
for the functional block diagram of the OV7930.
Figure 2 Functional Block Diagram
Clock/Timing Generator and Control Logic
Image Array
(528 X 500)
Row
Select
SCCB Slave
Interface
Gain
Control
SC
C
B
_
E
SI
O
_
D
SI
O
_
C
ASP
Control
CVO
Analog Signal
Processor
(ASP)
XC
L
K
1
XC
L
K
2
RE
S
E
T
PW
D
N
FS
I
BK
L
T
ABRT
FA
S
T
B
G
A
MMA
VH
S
VP
XO
FO
D
D
AMP
Control
Register
Bank
Balance
Control
Channel
Control
AW
B1
S
NTSC
Video
Encoder
Column Sample/Hold
Video Standards
NTSC TV standards are implemented and available as
output in the OV7930 C
AMERA
C
HIP
. Note that the
accuracy and stability of the crystal clock frequency is
important to avoid unwanted color shift in the TV video
system. A 14.31818 MHz crystal is recommended when
using the OV7930 C
AMERA
C
HIP
.
Video Format
The OV7930 C
AMERA
C
HIP
supports Composite (CVBS)
video format only. Composite signals are generated from
the built-in NTSC TV encoder.
Image Sensor Functions
White Balance
The function of white balance in the OV7930 C
AMERA
C
HIP
is to adjust and calibrate the image device sensitivity on
the primary (RGB) colors to match the color cast of the
light source. The Auto White Balance (AWB) can be
enabled or disabled by SCCB register bit COMD[1] (see
"COMD" on page 12
).
Mirror and Vertical Flip
The OV7930 has pin control functions:
Mirror (pin22 - see
"VHS/MIR" on page 4
)
VFLIP (pin 15 input - see
"VPXO/VFLP" on page 4
)
Functional Description
Version 1.1, January 15, 2003
Proprietary to OmniVision Technologies
3
O
mni
ision
These two functions can be controlled separately using
SCCB register bit COME[6] (see
"COME" on page 12
) for
the mirror function and register bit COMJ[0] (see
"COMJ"
on page 13
) for the vertical flip function.
Multi-Chip Synchronize
The OV7930 C
AMERA
C
HIP
provides the multi-chip
Synchronize function where one chip works as the master
and all others as slave devices. The master chip provides
the frame synchronize signal through the FODD pin (pin
23 - see
"FODD/HGAIN" on page 5
). All slave devices
accept the frame synchronize signal through the FSI pin
(pin 20 - see
"FSI" on page 4
). This mode allows all
devices to synchronize together.
Chip Configuration
The OV7930 C
AMERA
C
HIP
has been designed for
ease-of-use in many stand-alone applications. Most of the
on-chip functions are configurable by connecting the
appropriate pins high (logic "1") or low (logic "0") through
a 10 K
resistor. The C
AMERA
C
HIP
reads the input pins at
power up which enable user-defined default
configurations.
The OV7930 C
AMERA
C
HIP
also has a SCCB slave
interface for programmable access to all registers
functions. Refer to
OmniVision Technologies Serial
Camera Control Bus (SCCB) Specification
for detailed
usage of the serial control port.
NOTE
Once the SCCB interface is enabled (pin 14 -
see
"SCCB_E" on page 4
), the following pin
assignment functions will be ignored and
functions will be defined by the related SCCB
register. These pins are:
ABRT (pin 3)
BKLT (pin 4)
VFLIP (pin 15)
GAMMA (pin 21)
MIR (pin 22)
HGAIN (pin 23)
FASTB (pin 25)
Additional Picture Controls
The OV7930 C
AMERA
C
HIP
provides additional picture
control functions to enhance image quality and chip
performance.
Automatic Gain Control (AGC)
The default gain range is 1x - 8x while the user can set the
gain range up to 4x or 16x.
Brightness Control
Brightness can be controlled either by internal automatic
algorithms or by the user through the following SCCB
register bits:
BRT[7:0] (see
"BRT" on page 11
)
Gamma Correction
The OV7930 has luminance and chrominance Gamma
correction through the GAMMA pin (pin 21 - see
"GAMMA" on page 4
).
Backlight Control
The OV7930 manages backlight conditions through
register bit COME[4] (see
"COME" on page 12
).
Color Saturation
Color saturation can be updated manually through the
SCCB register bits SAT[7:4] (see
"SAT" on page 11
).
Hue Adjustment
Image hue can be adjusted through the SCCB register bits
HUE[5:0] (see
"HUE" on page 11
).
4
Proprietary to OmniVision Technologies
Version 1.1, January 15, 2003
OV7930
Color CMOS Analog C
AMERA
C
HIP
TM
O
mni
ision
Pin Description
Table 1
Pin Description
Pin Number
Name
Pin Type
Default (V)
Function/Description
01
AGND
Power
0
Analog ground
02
AVDD
Power
5
Analog Power (+5 VDC)
03
ABRT
Input
0
Auto brightness control ON/OFF
04
BKLT
Input
0
Backlight selection
0:
OFF
1:
ON
05
NC
--
--
No connection
06
VREQ
Analog
2.5
Internal reference
07
VRCHG
Analog
3.6
Internal reference
08
NC
--
--
No connection
09
NC
--
--
No connection
10
CVO
Output
--
Composite video output, 2X standard NTSC TV signal
11
OVDD
Power
5
Analog power for video output (+5 VDC)
12
EVDD
Power
5
Analog power (+5 VDC)
13
EGND
Power
0
Analog ground
14
SCCB_E
Input
5
SCCB interface enable signal, active low
15
VPXO/VFLP
I/O
0
Valid pixels detect output. CLK is asserted on this pin during
the active image period. Power up initial pin value will be
latched as vertical flip ON/OFF control.
0:
OFF
1:
ON
16
XCLK1
Input
--
Crystal clock input. 14.31818 MHz for NTSC
17
XCLK2
Output
--
Crystal clock output
18
DVDD
Power
5
Digital power (+5 VDC)
19
DGND
Power
0
Digital ground
20
FSI
Input
0
Frame synchronizing signal input
21
GAMMA
Input
5
Gamma function ON/OFF
0:
OFF
1:
ON
22
VHS/MIR
I/O
0
Vertical/Horizontal SYNC output. Power up initial pin value
will be latched as mirror function ON/OFF control.
0:
OFF
1:
ON
Pin Description
Version 1.1, January 15, 2003
Proprietary to OmniVision Technologies
5
O
mni
ision
23
FODD/HGAIN
I/O
0
Even/odd field flag and frame synchronize signal output.
Power up initial pin value will be latched as AGC gain range
control.
0:
AGC gain 1x - 4x
1:
AGC gain 1x - 8x
24
PWDN
Input
0
Power down mode selection
0:
OFF
1:
ON
25
FASTB
Input
0
AEC/AGC mode selection
0:
Fast mode
1:
Normal mode
26
SIO_C
Input
--
SCCB serial interface clock
27
SIO_D
I/O
--
SCCB serial interface data I/O
28
AWB1S
Input
0
After power up, first high pulse edge will trigger one shot
AWB. System performs fast AWB only when this pin is high
at this mode.
Table 1
Pin Description
Pin Number
Name
Pin Type
Default (V)
Function/Description