Oxford Semiconductor Ltd.
25 Milton Park, Abingdon, Oxon, OX14 4SH, UK
Tel: +44 (0)1235 824900
Fax: +44(0)1235 821141
Oxford Semiconductor 2001
OX16PCI952 Datasheet rev 1.1 June 2001
Part No. OX16PCI952-TQFP-A
F
EATURES
Two 16C950 High performance UART channels
IEEE1284 Compliant SPP/EPP/ECP parallel port
Multi-function target PCI controller. Fully compliant to
PCI bus specification 2.2 and PCI Power Management
1.0.
Function access to pre-configure each UART and the
parallel port, prior to handover to generic device
drivers.
UARTs fully software compatible with 16C550-type
devices.
Baud rates up to 15Mbps in asynchronous mode and
60Mbps in external 1x clock mode
128-byte deep FIFO per transmitter and receiver
Flexible clock prescaler from 1 to 31.875
Automated in-band flow control using programmable
Xon/Xoff in both directions
Automated out-of-band flow control using CTS#/RTS#
and/or DSR#/DTR#
Arbitrary trigger levels for receiver and transmitter
FIFO interrupts and automatic in-band and out-of-
band flow control
Infra-red (IrDA) receiver and transmitter operation
5, 6, 7, 8 and 9-bits data framing
Global Interrupt Status and readable FIFO levels to
facilitate implementation of efficient device drivers
Detection of bad data in the receiver FIFO
2 multi-purpose IO pins which can be configured as
interrupt inputs or `wake-up' pins (via local registers).
Auto-detection of a range of optional Microwire
TM
compatible EEPROMs, to reconfigure device.
Operation via IO or memory mapping.
5.0V operation
128 pin TQFP package
D
ESCRIPTION
The OX16PCI952 is a single chip solution for PCI-based
serial and parallel expansion add-in cards. It is a dual
function device, offering IO or memory mapped access to
the two ultra-high performance OX16C950 UARTs and the
bi-directional parallel port. These functions are defined by
Function 0 and Function 1, respectively. Serial port cards
with 2 serial ports and a parallel port can be designed
without redefining any device parameters.
Each UART channel in the OX16PCI952, is the fastest
available PC-compatible UART, offering data rates up to
15Mbps and 128-byte deep transmitter and receiver FIFOs.
The deep FIFOs reduce CPU overhead and allow
utilisation of higher data rates. Each UART channel is
software compatible with the widely used industry-standard
16C550 devices and compatibles, as well as the
OX16C95x family of high performance UARTs. In addition
to increased performance and FIFO size, the UARTs also
provide the full set of OX16C95x enhanced features
including automated in-band flow control, readable FIFO
levels, etc.
The parallel port is an IEEE 1284 compliant SPP, EPP and
ECP parallel port that fully supports the existing Centronics
interface. For legacy applications, the PCI resources have
been arranged so that the parallel port can be located at
standard I/O addresses
A set of local registers is available to enhance device driver
efficiency and reduce interrupt latency. Each internal UART
has features such as shadowed FIFO fill levels, an interrupt
source register and Good-Data Status, readable in
consecutive DWORD registers and is visible to logical
function0 in both IO space and memory space. The local
registers also provide additional controls for each UART
and the parallel port, to customise the device for the end-
users application.
The efficient 32-bit, 33MHz target-only interface is
compliant with the PCI bus specification version 2.2 and
version 1.0 of PCI Power Management Specification.
For full flexibility, all the default configuration register
values can be overwritten using an optional Microwire
TM
compatible serial EEPROM.
This EEPROM can also be used to provide function access
to pre-configure each UART into enhanced modes or pre-
configure the parallel port, prior to any PCI configuration
accesses and before control is handed to generic device
drivers.
Microwire
TM
is a trade mark of National Semiconductor.
OX16PCI952 DATA SHEET
Integrated High Performance Dual UARTs,
Parallel Port and 5.0v PCI interface
DS_B008A_00
DataSheet Revision 1.1
Page 2
OX16PCI952
OXFORD SEMICONDUCTOR LTD.
C
ONTENTS
1 PERFORMANCE COMPARISON..................................................................................................4
1.1
IMPROVEMENTS OF THE OX16PCI952 OVER DISCRETE SOLUTIONS:....................................................................... 4
2 BLOCK DIAGRAM.......................................................................................................................6
3 PIN INFORMATION .....................................................................................................................7
4 PIN DESCRIPTION......................................................................................................................8
5 CONFIGURATION & OPERATION .............................................................................................13
6 PCI TARGET CONTROLLER .....................................................................................................14
6.1
OPERATION........................................................................................................................................................................ 14
6.2
CONFIGURATION SPACE ................................................................................................................................................. 15
6.3
ACCESSING FUNCTION 0 AND FUNCTION 1................................................................................................................. 17
6.4
ACCESSING THE LOCAL CONFIGURATION REGISTERS............................................................................................ 19
6.5
PCI INTERRUPTS ............................................................................................................................................................... 24
6.6
POWER MANAGEMENT.................................................................................................................................................... 25
7 INTERNAL OX16C950 UART .....................................................................................................28
7.1
OPERATION MODE SELECTION ................................................................................................................................... 28
7.2
REGISTER DESCRIPTION TABLES ................................................................................................................................. 30
7.3
RESET CONFIGURATION ................................................................................................................................................. 34
7.4
TRANSMITTER AND RECEIVER FIFOS........................................................................................................................... 35
7.5
LINE CONTROL & STATUS............................................................................................................................................... 36
7.6
INTERRUPTS & SLEEP MODE ......................................................................................................................................... 38
7.7
MODEM INTERFACE ......................................................................................................................................................... 40
7.8
OTHER STANDARD REGISTERS ..................................................................................................................................... 41
7.9
AUTOMATI C FLOW CONTROL......................................................................................................................................... 42
7.10
BAUD RATE GENERATION............................................................................................................................................... 44
7.11
ADDITIONAL FEATURES .................................................................................................................................................. 46
8 BI-DIRECTIONAL PARALLEL PORT..........................................................................................52
8.1
OPERATION AND MODE SELECTION ............................................................................................................................. 52
8.2
PARALLEL PORT INTERRUPT ......................................................................................................................................... 53
8.3
REGISTER DESCRIPTION................................................................................................................................................. 54
9 SERIAL EEPROM SPECIFICATION ...........................................................................................57
9.1
EEPROM DATA ORGANISATION ..................................................................................................................................... 57
10
OPERATING CONDITIONS.....................................................................................................61
11
DC ELECTRICAL CHARACTERISTICS ...................................................................................62
11.1
5V STANDARD (NON-PCI) I/O BUFFERS ....................................................................................................................... 62
11.2
PCI I/O BUFFERS............................................................................................................................................................... 62
12
AC ELECTRICAL CHARACTERISTICS ...................................................................................63
12.1
PCI I/O BUFFERS.............................................................................................................................................................. 63
12.2
SERIAL PORTS .................................................................................................................................................................. 63
13
TIMING WAVEFORMS............................................................................................................64
14
PACKAGE INFORMATION .....................................................................................................74
15
ORDERING INFORMATION....................................................................................................75
16
CONTACT DETAILS...............................................................................................................76
DataSheet Revision 1.1
Page 3
OX16PCI952
OXFORD SEMICONDUCTOR LTD.
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DataSheet Revision 1.1
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OX16PCI952
OXFORD SEMICONDUCTOR LTD.
1 P
ERFORMANCE
C
OMPARISON
Feature
OX16PCI952
16C552 + PCI
Bridge
16C652 + PCI
Bridge
Internal serial channels
2
0
0
Integral 1284 Compliant parallel port
yes
no
no
Multi-function PCI device
yes
no
no
Support for PCI Power Management
yes
no
no
Zero wait-state read/write operation
yes
no
no
No. of available external interrupt pins
2
2
2
DWORD access to UART Interrupt Source
Registers & FIFO Levels
yes
no
no
Good-Data status
yes
no
no
Full Plug and Play with external EEPROM
yes
yes
yes
External 1x baud rate clock
yes
no
no
Max baud rate in normal mode
15 Mbps
115 Kbps
1.5 Mbps
Max baud rate in 1x clock mode
60 Mbps
n/a
n/a
FIFO depth
128
16
64
Sleep mode
yes
no
yes
Auto Xon/Xoff flow
yes
no
yes
Auto CTS#/RTS# flow
yes
no
yes
Auto DSR#/DTR# flow
yes
no
no
No. of Rx interrupt thresholds
128
4
4
No. of Tx interrupt thresholds
128
1
4
No. of flow control thresholds
128
n/a
4
Transmitter empty interrupt
yes
no
no
Readable status of flow control
yes
no
no
Readable FIFO levels
yes
no
no
Clock prescaler options
248
n/a
2
Rx/Tx disable
yes
no
no
Software reset
yes
no
no
Device ID
yes
no
no
9-bit data frames
yes
no
no
RS485 buffer enable
yes
no
no
Infra-red (IrDA)
yes
no
yes
Table 1: OX16PCI952 performance compared with PCI Bridge + generic UART/Parallel Port Combinations.
1.1 Improvements of the OX16PCI952 over discrete solutions:
Higher degree of integration:
The OX16PCI952 offers two internal ultra-high
performance 16C950 UARTs and one IEEE1284 compliant
bi-directional parallel port.
UART device driver efficiency is increased by using each
channel's features such as the 128-byte deep transmitter &
receiver FIFOs, flexible clock options, automatic flow
control, programmable interrupt and flow control trigger
levels and readable FIFO levels. Data rates of each UART
is up to 60Mbps.
Improved access timing:
Access to the internal UARTs require zero or one PCI wait
states. A PCI read transaction from an internal UART can
complete within five PCI clock cycles and a write
transaction to an internal UART can complete within four
PCI clock cycles.
Reduces interrupt latency:
The OX16PCI952 offers shadowed FIFO levels and
Interrupt status registers of the internal UARTs, as well as
general device interrupt status, to reduce the device driver
interrupt latency.
DataSheet Revision 1.1
Page 5
OX16PCI952
OXFORD SEMICONDUCTOR LTD.
Power management:
Both functions of the OX16PCI952 comply with the PCI
Power Management Specification 1.0 and the PC98/99
Power Management specifications, by offering the
extended capabilities for Power Management and
supporting the power states D0, D2 and D3. This achieves
significant power savings by allowing device drivers to
power down the PCI functions and disable the UART
channels and the parallel port.
A `wake-up' event (the `power management event') is
requested via the PME# pin from either of the power states
D2 or D3. For the UART channels, this wake-up request is
generated through the UART line RI (for power state D3),
and any modem line and the Serial Data In (for power state
D2). For the parallel port, this wake-up request is
generated through the multi-purpose IO pins, MIO(1:0).
Optional EEPROM:
The OX16PCI952 can be reconfigured from an external
Microwire
TM
based EEPROM. However, this is not required
in many applications as default values are provided for
typical applications. Features available via the use of the
EEPROM include redefining device ID's and vendor/sub-
vendor ID fields in the PCI header space, selectively
enabling/disabling interrupts, powerdown and wakeup
requests, and performing function access to pre-configure
the UARTs and the parallel port.
Multi-function device:
The OX16PCI952 is a multi-function device to enable users
to load individual device drivers for the internal serial ports
and the internal parallel port.
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