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Электронный компонент: ML64P168

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FEDL64P168-01
Semiconductor
ML64P168
4-Bit Microcontroller with Built-in RC Oscillation Type A/D Converter and LCD Driver
1/51
This version: Sep. 27,1999
Previous version: Jun.
22,1999
GENERAL DESCRIPTION
The ML64P168 is a one-time-programmable ROM-version product, which has one-time PROM (OTP)
as internal program memory. On the other hand, the ML64168 is a mask ROM-version product, which
has mask ROM as internal program memory.
Unlike the mask ROM-version product (ML64168), the ML64P168 cannot be supplied in the form of a
chip.
The ML64P168 has two operation modes, microcontroller operation mode and PROM mode. The
microcontroller operation mode is used to operate the ML64P168 like a ML64168 and the PROM
mode is used to program or read the PROM.
The ML64P168 is a low power 4-bit microcontroller incorporating the Oki's original CPU core nX-
4/30.
The ML64P168 provides a minimum instruction execution time of 4.3
s (@700kHz).
The ML64P168 contains 8160-byte program memory, 512-nibble data memory, three 4-bit input-output
ports, 4-bit input port, 4-bit output port, 2-channel RC oscillation type A/D converter, LCD driver for
up to 120 segments, and buzzer output port.
APPLICATION
The ML64P168 is best suited for low power, high precision thermometers and hygrometers.
FEATURES
Processing speed
Minimum instruction execution time
: 4.3
s @700 kHz
91.6
s @32.768 kHz
Clock generation circuit
Low-speed clock
: 32.768 kHz crystal oscillator
High-speed clock
: 700 kHz RC oscillator ( with an external resistor )
CPU clock is selectable as Low-speed clock / High-speed clock by software.
Operating voltage
: 1.5 V spec. / 3.0 V spec. ( selectable by mask option )
1.45 to 1.70 V (1.5V spec.)
2.7 to 3.5 V (3.0V spec.)
Operating temperature
: 0 to +65
C
The information contained herein can change without notice owing to product and/or technical improvements.
Before using the product, please make sure that the information being referred to is up-to-date.
FEDL64P168-01
Semiconductor
ML64P168
2/51
Memory space
Internal program memory
: 8160 bytes
Internal data memory
: 512 nibbles
RC oscillation type A/D converter
: 2 channels
Time division 2-channel method
Counter A
: 1 / ( 10
4
8 )
1
Counter B
: 1 / 2
14
1
I/O port
Input-output port
: 3 ports
4 bits
Input port
: 1 port
4 bits
Output port
: 1 port
4 bits
( 8 out of the 34 LCD driver outputs can be used as
output-only ports by mask option. )
LCD driver
: 34 outputs
(1) At 1/4 duty and 1/3 bias
: 120 segments (max.)
(2) At 1/3 duty and 1/3 bias
: 93 segments (max.)
(3) At 1/2 duty and 1/2 bias
: 64 segments (max.)
Voltage Regulator for LCD Driver (selectable by mask option)
The LCD panel display is stable regardless of temporary supply voltage drop, because the
voltage generated by the voltage regulator for LCD driver is supplied to the bias voltage
generator as a reference voltage.
LCD Operating Voltage
When the voltage regulator for LCD driver is used
: 3.6 V ( Duty cycle = 1/4 or 1/3 )
: 2.4 V ( Duty cycle = 1/2 )
When the voltage regulator for LCD driver is not used
: 4.5 V ( Duty cycle = 1/4 or 1/3 )
: 3.0 V ( Duty cycle = 1/2 )
Buzzer driver
: 1 output ( 4 output modes selectable )
Serial port
: Synchronous 8-bit transfer
Selectable as external clock / internal clock
Selectable as MSB first / LSB first
Capture circuit
: 2 channels ( 32Hz, 64Hz, 128Hz, 256Hz )
Battery check circuit
: 1 ( incorporated into the input-only port )
Watchdog timer
Interrupt
External interrupt
: 2 sources
Internal interrupt
: 8 sources
Package:
80-pin plastic QFP ( QFP80-P-1420-0.80-BK )
Product name : ML64P168 - xxxGP ( written PROM )
ML64P168 - NGP
( blanked PROM )
80-pin plastic QFP ( QFP80-P-1414-0.65-K )
Product name : ML64P168 - xxxGA ( written PROM )
ML64P168 - NGA ( blanked PROM )
xxx indicates a code number.
FEDL64P168-01
Semiconductor
ML64P168
3/51
PROGRAM DEVELOPMENT ENVIRONMENT
Structured Assembler
:
SASM64K
In Circuit Emulator
:
EASE64168
Debugger
:
DT64K
FEDL64P168-01
Semiconductor
ML64P168
4/51
BLOCK DIAGRAM
P1
TR1
TR2
C
BIAS
P0
BD
CAPR
INTC
ADC
2CLK
RSTC
TST
BC
TIMING
CONTROLLER
SIOP
IR
DECORDER
PROM
8160
Bytes
RAM
512
Nibbles
SP
TBC
BSR
HALT
MIEF
V
DD1
V
DD2
V
DD3
C1
C2
L0
L33
PCM PCL
X Y
H L
PCH
ALU
B A
L1
V
DDI
INT
P1.0
P1.1
P1.2
P1.3
BD
IN0
CS0
RS0
CRT0
RT0
IN1
CS1
RS1
RT1
OSC2
OSC1
XT
XT
RST
TST1
TST2
INT
INT
5
CPU CORE: nX-4/30
TR0
IR
ROMR
P2
P3
P4
V
DDI
INT
V
DDI
P0.0
P0.1
P0.2
P0.3
INT
INT
DATA BUS ( 8 )
DATA BUS ( 8 )
P2.0
P2.1
P4.3
to
LCD
WDT
ADDRESS BUS
to
V
PP
FEDL64P168-01
Semiconductor
ML64P168
5/51
PIN CONFIGURATION (TOP VIEW)
L2
L3
L4
L5
L6
L7
L8
L9
L10
L11
L12
L13
L14
L15
L16
P2.0
P2.1
P2.3
P3.0
P2.2
L0
L1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
P3.1
P3.2
21
22
23
24
P3.3
P4.0
P4.1
P4.2
P4.3
BD
V
PP
V
SS
RT0
CRT0
RS0
CS0
IN0
IN1
CS1
RS1
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
L31 / P6.1
L29 / P5.3
L28 / P5.2
L27 / P5.1
L26 / P5.0
L25
L24
L23
L22
L21
L20
L19
L18
L17
C2
C1
V
DD3
V
DD2
V
DDI
L30 / P6.0
63
62
61
64
L33 / P6.3
L32 / P6.2
V
DD1
RT1
P0.3
P0.1
P0.0
P1.3
P1.2
P1.1
P1.0
TST2
TST1
RESET
XT
XT
V
DD
OSC1
OSC2
P0.2
80
79
78
76
75
74
73
72
71
70
69
68
67
66
65
77
( GP : QFP80-P-1420-0.80-BK )
80-Pin Plastic QFP
FEDL64P168-01
Semiconductor
ML64P168
6/51
PIN CONFIGURATION (TOP VIEW) ( continued )
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
L2
L3
L4
L5
L6
L7
L8
L9
L10
L11
L12
L13
L14
L15
L16
P2.0
P2.1
P2.3
P3.0
P2.2
L31 / P6.1
L29 / P5.3
L28 / P5.2
L27 / P5.1
L26 / P5.0
L25
L24
L23
L22
L21
L20
L19
L18
L17
C2
C1
V
DD3
V
DD2
V
DDI
L30 / P6.0
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
P3.1
P3.2
P3.3
P4.0
P4.1
P4.2
P4.3
BD
V
PP
V
SS
RT0
CRT0
RS0
CS0
IN0
IN1
CS1
RS1
RT1
V
DD1
L1
L0
P0.3
P0.1
P0.0
P1.3
P1.2
P1.1
P1.0
TST2
TST1
RESET
XT
XT
V
DD
OSC1
OSC2
L33 / P6.3
L32 / P6.2
P0.2
80
79
78
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
77
( GA : QFP80-P-1414-0.65-K )
80-Pin Plastic QFP
FEDL64P168-01
Semiconductor
ML64P168
7/51
PIN DESCRIPTIONS
The basic functions of each pin of the ML64P168 is described in Table 1.
A symbol with a slash ( / ) denotes a pin that has a secondary function.
Refer to Table 2 for secondary functions.
For Type, " - " denotes a power supply pin, " I " an input pin, "O" an output pin, and "I/O" an input-
output pin.
Table 1 Pin Descriptions ( Basic Functions )
Pin No.
Function
Symbol
GP
GA
Type
Description
V
SS
32
30
-
0V power supply
V
DD
67
65
-
Positive power supply
V
DD1
42
40
-
Bias output for driving LCD (
+
1.5 V,
+
1.2 V* )
V
DD2
44
42
-
Bias output for driving LCD (
+
3.0 V,
+
2.4 V* )
V
DD3
45
43
-
Bias output for driving LCD (
+
4.5 V,
+
3.6 V* )
V
DDI
43
41
-
Positive power supply for I/O port interface
V
PP
31
29
-
Power supply (+12.5 V) for PROM writing
C1
46
44
-
Power
Supply
C2
47
45
-
Pins for connecting a capacitor for generating LCD driving
bias
XT
69
67
I
XT
68
66
O
Low-speed clock oscillation input and output pins.
Connect to a crystal ( 32.768 kHz ).
OSC1
66
64
I
Oscillation
OSC2
65
63
O
High-speed clock oscillation input and output pins.
Connect to an external resistor for oscillation ( R
OS
).
TST1
71
69
I
Test
TST2
72
70
I
Input pins for testing.
A pull-up resistor is internally connected to these pins.
Reset
RESET
70
68
I
System reset input pin.
Setting this pin to
L
level puts this device into a reset state.
Then, setting this pin to
H
level starts executing an
instruction from address 0000H.
*When the voltage regulator for LCD driver is used.
FEDL64P168-01
Semiconductor
ML64P168
8/51
Table 1 Pin Descriptions ( Basic Functions ) ( continued )
Pin No.
Function
Symbol
GP
GA
Type
Description
P0.0/
INT1/
CAPIN0
77
75
P0.1/
INT1/
CAPIN1
78
76
P0.2/
INT1
79
77
P0.3/
INT1/
CMP
80
78
I
4-bit input port ( Port 0 )
Selectable as pull-up resistor input, pull-down resistor input,
or high impedance input by the port 01 control register
( P01CON ).
P1.0
73
71
P1.1
74
72
P1.2
75
73
P1.3
76
74
O
4-bit output port ( Port 1 )
Selectable as NMOS open drain output or CMOS output by
the port 01 control register ( P01CON ).
P1.0 is a high current drive output port.
P2.0/
INT0
18
16
P2.1/
INT0
19
17
P2.2/
INT0
20
18
P2.3/
INT0
21
19
I/O
4-bit input-output port ( Port 2 )
Fllowing can be specified for each bit by the port 2 control
registers 0 to 3 ( P20CON to P23CON ).
(1) input or output
(2) pull-up/pull-down resistor input or high impedance input
(3) NMOS open drain output or CMOS output
P3.0/
INT0
22
20
P3.1/
INT0
23
21
P3.2/
INT0
24
22
P3.3/
INT0/
SIN
25
23
I/O
4-bit input-output port ( Port 3 )
Following can be specified for each bit by the port 3 control
registers 0 to 3 ( P30CON to P33CON ).
(1) input or output
(2) pull-up/pull-down resistor input or high impedance input
(3) NMOS open drain output or CMOS output
P4.0/
INT0/
SOUT
26
24
P4.1/
INT0/
SPR
27
25
P4.2/
INT0/
SCLK
28
26
Ports
P4.3/
INT0/
MON
29
27
I/O
4-bit input-output port ( Port 4 )
Following can be specified for each bit by the port 4 control
registers 0 to 3 ( P40CON to P43CON ).
(1) input or output
(2) pull-up/pull-down resistor input or high impedance input
(3) NMOS open drain output or CMOS output
FEDL64P168-01
Semiconductor
ML64P168
9/51
Table 1 Pin Descriptions ( Basic Functions ) ( continued )
Pin No.
Function
Symbol
GP
GA
Type
Description
Buzzer
BD
30
28
O
Output pin for the buzzer driver.
RT0
33
31
O
Resistance temperature sensor connection pin
( for channel 0 )
CRT0
34
32
O
Resistance/capacitance temperature sensor connection pin
( for channel 0 )
RS0
35
33
O
Reference resistor connection pin
( for channel 0 )
CS0
36
34
O
Reference capacitor connection pin
( for channel 0 )
IN0
37
35
I
Input pin for RC oscillator circuit
( for channel 0 )
RT1
41
39
O
Resistance temperature sensor connection pin
( for channel 1 )
RS1
40
38
O
Reference resistor connection pin
( for channel 1 )
CS1
39
37
O
Reference capacitor connection pin
( for channel 1 )
A/D
Converter
IN1
38
36
I
Input pin for RC oscillator circuit
( for channel 1 )
FEDL64P168-01
Semiconductor
ML64P168
10/51
Table 1 Pin Descriptions ( Basic Functions ) ( continued )
Pin No.
Function
Symbol
GP
GA
Type
Description
L0
1
79
O
L1
2
80
O
L2
3
1
O
L3
4
2
O
L4
5
3
O
L5
6
4
O
L6
7
5
O
L7
8
6
O
L8
9
7
O
L9
10
8
O
L10
11
9
O
L11
12
10
O
L12
13
11
O
L13
14
12
O
L14
15
13
O
L15
16
14
O
L16
17
15
O
L17
48
46
O
L18
49
47
O
L19
50
48
O
L20
51
49
O
L21
52
50
O
L22
53
51
O
L23
54
52
O
L24
55
53
O
L25
56
54
O
LCD segment and common signals output pins.
L26 / P5.0
57
55
O
L27 / P5.1
58
56
O
L28 / P5.2
59
57
O
L29 / P5.3
60
58
O
L30 / P6.0
61
59
O
L31 / P6.1
62
60
O
L32 / P6.2
63
61
O
LCD
Driver
L33 / P6.3
64
62
O
LCD segment and common signals output pins.
These pins can be configured to be output ports by a mask
option.
FEDL64P168-01
Semiconductor
ML64P168
11/51
Table 2 Pin Descriptions ( Secondary Functions )
Pin No.
Function
Symbol
GP
GA
Type
Description
P2.0/
INT0
18
16
P2.1/
INT0
19
17
P2.2/
INT0
20
18
P2.3/
INT0
21
19
I
P3.0/
INT0
22
20
P3.1/
INT0
23
21
P3.2/
INT0
24
22
P3.3/
INT0
25
23
I
P4.0/
INT0
26
24
P4.1/
INT0
27
25
P4.2/
INT0
28
26
P4.3/
INT0
29
27
I
Secondary functions of P2.0 to P2.3, P3.0 to P3.3, and P4.0
to P4.3:
Level-triggered external 0 interrupt input pins.
The change of input signal level causes an interrupt to occur.
P0.0/
INT1
77
75
P0.1/
INT1
78
76
P0.2/
INT1
79
77
External
Interrupt
P0.3/
INT1
80
78
I
Secondary functions of P0.0 to P0.3:
Level-triggered external 1 interrupt input pins.
The change of input signal level causes an interrupt to occur.
P0.0/
CAPIN0
77
75
Secondary functions of P0.0:
This pin is assigned the capture circuit trigger input pin of
CAPR0 function .
Capture
trigger
P0.1/
CAPIN1
78
76
I
Secondary functions of P0.1:
This pin is assigned the capture circuit trigger input pin of
CAPR1 function .
P3.3/
SIN
25
23
I
Secondary functions of P3.3:
This pin is assigned the data input of a serial port.
P4.0/
SOUT
26
24
O
Secondary functions of P4.0:
This pin is assigned the data output of a serial port.
P4.1/
SPR
27
25
O
Secondary functions of P4.1:
This pin is assigned the ready output of a serial port.
Serial
port
P4.2/
SCLK
28
26
I/O
Secondary functions of P4.2:
This pin is assigned the clock input-output of a serial port.
FEDL64P168-01
Semiconductor
ML64P168
12/51
Table 2 Pin Descriptions ( Secondary Functions ) ( continued )
Pin No.
Function
Symbol
GP
GA
Type
Description
RC
Oscillation
Monitor
P4.3/
MON
29
27
O
Secondary functions of P4.3:
This pin is a monitor output of the RC oscillation clock for an
A/D converter and a 700kHz RC oscillation clock for a system
clock.
Battery
Check
P0.3/
CMP
80
78
I
Secondary functions of P0.3:
This pin is an analog comparator input pin for battery check
circuit.
FEDL64P168-01
Semiconductor
ML64P168
13/51
MEMORY MAPS
Program Memory ( PROM )
Interrupt area
CZP area
Start address
1FFFH
1FE0H
003EH
0020H
0010H
0000H
Test program area
32 bytes
8160 bytes
Contents of interrupt area
8 bits
0020H
0.1Hz interrupt
0023H
1Hz interrupt
0026H
16Hz interrupt
0029H
32Hz interrupt
002CH
256Hz interrupt
002FH
A/D converter interrupt
0032H
External 1 interrupt
0035H
Serial port interrupt
0038H
External 0 interrupt
003BH
Watchdog interrupt
Program Memory Map
Address 0000H is the instruction execution start address by the system reset.
The CZP area from address 0010H to address 001FH is the start address for the CZP subroutine of 1-
byte call instruction.
The start address of interrupt subroutine is assigned to the interrupt address from address 0020H to
003DH.
The user area has 8160 bytes of address 0000H to 1FDFH. No program can be stored in the test
program area.
FEDL64P168-01
Semiconductor
ML64P168
14/51
Data Memory

The data memory area consists of 8 banks and each bank has 256 nibbles ( 256
4 bits ).
The data RAM is assigned to BANK 6, BANK 7 and peripheral ports are assigned to BANK 0.
BANK7
Data RAM area
( 256 nibbles )
BANK0
Inaccessible area
Unused area
7FFH
780H
700H
6FFH
100H
0FFH
080H
07FH
000H
SFR area
Contents of 000H to 07FH
07FH
000H
Data / Stack area ( 128 nibbles )
BANK6
Data RAM area
( 256 nibbles )
4 bits
512 nibbles
600H
Data Memory Map
Half the BANK 7 of Data RAM area ( 128 nibbles ) is shared by the stack area. The stack is a memory
starting from address 7FFH toward the low-order addresses where 4 nibbles are used by Subroutine
Call Instruction and 8 nibbles are used by an interrupt.
The addresses 080H to 0FFH of BANK 0 are not assigned as the data memory, so access to these
addresses has no effect. Moreover, it is impossible to access BANK 1 to BANK 5.
FEDL64P168-01
Semiconductor
ML64P168
15/51
ABSOLUTE MAXIMUM RATINGS ( 1.5



V Spec. )
(V
SS
= 0V)
Parameter
Symbol
Condition
Rating
Unit
Power supply voltage 1
V
DD1
Ta = 25C
-0.3 to + 2.0
V
Power supply voltage 2
V
DD2
Ta = 25C
-0.3 to + 4.0
V
Power supply voltage 3
V
DD3
Ta = 25
C
-0.3 to + 5.5
V
Power supply voltage 4
V
DDI
Ta = 25
C
-0.3 to + 5.5
V
Power supply voltage 5
V
DD
Ta = 25
C
-0.3 to + 2.0
V
Input voltage 1
V
IN1
V
DD
input, Ta = 25
C
-0.3 to V
DD
+ 0.3
V
Input voltage 2
V
IN2
V
DDI
input, Ta = 25
C
-0.3 to V
DDI
+ 0.3
V
Output voltage 1
V
OUT1
V
DD1
output, Ta = 25
C
-0.3 to V
DD1
+ 0.3
V
Output voltage 2
V
OUT2
V
DD2
output, Ta = 25
C
-0.3 to V
DD2
+ 0.3
V
Output voltage 3
V
OUT3
V
DD3
output, Ta = 25
C
-0.3 to V
DD3
+ 0.3
V
Output voltage 4
V
OUT4
V
DD
output, Ta = 25
C
-0.3 to V
DD
+ 0.3
V
Output voltage 5
V
OUT5
V
DDI
output, Ta = 25
C
-0.3 to V
DD
+ 0.3
V
Ta = 0 to + 65
C
QFP80-P-1420-0.80-BK
381
mW
Power Dissipation
PD
Ta = 0 to + 65
C
QFP80-P-1414-0.65-K
334
mW
Storage temperature
T
STG
-
-55 to + 150
C
RECOMMENDED OPERATING CONDITIONS ( 1.5V Spec. )
(V
SS
= 0V)
Parameter
Symbol
Condition
Rating
Unit
Operating Temperature*
T
op
-
0 to + 65
C
V
DD
,V
DD1
-
1.45 to 1.70
V
Operating Voltage*
V
DDI
-
2.70 to 5.25
V
External 700kHz RC Oscillator
Resistance*
R
OS
-
60 to 200
k
Crystal oscillation frequency*
f
XT
-
30 to 35
kHz
* : At Non-regulated LCD driver.
In case of select a voltage regulated LCD driver, see P.37/51.
FEDL64P168-01
Semiconductor
ML64P168
16/51
ELECTRICAL CHARACTERISTICS ( 1.5



V Spec. )
DC Characteristics ( 1.5



V Spec. )
(V
SS
=0V, V
DD1
=V
DD
=1.5V, V
DDI
=2.7V, Ta=0 to +65
C unless otherwise specified )
Parameter
Symbol
Condition
Min.
Typ.
Max.
Unit
Measuring
Circuit
+100%
V
DD2
Voltage*
V
DD2
C
a
, C
b
, C
12
=0.1
F
-50%
2.8
3.0
3.2
V
+100%
V
DD3
Voltage*
V
DD3
C
a
, C
b
, C
12
=0.1
F
-50%
4.3
4.5
4.7
V
Crystal Oscillation
Start Voltage
V
STA
Oscillation start time:
within 5 seconds
1.47
-
-
V
Crystal Oscillation
Hold Voltage
V
HOLD
-
1.40
-
-
V
Crystal Oscillation
Stop Detection Time
T
STOP
-
0.1
-
1000
ms
Internal Crystal
Oscillator Capacitance
C
G
-
10
15
20
pF
External Crystal
Oscillator Capacitance
C
GEX
When external C
G
used
10
-
30
pF
Internal Crystal
Oscillator Capacitance
C
D
-
10
15
20
pF
Internal 700kHz RC
Oscillator Capacitance
C
OS
-
8
12
16
pF
700kHz RC Oscillation
Frequency
f
OSC
External resistor R
OS
=160k
V
DD
= 1.45 to 1.70V
80
280
350
kHz
POR Generation
Voltage
V
POR1
When V
DD
is between
V
POR1
and 1.5V
0
-
0.4
V
POR Non-generation
Voltage
V
POR2
No POR when V
DD
is
between V
POR2
and 1.5V
1.4
-
1.5
V
1
Battery Check
Reference Voltage
V
RB
Ta = 25
C
0.50
0.60
0.70
V
V
RB
Temperature
Variation
V
RB
-
-
-2
-
mV/
C
2
Notes:
1."POR" denotes Power On Reset.
2."T
STOP
" indicates that if the crystal oscillator stops over the value of T
STOP
, the system reset occurs.
* : At Non-regulated LCD driver.
In case of select a voltage regulated LCD driver, see P.37/51.
FEDL64P168-01
Semiconductor
ML64P168
17/51
DC Characteristics ( 1.5V Spec. ) ( Continued )
(V
SS
=0V, V
DD1
=V
DD
=1.5V, V
DDI
=2.7V, Ta=0 to +65
C unless otherwise specified )
Parameter
Symbol
Condition
Min.
Typ.
Max
.
Unit
Measur-
ing
Circuit
Supply current 1*
I
DD1
CPU in halt state
(700kHz RC oscillation stop)
-
2
5
A
Supply current 2*
I
DD2
CPU in operating state
(700kHz RC oscillation stop)
-
15
30
A
Supply current 3
I
DD3
CPU in operating state
(700kHz RC oscillation in operation)
-
200
300
A
Supply current 4
I
DD4
Serial transfer, f
SCK
=300kHz,
CPU in operating state
(700kHz RC oscillation stop)
-
60
100
A
R
T0
=10k
-
150
230
A
Supply current 5
I
DD5
CPU in halt state
(700kHz RC oscillation
stop)
RC oscillation for A/D
converter is in operating
state
R
T0
=2k
-
600
900
A
Supply current 6
I
DD6
Battery check circuit in operating state,
CPU in operating state
(700kHz RC oscillation stop)
-
25
125
A
1
* : At Non-regulated LCD driver.
In case of select a voltage regulated LCD driver, see P.37/51.
FEDL64P168-01
Semiconductor
ML64P168
18/51
DC Characteristics (1.5



V Spec. ) ( Continued )
(V
SS
=0V, V
DD1
=V
DD
=1.5V, V
DD2
=3.0V, V
DD3
=4.5V, V
DDI
=2.7V, Ta=0 to +65
C unless otherwise specified )
Parameter
Symbol
Condition
Min.
Typ.
Max.
Unit
Measuring
Circuit
I
OH1
V
OH1
= V
DDI
- 0.5V
-6.0
-1.7
-0.7
I
OL1
V
OL1
= 0.5V
2
5
20
I
OH1S
V
DDI
= 5.0V, V
OH1S
= V
DDI
- 0.5V
-9
-3.0
-1
Output current 1
( P1.0 )
I
OL1S
V
DDI
= 5.0V, V
OL1S
= 0.5V
4
8
25
I
OH2
V
OH2
= V
DDI
- 0.5V
-6.0
-2.0
-0.7
I
OL2
V
OL2
= 0.5V
0.7
2.0
6.0
I
OH2S
V
DDI
= 5.0V, V
OH2S
= V
DDI
- 0.5V
-9
-3
-1
Output current 2
( P1.1 to P1.3 )
( P2.0 to P2.3 )
( P3.0 to P3.3 )
( P4.0 to P4.3 )
I
OL2S
V
DDI
= 5.0V, V
OL2S
= 0.5V
1
3
9
I
OH3
V
OH3
= V
DD
- 0.7V
-1.8
-0.6
-0.1
Output current 3
( BD )
I
OL3
V
OL3
= 0.7V
0.2
2
4
I
OH4
V
OH4
= V
DD
- 0.1V
-1.1
-0.6
-0.2
Output current 4
( RT0, RT1, RS0,
RS1, CRT0, CS0,
CS1 )
I
OL4
V
OL4
= 0.1V
0.3
0.6
1.1
I
OH5
V
OH5
= V
DDI
- 0.5V
-1.5
-0.8
-0.15
I
OL5
V
OL5
= 0.5V
0.15
1.0
4
I
OH5S
V
DDI
= 5V, V
OH5S
= V
DDI
- 0.5V
-2.0
-1.5
-0.2
Output current 5
( When the pins
L26 to L33 are
configured as
output ports )
I
OL5S
V
DDI
= 5V, V
OL5S
= 0.5V
0.2
3.0
5.0
I
OH6
V
OH6
= V
DD
- 0.5V
-2.1
-0.7
-0.15
Output current 6
( OSC2 )
I
OL6
V
OL6
= 0.5V
0.15
0.7
2.1
mA
2
I
OH7
V
OH7
= V
DD3
- 0.2V (V
DD3
level)
-
-
-4
I
OMH7
V
OMH7
= V
DD2
+ 0.2V (V
DD2
level)
4
-
-
I
OMH7S
V
OMH7S
= V
DD2
- 0.2V (V
DD2
level)
-
-
-4
I
OML7
V
OML7
= V
DD1
+ 0.2V (V
DD1
level)
4
-
-
I
OML7S
V
OML7S
= V
DD1
- 0.2V (V
DD1
level)
-
-
-4
Output current 7
( L0 to L33 )
I
OL7
V
OL7
= V
SS
+ 0.2V (V
SS
level)
4
-
-
I
OOH
V
OH
= V
DD
-
-
0.3
Output Leakage
Current
( P1.0 to P1.3 )
( P2.0 to P2.3 )
( P3.0 to P3.3 )
( P4.0 to P4.3 )
(RT0, RT1, RS0,
RS1, CRT0, CS0,
CS1 )
I
OOL
V
OL
= V
SS
-0.3
-
-
A
-
FEDL64P168-01
Semiconductor
ML64P168
19/51
DC Characteristics (1.5



V Spec. ) ( Continued )
( V
SS
=0V, V
DD1
=V
DD
=1.5V, V
DD2
=3.0V, V
DD3
=4.5V, V
DDI
=2.7V, Ta=0 to +65
C unless otherwise specified )
Parameter
Symbol
Condition
Min.
Typ.
Max.
Unit
Measuring
Circuit
I
IH1
V
IH1
= V
DDI
( when pulled down )
30
90
300
I
IL1
V
IL1
= V
SS
( when pulled up )
-300
-90
-30
I
IH1S
V
IH1
= V
DDI
= 5V ( when pulled down )
80
250
800
I
IL1S
VI
L1
= V
SS
, V
DDI
= 5V ( when pulled up )
-800
-250
-80
I
IH1Z
V
IH1
= V
DDI
( in a high impedance )
0
-
1
Input Current 1
( P0.0 to P0.3 )
( P2.0 to P2.3 )
( P3.0 to P3.3 )
( P4.0 to P4.3 )
I
IL1Z
V
IL1
= V
SS
(in a high impedance )
-1
-
0
I
IH2
V
IH2
= V
DD
( when pulled down )
2
8
60
I
IH2Z
V
IH2
= V
DD
( in a high impedance )
0
-
1
Input Current 2
( IN0, IN1 )
I
IL2Z
V
IL2
= V
SS
( in a high impedance )
-1
-
0
I
IL3
V
IL3
= V
SS
( when pulled up )
-60
-18
-5
I
IH3Z
V
IH3
= V
DD
( in a high impedance )
0
-
1
Input Current 3
( OSC1 )
I
IL3Z
V
IL3
= V
SS
( in a high impedance )
-1
-
0
I
IH4
V
IH
= V
DD
0
-
1
A
Input Current 4
(
RESET, TST1,
TST2 )
I
IL4
V
IL4
= V
SS
-1.0
-0.3
-0.05
mA
3
V
IH1
-
1.2
-
1.5
V
IL1
-
0
-
0.3
V
IH1S
V
DDI
= 5.0V
4
-
5
Input Voltage 1
( P0.0 to P0.3 )
( P2.0 to P2.3 )
( P3.0 to P3.3 )
( P4.0 to P4.3 )
V
IL1S
V
DDI
= 5.0V
0
-
1
V
IH2
-
1.2
-
1.5
Input Voltage 2
( IN0, IN1, OSC1 )
V
IL2
-
0
-
0.3
V
IH3
-
1.2
-
1.5
Input Voltage 3
(
RESET, TST1,
TST2 )
V
IL3
-
0
-
0.3
V
4
FEDL64P168-01
Semiconductor
ML64P168
20/51
DC Characteristics (1.5



V Spec. ) ( Continued )
(V
SS
=0V, V
DD1
=V
DD
=1.5V, V
DD2
=3.0V, V
DD3
=4.5V, V
DDI
=2.7V, Ta=0 to +65
C unless otherwise specified )
Parameter
Symbol
Condition
Min.
Typ.
Max.
Unit
Measuring
Circuit
V
T1
-
0.05
0.1
0.3
Hysteresis Width
( P0.0 to P0.3 )
( P2.0 to P2.3 )
( P3.0 to P3.3 )
( P4.0 to P4.3 )
V
T1S
V
DDI
= 5.0V
0.25
1.0
1.5
Hysteresis Width
(
RESET, TST1,
TST2 )
V
T2
-
0.05
0.1
0.3
V
4
Input Pin
Capacitance
( P0.0 to P0.3 )
( P2.0 to P2.3 )
( P3.0 to P3.3 )
( P4.0 to P4.3 )
C
IN
-
-
-
5
pF
1
FEDL64P168-01
Semiconductor
ML64P168
21/51
Measuring circuit 1
OSC1
R
OS
XT
XT
32.768kHz
Crystal
C
12
C1
C2
C
A
,C
B
,C
C
,C
12
R
OS
R
T0
C
S0
R
I0
:
:
:
:
:
0.1
F
160k
10k
/2k
820pF
10k
OSC2
R
T0
C
S0
R
I0
IN0
CS0
RT0
A
V
DDI
V
DD
V
SS
V
DD2
V
V
DD3
V
C
A
C
B
V
DD1
V
C
C
Measuring circuit 2
V
DD
V
DD3
V
DD2
V
DD1
V
SS
V
IH
INPUT
*1
V
IL
A
*2
OUTPUT
V
DDI
FEDL64P168-01
Semiconductor
ML64P168
22/51
Measuring circuit 3
V
DD
V
DD3
V
DD2
V
SS
A
*3
INPUT
OUTPUT
V
DD1
V
DDI
Measuring circuit 4
V
DD
V
DD3
V
DD2
V
DD1
V
SS
V
IH
*3
V
IL
*1 Input logic circuit to determine the specified measuring conditions.
*2 Measured at the specified output pins.
*3 Measured at the specified input pins.
INPUT
OUTPUT
Waveform
Monitoring
V
DDI
FEDL64P168-01
Semiconductor
ML64P168
23/51
A/D Converter Characteristics (1.5



V Spec. )
( V
SS
=0V, V
DD1
=V
DD
=1.5V, V
DDI
=2.7V, Ta=0 to +65
C
unless otherwise specified
)
Parameter
Symbol
Condition
Min.
Typ.
Max.
Unit
Measur-
ing
Circuit
Resistor
for Oscillation
R
S0
,
R
S1
,
R
T0
,
R
T0-1
,
R
T1
C
S0
, C
T0
, C
S1
740pF
2
-
-
k
Input Current
Limiting
Resistor
R
I0
,
R
I1
-
1
10
-
k
f
OSC1
Resistor for oscillation =2 k
165
221
256
kHz
f
OSC2
Resistor for oscillation =10 k
41.8
52.2
60.6
kHz
Oscillation
Frequency
f
OSC3
Resistor for oscillation =200 k
2.55
3.04
3.53
kHz
Kf1
R
T0
, R
T0-1
, R
T1
= 2 k
3.89
4.18
4.35
-
Kf2
R
T0
, R
T0-1
, R
T1
= 10 k
0.990
1.000
1.010
-
RS
RT Oscillation
Frequency Ratio (*)
Kf3
R
T0
, R
T0-1
, R
T1
= 200 k
0.0561
0.0584
0.0637
-
5
* Kfx is the ratio of the oscillation frequency by a sensor resistor to the oscillation frequency by a
reference resistor in the same condition.
f
OSCX
(RT0 - CS0 Oscillation)
f
OSCX
(RT0-1 - CS0 Oscillation)
f
OSCX
(RT1 - CS1 Oscillation)
Kfx=
f
OSCX
(RS0 - CS0 Oscillation)
,
f
OSCX
(RS0 - CS0 Oscillation)
,
f
OSCX
(RS1 - CS1 Oscillation)
(
X
= 1, 2, 3)
FEDL64P168-01
Semiconductor
ML64P168
24/51
Measuring circuit 5
R
T1
(CROSC1)
R
S1
C
S1
R
I1
RT1 RS1 CS1 IN1
R
I0
C
S0
R
S0
IN0 CS0 RS0
C
T0
R
T0
RT0
CRT0
R
T0-1
(CROSC0)
P0.0
P0.1
P0.2
P0.3
Oscillation Mode Designation
RESET
TST1
TST2
V
SS
D.U.T
P4.3
Frequency
Measurement
(f
OSCX
)
R
T0
,R
T0-1
,R
T1
=2k
/10k
/200k
R
S0
,R
S1
=10k
R
I0
,R
I1
=10k
C
S0
,C
T0
,C
S1
=820pF
V
DD
V
DDI
FEDL64P168-01
Semiconductor
ML64P168
25/51
AC Characteristics (1.5



V Spec. ) ( Serial Interface )
( V
SS
=0v, V
DD
=1.5V , V
DDI
=2.7V, Ta=0 to +65
C unless otherwise specified
)
Parameter
Symbol
Condition
Min.
Typ.
Max.
Unit
SCLK Input Fall Time
t
f
-
-
15
50
ns
SCLK Input Rise Time
t
r
-
-
15
50
ns
SCLK Input "L" Level Pulse Width
t
CWL
-
0.8
-
-
s
SCLK Input "H" Level Pulse Width
t
CWH
-
0.8
-
-
s
SCLK Input Cycle Time
t
CYC
-
2.0
-
-
s
SCLK Output Cycle Time
t
CYC1(O)
CPU is operating at
32.768kHz
-
30.5
-
s
SCLK Output Cycle Time
t
CYC2(O)
CPU is operating at 700kHz
-
1.43
-
s
SOUT Output Delay Time
t
DDR
-
-
-
0.4
s
SIN Input Setup Time
t
DS
-
0.5
-
-
s
SIN Input Hold Time
t
DH
-
0.8
-
-
s
Synchronous communication timing
 ( "H" level = 4.0V, "L" level = 1.0V )
t
r
t
f
t
CWH
t
CWL
t
DDR
t
DDR
t
CYC
t
DS
t
DS
t
DH
5V
5V
5V
SCLK
(P4.2)
SOUT
(P4.0)
SIN
(P3.3)
FEDL64P168-01
Semiconductor
ML64P168
26/51
ABSOLUTE MAXIMUM RATINGS (3.0



V Spec. )
(V
SS
= 0V)
Parameter
Symbol
Condition
Rating
Unit
Power supply voltage 1
V
DD1
Ta = 25C
-0.3 to + 2.0
V
Power supply voltage 2
V
DD2
Ta = 25C
-0.3 to + 4.0
V
Power supply voltage 3
V
DD3
Ta = 25
C
-0.3 to + 5.5
V
Power supply voltage 4
V
DDI
Ta = 25
C
-0.3 to + 5.5
V
Power supply voltage 5
V
DD
Ta = 25
C
-0.3 to + 4.0
V
Input voltage 1
V
IN1
V
DD
input, Ta = 25
C
-0.3 to V
DD
+ 0.3
V
Input voltage 2
V
IN2
V
DDI
input, Ta = 25
C
-0.3 to V
DDI
+ 0.3
V
Output voltage 1
V
OUT1
V
DD1
output, Ta = 25
C
-0.3 to V
DD2
+ 0.3
V
Output voltage 2
V
OUT2
V
DD2
output, Ta = 25
C
-0.3 to V
DD3
+ 0.3
V
Output voltage 3
V
OUT3
V
DD3
output, Ta = 25
C
-0.3 to V
DD
+ 0.3
V
Output voltage 4
V
OUT4
V
DD
output, Ta = 25
C
-0.3 to V
DD
+ 0.3
V
Output voltage 5
V
OUT5
V
DDI
output, Ta = 25
C
-0.3 to V
DD
+ 0.3
V
Ta = 0 to + 65
C
QFP80-P-1420-0.80-BK
381
mW
Power Dissipation
PD
Ta = 0 to + 65
C
QFP80-P-1414-0.65-K
334
mW
Storage temperature
T
STG
-
-55 to + 150
C
RECOMMENDED OPERATING CONDITIONS ( 3.0V Spec. )
(V
SS
= 0V)
Parameter
Symbol
Condition
Rating
Unit
Operating Temperature*1
T
op
-
0 to + 65
C
V
DD
-
2.7 to 3.5
V
Operating Voltage*1
V
DDI
-
V
DD
to 5.25
V
External 700kHz RC oscillator
Resistance*1
R
OS
-
60 to 200
k
Crystal oscillation frequency*1
f
XT
-
30 to 66
kHz
*1: At Non-regulated LCD driver.
In case of select a voltage regulated LCD driver, see P.37/51.
FEDL64P168-01
Semiconductor
ML64P168
27/51
ELECTRICAL CHARACTERISTICS ( 3.0V Spec. )
DC Characteristics ( 3.0V Spec. )
(V
SS
=0V, V
DD2
=V
DDI
=V
DD
=3.0V, Ta=0 to +65
C unless otherwise specified )
Parameter
Symbol
Condition
Min.
Typ.
Max.
Unit
Measuring
Circuit
+100%
V
DD1
Voltage*
V
DD1
C
a
, C
b
, C
12
=0.1
F
-50%
1.3
1.5
1.7
V
+100%
V
DD3
Voltage*
V
DD3
C
a
, C
b
, C
12
=0.1
F
-50%
4.3
4.5
4.7
V
Crystal Oscillation
Start Voltage
V
STA
Oscillation start time:
within 5 seconds
2.7
-
-
V
Crystal Oscillation
Hold Voltage
V
HOLD
-
2.7
-
-
V
Crystal Oscillation
Stop Detection Time
T
STOP
-
0.1
-
1000
ms
Internal Crystal
Oscillator Capacitance
C
G
-
10
15
20
pF
External Crystal
Oscillator Capacitance
C
GEX
When external C
G
used
10
-
30
pF
Internal Crystal
Oscillator Capacitance
C
D
-
10
15
20
pF
Internal 700kHz RC
Oscillator Capacitance
C
OS
-
8
12
16
pF
700kHz RC Oscillation
Frequency
f
OSC
External resistor R
OS
=60k
V
DD
= 2.7 to 3.5V
600
700
1000
kHz
POR Generation
Voltage
V
POR1
When V
DD
is between
V
POR1
and 3.0V
0
-
0.7
V
POR Non-generation
Voltage
V
POR2
No POR when V
DD
is
between V
POR2
and 3.0V
2.7
-
3
V
1
Battery Check
Reference Voltage
V
RB
Ta = 25
C
0.50
0.60
0.70
V
V
RB
Temperature
Variation
V
RB
-
-2
-
mV/
C
2
Notes:
1."POR" denotes Power On Reset.
2."T
STOP
" indicates that if the crystal oscillator stops over the value of T
STOP
, the system reset occurs.
*: At Non-regulated LCD driver.
In case of select a voltage regulated LCD driver, see P.37/51.
FEDL64P168-01
Semiconductor
ML64P168
28/51
DC Characteristics ( 3.0V Spec. ) ( Continued )
(V
SS
=0V, V
DD2
=V
DDI
=V
DD
=3.0V, Ta=0 to +65
C unless otherwise specified )
Parameter
Symbol
Condition
Min.
Typ.
Max.
Unit
Measuring
Circuit
Supply current 1*
I
DD1
CPU in halt state
(700kHz RC oscillation stop)
-
7
12
A
Supply current 2*
I
DD2
CPU in operating state
(700kHz RC oscillation stop)
-
35
50
A
Supply current 3
I
DD3
CPU in operating state
(700kHz RC oscillation in operation)
-
800
1400
A
Supply current 4
I
DD4
Serial transfer, f
SCK
=300kHz,
CPU in operating state
(700kHz RC oscillation stop)
-
40
70
A
R
T0
=10k
-
300
450
A
Supply current 5
I
DD5
CPU in halt state
(700kHz RC oscillation stop)
RC oscillation for A/D
converter is in operating state
R
T0
=2k
-
1200
1800
A
Supply current 6
I
DD6
Battery check circuit in operating state,
CPU in operating state
(700kHz RC oscillation stop)
-
55
150
A
1
*: At Non-regulated LCD driver.
In case of select a voltage regulated LCD driver, see P.37/51.
FEDL64P168-01
Semiconductor
ML64P168
29/51
DC Characteristics (3.0



V Spec. ) ( Continued )
( V
SS
=0V, V
DD1
=1.5V, V
DD2
=V
DDI
=V
DD
=3.0V, V
DD3
=4.5V, Ta=0 to +65
C unless otherwise specified )
Parameter
Symbol
Condition
Min.
Typ.
Max.
Unit
Measuring
Circuit
I
OH1
V
OH1
= V
DDI
- 0.5V
-6.0
-1.7
-0.7
I
OL1
V
OL1
= 0.5V
2
5
20
I
OH1S
V
DDI
= 5.0V, V
OH1S
= V
DDI
- 0.5V
-9
-3
-1
Output current 1
( P1.0 )
I
OL1S
V
DDI
= 5.0V, V
OL1S
= 0.5V
4
8
25
I
OH2
V
OH2
= V
DDI
- 0.5V
-6.0
-2.0
-0.7
I
OL2
V
OL2
= 0.5V
0.7
2.0
6.0
I
OH2S
V
DDI
= 5.0V, V
OH2S
= V
DDI
- 0.5V
-9
-3
-1
Output current 2
( P1.1 to P1.3 )
( P2.0 to P2.3 )
( P3.0 to P3.3 )
( P4.0 to P4.3 )
I
OL2S
V
DDI
= 5.0V, V
OL2S
= 0.5V
1
3
9
I
OH3
V
OH3
= V
DD
- 0.7V
-6.0
-2.0
-0.7
Output current 3
( BD )
I
OL3
V
OL3
= 0.7V
0.7
6.0
10.0
I
OH4
V
OH4
= V
DD
- 0.1V
-2.5
-0.8
-0.3
Output current 4
( RT0, RT1, RS0,
RS1, CRT0, CS0,
CS1 )
I
OL4
V
OL4
= 0.1V
0.7
1.3
2.5
I
OH5
V
OH5
= V
DDI
- 0.5V
-1.5
-0.8
-0.15
I
OL5
V
OL5
= 0.5V
0.15
2.0
4.0
I
OH5S
V
DDI
= 5V, V
OH5S
= V
DDI
- 0.5V
-2.0
-1.5
-0.2
Output current 5
( When the pins
L26 to L33 are
configured as
output ports )
I
OL5S
V
DDI
= 5V, V
OL5S
= 0.5V
0.2
3.0
5.0
I
OH6
V
OH6
= V
DD
- 0.5V
-4.0
-0.8
-0.3
Output current 6
( OSC2 )
I
OL6
V
OL6
= 0.5V
0.7
3.0
6.0
mA
2
I
OH7
V
OH7
= V
DD3
- 0.2V (V
DD3
level)
-
-
-4
I
OMH7
V
OMH7
= V
DD2
+ 0.2V (V
DD2
level)
4
-
-
I
OMH7S
V
OMH7S
= V
DD2
- 0.2V (V
DD2
level)
-
-
-4
I
OML7
V
OML7
= V
DD1
+ 0.2V (V
DD1
level)
4
-
-
I
OML7S
V
OML7S
= V
DD1
- 0.2V (V
DD1
level)
-
-
-4
Output current 7
( L0 to L33 )
I
OL7
V
OL7
= V
SS
+ 0.2V (V
SS
level)
4
-
-
I
OOH
V
OH
= V
DD
-
-
0.3
Output Leakage
Current
( P1.0 to P1.3 )
( P2.0 to P2.3 )
( P3.0 to P3.3 )
( P4.0 to P4.3 )
(RT0, RT1, RS0,
RS1, CRT0, CS0,
CS1 )
I
OOL
V
OL
= V
SS
-0.3
-
-
A
-
FEDL64P168-01
Semiconductor
ML64P168
30/51
DC Characteristics (3.0



V Spec. ) ( Continued )
(V
SS
=0V, V
DD1
=1.5V, V
DD2
=V
DDI
=V
DD
=3.0V, V
DD3
=4.5V, Ta=0 to +65
C unless otherwise specified )
Parameter
Symbol
Condition
Min.
Typ.
Max.
Unit
Measuring
Circuit
I
IH1
V
IH1
= V
DDI
( when pulled down )
30
90
300
I
IL1
V
IL1
= V
SS
( when pulled up )
-300
-90
-30
I
IH1S
V
IH1
= V
DDI
= 5V ( when pulled down )
80
250
800
I
IL1S
V
IL1
= V
SS
, V
DD
= 5V ( when pulled up )
-800
-250
-80
I
IH1Z
V
IH1
= V
DDI
( in a high impedance )
0
-
1
Input Current 1
( P0.0 to P0.3 )
( P2.0 to P2.3 )
( P3.0 to P3.3 )
( P4.0 to P4.3 )
I
IL1Z
V
IL1
= V
SS
(in a high impedance )
-1
-
0
I
IH2
V
IH2
= V
DD
(
when pulled down )
30
90
300
I
IH2Z
V
IH2
= V
DD
( in a high impedance )
0
-
1
Input Current 2
( IN0, IN1 )
I
IL2Z
V
IL2
= V
SS
( in a high impedance )
-1
-
0
I
IL3
V
IL3
= V
SS
( when pulled up )
-300
-110
-10
I
IH3Z
V
IH3
= V
DD
( in a high impedance )
0
-
1
Input Current 3
( OSC1 )
I
IL3Z
V
IL3
= V
SS
( in a high impedance )
-1
-
0
I
IH4
V
IH4
= V
DD
0
-
1
A
Input Current 4
(
RESET, TST1,
TST2 )
I
IL4
V
IL4
= V
SS
-3.00
-1.50
-0.75
mA
3
V
IH1
-
2.4
-
3.0
V
IL1
-
0
-
0.6
V
IH1S
V
DDI
= 5.0V
4
-
5
Input Voltage 1
( P0.0 to P0.3 )
( P2.0 to P2.3 )
( P3.0 to P3.3 )
( P4.0 to P4.3 )
V
IL1S
V
DDI
= 5.0V
0
-
1
V
IH2
-
2.4
-
3.0
Input Voltage 2
( IN0, IN1, OSC1 )
V
IL2
-
0
-
0.6
V
IH3
-
2.4
-
3.0
Input Voltage 3
(
RESET, TST1,
TST2 )
V
IL3
-
0
-
0.6
V
4
FEDL64P168-01
Semiconductor
ML64P168
31/51
DC Characteristics (3.0



V Spec. ) ( Continued )
(V
SS
=0V, V
DD1
=1.5V, V
DD2
=V
DDI
=V
DD
=3.0V, V
DD3
=4.5V, Ta=0 to +65
C unless otherwise specified)
Parameter
Symbol
Condition
Min.
Typ.
Max.
Unit
Measuring
Circuit
V
T1
-
0.2
0.5
1.0
Hysteresis Width
( P0.0 to P0.3 )
( P2.0 to P2.3 )
( P3.0 to P3.3 )
( P4.0 to P4.3 )
V
T1S
V
DDI
=5.0V
0.25
1.00
1.50
Hysteresis Width
(
RESET, TST1,
TST2 )
V
T2
-
0.2
0.5
1.0
V
4
Input Pin
Capacitance
( P0.0 to P0.3 )
( P2.0 to P2.3 )
( P3.0 to P3.3 )
( P4.0 to P4.3 )
C
IN
-
-
-
5
pF
1
FEDL64P168-01
Semiconductor
ML64P168
32/51
Measuring circuit 1
V
SS
OSC1
R
OS
XT
XT
32.768kHz
Crystal
C
12
C1
C2
C
A
,C
B
,C
C
,C
12
R
OS
R
T0
C
S0
R
I0
:
:
:
:
:
0.1
F
60k
10k
/2k
820pF
10k
OSC2
R
T0
C
S0
R
I0
IN0
CS0
RT0
A
V
DDI
V
DD
V
DD2
V
V
DD3
V
C
A
C
B
V
DD1
V
C
C
Measuring circuit 2
V
DD
V
DD3
V
DD2
V
DD1
V
SS
V
IH
INPUT
*1
V
IL
A
*2
OUTPUT
V
DDI
FEDL64P168-01
Semiconductor
ML64P168
33/51
Measuring circuit 3
V
DD
V
DD3
V
DD2
V
SS
A
*3
INPUT
OUTPUT
V
DD1
V
DDI
Measuring circuit 4
V
DD
V
DD3
V
DD2
V
DD1
V
SS
V
IH
*3
V
IL
*1 Input logic circuit to determine the specified measuring conditions.
*2 Measured at the specified output pins.
*3 Measured at the specified input pins.
INPUT
OUTPUT
Waveform
Monitoring
V
DDI
FEDL64P168-01
Semiconductor
ML64P168
34/51
A/D Converter Characteristics (3.0 V Spec. )
( V
SS
=0V, V
DDI
=V
DD
=3.0V, Ta=0 to +65
C
unless otherwise specified
)
Parameter
Symbol
Condition
Min.
Typ.
Max.
Unit
Measur-
ing
Circuit
Resistor for
Oscillation
R
S0
,
R
S1
,
R
T0
,
R
T0-1
,
R
T1
C
S0
, C
T0
, C
S1
740pF
1
-
-
k
Input Current
Limiting Resistor
R
I0
,
R
I1
-
1
10
-
k
f
OSC1
Resistor for oscillation =2 k
200
239
277
kHz
f
OSC2
Resistor for oscillation =10 k
46.5
55.4
64.3
kHz
Oscillation
Frequency
f
OSC3
Resistor for oscillation =200 k
2.79
3.32
3.85
kHz
Kf1
R
T0
, R
T0-1
, R
T1
= 2 k
4.272
4.380
4.490
-
Kf2
R
T0
, R
T0-1
, R
T1
= 10 k
0.990
1.000
1.010
-
RS
RT Oscillation
Frequency Ratio(*)
Kf3
R
T0
, R
T0-1
, R
T1
= 200 k
0.0573
0.0616
0.0659
-
5
* Kfx is the ratio of the oscillation frequency by a sensor resistor to the oscillation frequency by a
reference resistor in the same condition.
f
OSCx
(RT0 - CS0 Oscillation)
f
OSCx
(RT0-1 - CS0 Oscillation)
f
OSCx
(RT1 - CS1 Oscillation)
Kfx=
f
OSCx
(RS0 - CS0 Oscillation)
,
f
OSCx
(RS0 - CS0 Oscillation)
,
f
OSCx
(RS1 - CS1 Oscillation)
(x=1, 2, 3)
FEDL64P168-01
Semiconductor
ML64P168
35/51
Measuring circuit 5
R
T1
(CROSC1)
R
S1
C
S1
R
I1
RT1 RS1 CS1 IN1
R
I0
C
S0
R
S0
IN0 CS0 RS0
C
T0
R
T0
RT0
CRT0
R
T0-1
(CROSC0)
P0.0
P0.1
P0.2
P0.3
Oscillation Mode Designation
RESET
TST1
TST2
V
SS
D.U.T
P4.3
Frequency
Measurement
(f
OSCX
)
R
T0
,R
T0-1
,R
T1
=2k
/10k
/200k
R
S0
,R
S1
=10k
R
I0
,R
I1
=10k
C
S0
,C
T0
,C
S1
=820pF
V
DD
V
DDI
FEDL64P168-01
Semiconductor
ML64P168
36/51
AC Characteristics ( 3.0V Spec. ) ( Serial Interface )
( V
SS
=0V, V
DD2
=V
DD
=3.0V, V
DDI
=5.0V , Ta=0 to +65
C
unless otherwise specified
)
Parameter
Symbol
Condition
Min.
Typ.
Max.
Unit
SCLK Input Fall Time
t
f
-
-
15
50
ns
SCLK Input Rise Time
t
r
-
-
15
50
ns
SCLK Input "L" Level Pulse Width
t
CWL
-
0.8
-
-
s
SCLK Input "H" Level Pulse Width
t
CWH
-
0.8
-
-
s
SCLK Input Cycle Time
t
CYC
-
2.0
-
-
s
SCLK Output Cycle Time
t
CYC1(O)
CPU is operating at
32.768kHz
-
30.5
-
s
SCLK Output Cycle Time
t
CYC2(O)
CPU is operating at 700kHz
-
1.43
-
s
SOUT Output Delay Time
t
DDR
-
-
-
0.4
s
SIN Input Setup Time
t
DS
-
0.5
-
-
s
SIN Input Hold Time
t
DH
-
0.8
-
-
s
Synchronous communication timing
 ( "H" level = 4.0V, "L" level = 1.0V )
t
r
t
f
t
CWH
t
CWL
t
DDR
t
DDR
t
CYC
t
DS
t
DS
t
DH
5V
5V
5V
SCLK
(P4.2)
SOUT
(P4.0)
SIN
(P3.3)
FEDL64P168-01
Semiconductor
ML64P168
37/51
RECOMMENDED OPERATING CONDITIONS
( When Voltage Regulator for LCD Driver Used )
(V
SS
= 0V)
Parameter
Symbol
Condition
Rating
Unit
Operating Temperature
T
op
-
0 to + 65
C
Operating Voltage
V
DD
-
2.7 to 3.5
V
Crystal oscillation frequency
f
XT
-
30 to 66
kHz
ELECTRICAL CHARACTERISTICS
( When Voltage Regulator for LCD Driver Used )
DC Characteristics
(V
SS
=0V, V
DD
=3.0V, Ta=0 to +65
C unless otherwise specified )
Parameter
Symbol
Condition
Min.
Typ.
Max.
Unit
Measur-
ing
Circuit
V
DD1
V
DD
=2.7 to 3.5, Ta=25
C
1.00
1.2
1.4
V
V
DD1
Voltage
V
DD1
-
-
-4
-
mV/
C
V
DD2
Voltage
V
DD2
V
DD
=2.7 to 3.5
Typ. - 0.1
2
V
DD1
Typ. + 0.1
V
DD3
Voltage
V
DD3
V
DD
=2.7 to 3.5
Typ. - 0.2
3
V
DD1
Typ. + 0.2
V
V
DD
=1.5V , CPU in halt state
-
2
5
Supply Current 1
I
DD1
V
DD
=3.0V, CPU in halt state
-
7
12
V
DD
=1.5V, CPU in operating state
-
15
30
Supply Current 2
I
DD2
V
DD
=3.0V, CPU in operating state
-
35
50
A
1
Notes:
The other electrical characteristics are the same as those for the 1.5V and 3.0V specifications.
FEDL64P168-01
Semiconductor
ML64P168
38/51
Power Supply Circuit
V
DD
C1
C2
V
DD3
V
DD2
V
DD1
V
SS
ML64P168
1.5V
C
S
C
12
C
C
C
B
ML64P168 1.5V Version
V
DDI
C
I
2.7 to 5V
V
DD
C1
C2
V
DD3
V
DD2
V
DD1
V
SS
ML64P168
3.0V
C
S
C
12
C
C
ML64P168 3.0V Version
C
A
V
DDI
C
I
V
DD
C1
C2
V
DD3
V
DD2
V
DD1
V
SS
ML64P168
1.5V
C
S
C
12
C
C
ML64P168 1.5V Version (The LCD bias is regulated.)
C
B
V
DDI
C
I
2.7 to 5V
C
A
V
DD
C1
C2
V
DD3
V
DD2
V
DD1
V
SS
ML64P168
3.0V
C
S
C
12
C
C
ML64P168 3.0V Version (The LCD bias is regulated.)
C
B
Note:C
A
,C
B
,C
C
,C
S
,C
I
,C
12
:0.1
F
+100%
-50%
V
DDI
C
I
C
A
FEDL64P168-01
Semiconductor
ML64P168
39/51
PROM MODE
ABSOLUTE MAXIMUM RATINGS
(V
SS
= 0V)
Parameter
Symbol
Condition
Rating
Unit
PROM power supply voltage
V
CC
V
CC
=V
DD
, Ta=25
C
-0.3 to + 6.7
V
Program voltage
V
PP
Ta = 25C
-0.3 to + 14.0
V
PROM input voltage
V
I
V
CC
system input, Ta=25
C
-0.3 to V
CC
+ 0.3
V
PROM output voltage
V
O
V
CC
system output, Ta=25
C
-0.3 to V
CC
+ 0.3
V
Storage temperature
T
STG
-
-55 to + 150
C
RECOMMENDED OPERATING CONDITIONS
(V
SS
= 0V)
Parameter
Symbol
Condition
Rating
Unit
Operating Temperature
T
op
-
0 to + 65
C
V
CC
power supply voltage
V
CC
V
CC
=V
DD
=V
DDI
4.75 to 5.25
V
In read
4.75 to 5.25
V
V
PP
power supply voltage
V
PP
In write
12.0 to 13.0
V
V
IH
V
CC
=V
DD
=V
DDI
4 to V
CC
V
Input voltage
V
IL
-
0 to 1
V
FEDL64P168-01
Semiconductor
ML64P168
40/51
READ OPERATION ( PROM MODE )
DC Characteristics
(V
DD
=V
PP
=5.0V
5%, Ta=25
5
C unless otherwise specified )
Parameter
Symbol
Condition
Min.
Typ.
Max.
Unit
V
CC
power supply current
(standby)
I
CC1
V
CC
= V
DD
CE=V
IH
-
-
35
mA
V
CC
power supply current
(operation)
I
CC2
V
CC
= V
DD
CE=V
IL
-
-
100
mA
V
IH
V
CC
= V
DD
4
-
V
CC
V
Input voltage
V
IL
-
0
-
1
V
I
OH
V
CC
= V
DD
V
OH
= V
CC
- 0.5V
-2.0
-0.7
-0.2
mA
Output voltage
I
OL
V
OL
= 0.5V
0.2
0.7
2.0
mA
AC Characteristics
(V
CC
=5.0V
5%, V
PP
=V
CC
, Ta=0 to 65
C
unless otherwise specified
)
Parameter
Symbol
Condition
Min.
Typ.
Max.
Unit
Address access time
t
ACC
OE=CE=V
IL
-
-
120
ns
CE access time
t
CE
OE=V
IL
-
-
120
ns
OE access time
t
OE
CE=V
IL
-
-
50
ns
Output disable time
t
DF
CE=V
IL
0
-
40
ns
Measurement conditions: Input pulse level
0.45 to 4.55V
Input rise / fall time
5ns
Timing judgement level
Input 0.8V, 2V / Output 0.8V , 2V
Timing chart
tCE
Address Input
CE
OE
tOE
tDF
tACC
Data output
FEDL64P168-01
Semiconductor
ML64P168
41/51
WRITE OPERATION ( PROM MODE )
DC Characteristics
( V
SS
=0V, V
DD
=5.0V
5%, V
PP
=12.5V
5V, Ta=25
5
C unless otherwise specified )
Parameter
Symbol
Condition
Min.
Typ.
Max.
Unit
V
PP
power supply current
I
PP
CE=V
IL
-
-
50
mA
V
CC
power supply current
I
CC
V
CC
= V
DD
-
-
100
mA
V
IH
V
CC
= V
DD
4
-
V
CC
V
Input voltage
V
IL
-
0
-
1
V
I
OH
V
CC
= V
DD
V
OH
= V
CC
- 0.5V
-2.0
-0.7
-0.2
mA
Output voltage
I
OL
V
OL
= 0.5V
0.2
0.7
2.0
mA
AC Characteristics
( V
SS
=0V, V
DD
=5.0V
5%, V
PP
=12.5
5V, Ta=25
5
C
unless otherwise specified
)
Parameter
Symbol
Condition
Min.
Typ.
Max.
Unit
Address set-up time
t
AS
-
2
-
-
s
OE set-up time
t
OES
-
2
-
-
s
Data set-up time
t
DS
-
2
-
-
s
Address hold time
t
AH
-
0
-
-
s
Data hold time
t
DH
-
2
-
-
s
OE output floating delay time
t
DEP
-
0
-
130
ns
VPP power supply set-up time
t
VS
-
2
-
-
s
Initial program pulse width
t
PW
V
DD
=V
DDI
6V
0.25V
0.95
1.0
1.05
ms
Additional program pulse width
t
OPW
V
DD1
=V
DD2
6V
0.25V
2.85
-
78.75
ms
OE output effective delay time
t
OE
-
-
-
150
ns
Measurement conditions: Input pulse level
0.45 to 4.55V
Input rise / fall time
Less than 20ns
Timing judgement level
Input 0.8V, 2V / Output 0.8V , 2V
FEDL64P168-01
Semiconductor
ML64P168
42/51
Program timing chart
Data Output
t
AS
Address Input
CE
Data Input/Output
Data Input
t
DS
t
DH
t
VS
t
PW
t
OPW
t
AH
t
DEP
t
OE
t
OES
OE
V
PP
Address N
FEDL64P168-01
Semiconductor
ML64P168
43/51
FUNCTIONAL DESCRIPTION
CPU Peripheral Function
A/D converter ( ADC )
The ML64P168 has a built-in two-channel RC oscillation A/D converter. The A/D converter is
composed of a two-cannel oscillation circuit, Counter A ( CNTA0-4, a 4.8-digit decade counter ),
Counter B ( CNTB0-3, a 14-bit binary counter ), and A/D Converter Control Registers 0 and 1
( ADCON0, ADCON1 ).
By counting oscillation frequencies that vary depending on a resistor or capacitor connected to the
RC oscillation circuit, the A/D converter converts resistance values or capacitance values to
corresponding digital values. By using a thermistor or humidity sensor as a resistance, a
thermometer or a hygrometer can be constructed. By applying a separate sensor to each cannel of
the 2-channel RC oscillation circuit, it is also possible to extend measure ranges or measure at two
places.
Serial port ( SIOP )
The ML64P168 has an 8-bit synchronous serial port. Receive/transmit operation of the serial port is
performed simultaneously and the serial transfer clock can select either internal or external mode.
Direction of transfer data can be big endian or little endian. Each pin of the serial port is assigned as
secondary functions of P3.3 and P4.0 to P4.2. Setting each bit of SIN,SOUT, SPR and SCLK of
P33CON and P40CON to P42CON to "1" makes each pin valid.
LCD driver ( LCD )
The ML64P168 has a built-in LCD driver for 34 outputs.
The LCD driver consists of 31
4-bit display registers ( DSPR0-30 ), the Display Control Register
( DSPCON ), a 34-output LCD driver circuit, and a bias generation circuit ( BIAS ).
The bias generation circuit for LCD driver ( BIAS ) generates bias voltages for the LCD driver by
rising or dropping the power supply voltage by externally installing capacitors. Alternatively, it
generates bias voltages by rising the constant voltage ( V
DD1
= 1.2V ) generated by the voltage
regulator for LCD driver. Which way is to be used is specified by mask option.
There are three types of driving methods: 1/4duty, 1/3duty and 1/2duty. Software selects the duty
mode.
A mask option can select either a common driver or a segment driver for each LCD driver pin. A
mask option can also specify assignment of each bit of the display register to each segment. All the
display registers must be selected by a mask option.
L26 to L33 of the LCD driver can be configured to be output ports by a mask option.
The relationship between the duty, the bias method, and the maximum segment number follows:
1/4duty, 1/3 bias method
----------- 120 segments
1/3duty, 1/3 bias method
-----------
93 segments
1/2duty, 1/2 bias method
-----------
64 segments
Buzzer driver ( BD )
The ML64P168 has a built-in buzzer driver with 15 buzzer output frequencies and 4 buzzer output
modes. Each buzzer output is selected by the Buzzer Control Register ( BDCON ) and the Buzzer
Frequency Control Register ( BFCON ).
FEDL64P168-01
Semiconductor
ML64P168
44/51
Capture circuit ( CAPR )
The ML64P168 captures 32Hz to 256Hz output of the time base counter at the falling of Port 0.0 or
Port 0.1 ( P0.0 or P0.1 ) to "L" level when the pull-up resistor input is chosen, or at the rising to "H"
level when the pull-down resistor input is chosen. The capture circuit is composed of the Capture
Control Register ( CAPCON ) and the Capture Registers ( CAPR0, CAPR1 ) that fetch output from
the time base counter.
Watchdog timer ( WDT )
The ML64P168 has a built-in watchdog timer to detect CPU malfunction. The watchdog timer is
composed of a 6-bit watchdog timer counter ( WDTC ) to count a 16Hz output and a watchdog
timer control register ( WDTCON ) to reset WDTC.
Clock generation circuit ( 2CLK )
The clock generation circuit ( 2CLK ) in the ML64P168 contains a 32.768kHz crystal oscillation
circuit, a 700kHz RC oscillation circuit, and a clock control port. This circuit generates the system
clock ( CLK ) and the time base clock ( 32.768kHz ).
The system clock drives the CPU while the time base clock drives the time base counter and the
buzzer driver.
Via the contents of the Frequency Control Register ( FCON ), the system clock can be switched
between 32.768kHz ( the output of the crystal oscillation circuit ) and 700kHz ( the output of the RC
oscillation circuit ).
Note: The oscillation frequency of the RC oscillation circuit varies depending on the value of an
external resistor ( R
OS
), operating power supply voltage ( V
DD
), and ambient temperatures
(Ta).
Time base counter ( TBC )
The ML64P168 has a built-in time base counter ( TBC ) that generates clocks to be supplied to
internal peripheral circuit. The time base counter is composed of 15 binary counters, and a 1/10
frequency dividing circuit. The count clock of the time base is driven by the oscillation clock
( 32.768kHz ) of the crystal oscillation circuit. The output of the time base counter is used for the
buzzer driver, the system reset circuit, the watchdog timer, the time base interrupt, the sampling
clocks of each port, and the capture circuit.
I/O port
Input-output ports ( P2, P3, P4 )
: 3 ports
4bits
Pull-up ( pull-down ) resistor input or high-impedance input, CMOS output or NMOS open
drain output: these can be specified for each bit; external 0 interrupt
Input port ( P0 )
: 1 port
4bits
Pull-up ( pull-down ) resistor input or high-impedance input; external 1 interrupt
Output port ( P1 )
: 1 port
4bits
CMOS output or NMOS open drain output
FEDL64P168-01
Semiconductor
ML64P168
45/51
Interrupt ( INTC )
The ML64P168 has 10 interrupt sources ( 10 vector address ), of which two are external interrupts
from ports and eight are internal interrupts.
Of the ten interrupt sources, only the watchdog timer interrupt cannot be disabled ( non-maskable
interrupt ). The other nine interrupts are controlled by the master interrupt enable flag ( MI ) and the
interrupt enable registers ( IE0, IE1, and IE2 ). When an interrupt condition is met, the CPU
branches to a vector address corresponding to the interrupt source.
Battery check circuit ( BC )
The battery check circuit ( BC ) detects the level of the supply voltage by comparing the voltage
generated by an external supply-voltage dividing resistor ( R
BLD
) with the internal reference voltage
( V
rb
).
FEDL64P168-01
Semiconductor
ML64P168
46/51
APPLICATION CIRCUITS (1.5



V Spec. )
Switch matrix ( 4 x 4 )
32.768 kHz
R
OS
C
I
5V
C
S
1.5V
C
C
C
12
C
B
RI0
CS0
RS0
RT0
RI1
CS1
RS1
RT1
Buzzer
C
GEX
- 5V Interface
- Temperature measurement by two
thermistors
- Battery check circuit is used.
- C
GEX
of crystal oscillator : External
V
DDI
V
DD
C2
C1
V
DD3
V
DD2
V
SS
V
DD1
V
PP
TST2
TST1
LCD
OSC2
OSC1
XT
XT
RESET
P1.0
P1.1
P1.2
P1.3
P0.0
P0.1
P0.2
P0.3
L33
L
0
ML 64P168-xxxGA/GP
ML 64P168-xxx
(1.5V Spec.)
P3.3
P4.0
P4.1
P4.2
P4.3
BD
RT1
RS1
CS1
IN1
RT0
CRT0
RS0
CS0
IN0
P3.1
R
BLD
1.5V Spec. Application Circuit ( Voltage Regulator for LCD Driver not Used )
FEDL64P168-01
Semiconductor
ML64P168
47/51
APPLICATION CIRCUITS (1.5



V Spec. ) ( continued )
Switch matrix ( 4 x 4 )
32.768 kHz
R
OS
C
I
5V
C
S
1.5V
C
C
C
12
C
B
RI0
CS0
RS0
RT0
RI1
CS1
RS1
RT1
Buzzer
C
GEX
- 5V Interface
- Temperature measurement by two
thermistors
- Battery check circuit is used.
- C
GEX
of crystal oscillator : External
V
DDI
V
DD
C2
C1
V
DD3
V
DD2
V
SS
V
DD1
V
PP
TST2
TST1
LCD
OSC2
OSC1
XT
XT
RESET
P1.0
P1.1
P1.2
P1.3
P0.0
P0.1
P0.2
P0.3
L33
L
0
ML 64P168-xxxGA/GP
(1.5V Spec.)
P3.3
P4.0
P4.1
P4.2
P4.3
BD
RT1
RS1
CS1
IN1
RT0
CRT0
RS0
CS0
IN0
P3.1
R
BLD
C
A
1.5V Spec. Application Circuit ( Voltage Regulator for LCD Driver Used )
FEDL64P168-01
Semiconductor
ML64P168
48/51
APPLICATION CIRCUITS (3.0



V Spec. )
Switch matrix ( 4 x 4 )
32.768 kHz
R
OS
C
I
5V
C
S
3V
C
C
C
12
C
A
RI0
CS0
RS0
RT0
RI1
CS1
RS1
RT1
OSC monitor
SCLK
SPR
SOUT
SIN
To the serial communication interface
( 5V ( V
DDI
) system )
Buzzer
C
GEX
- 5V Interface
- Temperature measurement by two
thermistors
- Battery check circuit is used.
- C
GEX
of crystal oscillator : External
V
DDI
V
DD
C2
C1
V
DD3
V
DD2
V
SS
V
DD1
V
PP
TST2
TST1
LCD
OSC2
OSC1
XT
XT
RESET
P1.0
P1.1
P1.2
P1.3
P0.0
P0.1
P0.2
P0.3
L33
L
0
ML 64P168-xxxGA/GP
(3.0V Spec.)
P3.3
P4.0
P4.1
P4.2
P4.3
BD
RT1
RS1
CS1
IN1
RT0
CRT0
RS0
CS0
IN0
P3.1
R
BLD
3.0V Spec. Application Circuit ( Voltage Regulator for LCD Driver not Used )
FEDL64P168-01
Semiconductor
ML64P168
49/51
APPLICATION CIRCUITS (3.0



V Spec. ) ( continued )
Switch matrix ( 4 x 4 )
32.768 kHz
R
OS
C
I
5V
C
S
3V
C
C
C
12
C
A
RI0
CS0
RS0
RT0
RI1
CS1
RS1
RT1
OSC monitor
SCLK
SPR
SOUT
SIN
To the serial communication interface
( 5V ( V
DDI
) system )
Buzzer
C
GEX
- 5V Interface
- Temperature measurement by two
thermistors
- Battery check circuit is used.
- C
GEX
of crystal oscillator : External
V
DDI
V
DD
C2
C1
V
DD3
V
DD2
V
SS
V
DD1
V
PP
TST2
TST1
LCD
OSC2
OSC1
XT
XT
RESET
P1.0
P1.1
P1.2
P1.3
P0.0
P0.1
P0.2
P0.3
L33
L
0
ML 64P168-xxxGA/GP
(3.0V Spec.)
P3.3
P4.0
P4.1
P4.2
P4.3
BD
RT1
RS1
CS1
IN1
RT0
CRT0
RS0
CS0
IN0
P3.1
R
BLD
C
B
3.0V Spec. Application Circuit ( Voltage Regulator for LCD Driver Used )
FEDL64P168-01
Semiconductor
ML64P168
50/51
PACKAGE DIMENSIONS
ML64P168-
XXX
GP
Figure C-1 80-Pin QFP:GP Package Dimension Diagram
Notes for Mounting the Surface Mount Type Package
The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which are
very susceptible to heat in reflow mounting and humidity absorbed in storage.
Therefore, before you perform reflow mounting, contact Oki's responsible sales person for the product
name, package name, pin number, package code and desired mounting conditions (reflow method,
temperature and times).
0.05~0.35
2.5TYP.
1.380.15
1.3TYP.
2.10.2
2.5MAX.
0~10
0.25
24
1
25
80
20.00.2
25.00.2
0.8TYP.
0.8
0.32
0.16 M
INDEX MARK
64
65
40
41
14.0

0.2
19.0

0.2
1.0TYP.
-0.07
+0.08
0.170.05
0.12
SEATING PLANE
FEDL64P168-01
Semiconductor
ML64P168
51/51
PACKAGE DIMENSIONS
ML64P168-
XXX
GA
Figure C-2 80-Pin QFP:GA Package Dimension Diagram
Notes for Mounting the Surface Mount Type Package
The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which are
very susceptible to heat in reflow mounting and humidity absorbed in storage.
Therefore, before you perform reflow mounting, contact Oki's responsible sales person for the product
name, package name, pin number, package code and desired mounting conditions (reflow method,
temperature and times).
0.10
SEATING PLANE
0.170.05
2.10.2
2.4MAX.
0~0.25
0~10
0.25
0.670.15
0.6TYP.
1.40.2
20
1
21
80
0.83TYP.
0.65
INDEX MARK
60
61
40
41
14.0
0.1
16.8
0.2
0.83TYP.
0.32
0.13 M
-0.07
+0.08