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Printed in Japan

E2Y0002-29-11

Table of Contents

1. FEATURES ........................................................................................................... 2
2. BLOCK DIAGRAM ............................................................................................... 2
3. PIN SPECIFICATIONS ........................................................................................ 3

3.1 Host Interface (PCMCIA) .................................................................................... 3
3.2 NAND Flash Memory Interface .......................................................................... 4
3.3 External SRAM Interface .................................................................................... 5
3.4 Extended Bus Interface ...................................................................................... 5
3.5 Other Interfaces .................................................................................................. 5
3.6 Power Supply ....................................................................................................... 6
3.7 Pin Totals ............................................................................................................. 6
3.8 Pin Configuration ................................................................................................ 7

4. FUNCTIONS ........................................................................................................ 8
5. SECTOR FORMATTER AND SEQUENCER ....................................................... 9

5.1 Data Formats ....................................................................................................... 9

5.1.1 Data Format Within Sector ........................................................................ 9
5.1.2 Data Format Within Port .......................................................................... 10
5.1.3 Substitute Management Information Format ........................................... 11

5.2 Write Sector Commands .................................................................................. 12

5.2.1 Dual Port Control ..................................................................................... 12
5.2.2 Block Control ........................................................................................... 12

5.3 Substitute Processing (Defect Management) ................................................. 13

5.3.1 Substitute Management Information Format Processing ........................ 13
5.3.1.1 Sector Management .............................................................................. 13
5.3.1.2 Substitute Management Information Management ............................... 14

5.4 Generation of Substitute Management Information ...................................... 14
5.5 Substitute Processing ....................................................................................... 15
5.6 Substitute Destination Detection Processing ................................................ 16

6. ATA REGISTERS ............................................................................................... 17

6.1 Memory Mapped Configuration ....................................................................... 17
6.2 I/O Mapped 16 Contiguous Registers Configuration .................................... 18
6.3 Primary I/O Mapped Configuration ................................................................. 18
6.4 Secondary I/O Mapped Configuration ............................................................ 19
6.5 True IDE Mapped Configuration ...................................................................... 19
6.6 ATA Registers .................................................................................................... 20

6.6.1 Data Register (Write/Read) ...................................................................... 20
6.6.2 Error Register (Read Only) ....................................................................... 20
6.6.3 Feature Register (Write Only) ................................................................... 20
6.6.4 Sector Count Register (Write/Read) ........................................................ 20
6.6.5 Sector Number Register (Write/Read) ..................................................... 21
6.6.6 Cylinder Low Register (Write/Read) ......................................................... 21
6.6.7 Cylinder High Register (Write/Read) ........................................................ 21
6.6.8 Drive Head Register (Write/Read) ............................................................ 21
6.6.9 Status Register & Alternate Status Register (Read Only) ........................ 22
6.6.10 Device Control Register (Write Only) ....................................................... 22
6.6.11 Command Register (Write Only) .............................................................. 22

7. PCMCIA INTERFACE ........................................................................................ 23

7.1 ATA Commands (Standard) .............................................................................. 23
7.2 Commands for CompactFlash ......................................................................... 24
7.3 Vendor-Unique Commands .............................................................................. 24
7.4 Card Information Structure .............................................................................. 24
7.5 Identify Information ........................................................................................... 24
7.6 Number of Installed Memory Chips and CHS Structure ................................ 25
7.7 Modes ................................................................................................................. 27

7.7.1 Memory Mapped ..................................................................................... 27
7.7.2 I/O Mapped 16 Contiguous Registers ..................................................... 27
7.7.3 Primary I/O Mapped ................................................................................ 27
7.7.4 Secondary I/O Mapped ........................................................................... 27
7.7.5 True IDE ................................................................................................... 27

8. CHIP MODES .................................................................................................... 28

8.1 Types .................................................................................................................. 28
8.2 Settings .............................................................................................................. 28
8.3 Pin Assignment .................................................................................................. 28

9. ELECTRICAL CHARACTERISTICS .................................................................. 29

9.1 Absolute Maximum Ratings ............................................................................. 29
9.2 Recommended Operating Conditions ............................................................. 29
9.3 DC Characteristics ............................................................................................ 29

10. BUS SPECIFICATIONS ..................................................................................... 30

10.1 I/O Mode ........................................................................................................... 30
10.2 Bus Timing Specifications ............................................................................... 30
10.3 Power ON/OFF, Reset, Busy Timing .............................................................. 30

11. PACKAGE DIMENSIONS .................................................................................. 31
12. APPLICATION EXAMPLES ............................................................................... 32

Электронный компонент: ML54051

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