NTE1690
Integrated Circuit
Telephone DTMF Dialer
Description:
The NTE1690 is a low threshold voltage, fieldimplanted, metal gate CMOS integrated circuit in a
16Lead DIP type package. This device interfaces directly to a standard telephone keypad and gen-
erates all dual tone multifrequency pairs required in tone dialing systems. The tone synthesizers
are locked to an onchip reference oscillator using an inexpensive 3.579545MHz crystal for high tone
accuracy. The crystal and an output load resistor are the only external components required for tone
generation. A MUTE OUT logic signal, which changes state when any key is depressed is also pro-
vided.
Features:
D
3V to 10V Operation When Generating Tones
D
2V Operation of Keyscan and MUTE Logic
D
Static Sensing of Key Closures or Logic Inputs
D
OnChip 3.579545MHz CrystalControlled Oscillator
D
Output Amplitudes Proportional to Supply Voltage
D
High Group PreEmphasis
D
Low Harmonic Distortion
D
Open EmitterFollower LowImpedance Output
D
SINGLE TONE INHIBIT Pin
Absolute Maximum Ratings:
Supply Voltage (V
DD
V
SS
)
15V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum Voltage at Any Pin
V
DD
+0.3V to V
SS
0.3V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power Dissipation, P
D
500mW
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating Temperature Range, T
opr
30
to +60
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage Temperature Range, T
stg
55
to +150
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Electrical Characteristics: (30
C
<
T
A
<
+60
C, 3V < V
DD
< 10V unless otherwise specified)
Parameter
Test Conditions
Min
Typ
Max
Unit
Minimum Supply Voltage for Keysense and
MUTE Logic Functions
2
V
Operating Current, Idle
R
L
= 10k
20
A
Operating Current, Generating Tones
V
O
= 5V
2
mA
Electrical Characteristics (Cont'd): (30
C
<
T
A
<
+60
C, 3V < V
DD
< 10V unless othewise specified)
Parameter
Test Conditions
Min
Typ
Max
Unit
Input Resistors
COLUMN and ROW (PullUp)
40
k
SINGLE TONE INHIBIT (PullDown)
50
k
TONE DISABLE (PullUp)
50
k
MUTE OUT Sink Current (COLUMN and ROW Active)
V
DD
= 3V, V
O
= 0.5V
0.5
mA
Output Amplitudes, Low Group
R
L
= 240
, V
DD
= 3V
250
mV
rms
R
L
= 240
, V
DD
= 10V
850
mV
rms
Output Amplitudes, High Group
R
L
= 240
, V
DD
= 3V
315
mV
rms
R
L
= 240
, V
DD
= 10V
1000
mV
rms
Mean Output DC Offset
V
DD
= 3V
1.2
V
V
DD
= 10V
4.2
V
High Group PreEmphasis
2.4
2.7
3.0
dB
Dual Tone/Harmonic Distortion Ratio
1MHz Bandwidth
22
dB
StartUp Time (90% Amplitude)
3
5
ms
Note 1. Crystal Specification: Parallel Resonant 3.579545MHz, R
S
150
, L = 100mH, C
0
= 5pF,
C
1
= 0.02pf.
Pin Descriptions:
V
DD
(Pin1): This is the positive voltage supply to the device, referenced to V
SS
. The collector of the
TONE OUT transistor is connected to this pin.
V
SS
(Pin6): This is the negative voltage supply.
OSCILLATOR (Pin7 and Pin8): All tone generation timing is derived from the onchip oscillator cir-
cuit. A lowcost 3.579545MHz Acut crystal (NTSC TV colorburst) is needed between Pin7 and
Pin8. Load capacitors and feedback resistor are included onchip for good startup and stability.
The oscillator stops when column inputs are sensed with no valid input having been detected. The
oscillator is also stopped when the TONE DISABLE input is pulled to logic low.
Row and Column Inputs (Pins 3, 4, 5, 9, 11, 12, 13, 14): When no key is pushed, pullup resistors
are active on row and column inputs. A key closure is recognized when a single row and a single
column are connected to V
SS
, which starts the oscillator and initiates tone generation. Negativetrue
logic signals simulating key closures can also be used.
TONE DISABLE Input (Pin2): The TONE DISABLE input has an internal pullup resistor. When this
input is open or at logic high, the normal tone output mode will occur. When TONE DISABLE input
is at logic low, the device will be in the inactive mode, TONE OUTPUT will be at an open circuit state.
MUTE Output (Pin10): The MUTE output is an opendrain Nchannel device that sinks current to
V
SS
with any key input and is open when no key input is sensed. The MUTE output will switch regard-
less o the state of he SINGLE TONE INHIBIT input.
SINGLE TONE INHIBIT Input (Pin15): The SINGLE TONE INHIBIT input is used to inhibit the gener-
ation of other than valid tone pairs due to multiple rowcolumn closures. It has a pulldown resistor
to V
SS
, and when left open or tied to V
SS
any input condition that would normally result in a single tone
will now result in no tone, with all other functions operating normally. When tied to V
DD
, single or dual
tones may be generated (See Table II).
TONE OUT (Pin16): This output is the open emitter of an NPN transistor, the collector of which is
connected to V
DD
. When an external load resistor is connected from TONE OUT to V
SS
, the output
voltage on this pin is the sum of the high and low group sinewaves superimposed on a DC offset.
When not generating tones, this output transistor is turned OFF to minimize the device idle current.
Pin Descriptions (Cont'd):
Adjustment of the emitter load resistor results in variation of the mean DC current during tone genera-
tion, the sinewave signal current through the output transistor, and the output distortion. Increasing
values of load resistances decreases both the signal current and distortion.
Functional Description:
With no key inputs to the device the oscillator is inhibited, the output transistor is pulled OFF and de-
vice current consumption is reduced to a minimum. Key closures are sensed statically to ensure no
modification of the line when tones are not being generated. Any key closure activates the MUTE
output, starts the oscillator and sets the high group and low group programmable counters to the ap-
propriate divide ratio. These counters sequence two ratioedcapacitor D/A converters through a se-
ries of 28 equal duration steps per sinewave cycle. The two tones are summed by a mixer amplifier,
with preemphasis applied to the high group tone. The output is an NPN emitterfollower requiring
the addition of an external load resistor to V
SS
. This resistor facilitates adjustment of the signal current
flowing from V
DD
through the output transistors.
The amplitude of the output tones is directly proportional to the device supply voltage.
Table I. Output Frequency Accuracy
Tone
Group
Valid
Input
Standard
DTMF (Hz)
Tone Output
Frequency
% Deviation
from Standard
Low
R1
697
694.8
0.32
Group
f
R2
770
770.1
+0.02
f
L
R3
852
852.4
+0.03
R4
941
940.0
0.11
High
C1
1209
1206.0
0.24
Group
f
C2
1336
1331.7
0.32
f
H
C3
1477
1486.5
+0.64
C4
16334
1639.0
+0.37
Table II. Functional Truth Table
SINGLE TONE
TONE
Tones
SINGLE TONE
INHIBIT
TONE
DISABLE
ROW
COLUMN
Low
High
MUTE
X
O
X
X
0V
0V
0
X
X
O/C
O/C
0V
0V
0
X
1
One
One
f
L
f
H
1
1
1
2 or More
One
f
H
1
1
1
One
2 or More
f
L
1
1
1
2 or More
2 or More
V
OS
V
OS
1
0
1
2 or More
One
V
OS
V
OS
1
0
1
One
2 or More
V
OS
V
OS
1
0
1
2 or More
2 or More
V
OS
V
OS
1
Note 2. X is don't care state.
Note 3. V
OS
is the output offset voltage.
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