TL H 10550
OP-07
Low
Offset
Low
Drift
Operational
Amplifier
December 1994
OP-07 Low Offset Low Drift Operational Amplifier
General Description
The OP-07 has very low input offset voltage which is ob-
tained by trimming at the wafer stage These low offset volt-
ages generally eliminate any need for external nulling The
OP-07 also features low input bias current and high open-
loop gain The low offsets and high open-loop gain make
the OP-07 particularly useful for high-gain applications
The wide input voltage range of
g
13V minimum combined
with high CMRR of 110 dB and high input impedance pro-
vide high accuracy in the non-inverting circuit configuration
Excellent linearity and gain accuracy can be maintained
even at high closed-loop gains
Stability of offsets and gain with time or variation in temper-
ature is excellent
The OP-07 is available in TO-99 metal can ceramic or
molded DIP
For improved specifications see the LM607
Features
Y
Low V
OS
75 mV Max
Y
Low V
OS
Drift
0 6 mV C Max
Y
Ultra-Stable vs Time
1 0 mV Month Max
Y
Low Noise
0 6 mVp-p Max
Y
Wide Input Voltage Range
g
14V
Y
Wide Supply Voltage Range
g
3V to
g
18V
Y
Fits 725 108A 308A 741 AD510 Sockets
Y
Replaces the mA714
Applications
Y
Strain Gauge Amplifiers
Y
Thermocouple Amplifiers
Y
Precision Reference Buffer
Y
Analog Computing Functions
Connection Diagram
Dual-In-Line Package
TL H 10550 1
See NS Package Number N08E
Ordering Information
T
A
e
25 C
N08E
Operating
V
OS
Max
Plastic
Temperature
(mV)
Range
75
OP07EP
COM
150
OP07CP
COM
150
OP07DP
COM
Also available per SMD
8203602
C1995 National Semiconductor Corporation
RRD-B30M115 Printed in U S A
Absolute Maximum Ratings
If Military Aerospace specified devices are required
please contact the National Semiconductor Sales
Office Distributors for availability and specifications
Supply Voltage
g
22V
Internal Power Dissipation (Note 5)
500 mW
Differential Input Voltage
g
30V
Input Voltage (Note 6)
g
22V
Output Short-Circuit Duration
Continuous
Storage Temperature Range
b
65 C to
a
150 C
Lead Temperature (Soldering 60 sec )
260 C
Junction Temperature
b
65 C to
a
150 C
Operating Temperature Range
OP-07E OP-07C OP-07D
0 C to
a
70 C
Simplified Schematic
TL H 10550 3
R2A and R2B are electronically trimmed on chip at the factory for minimum offset voltage
2
Electrical Characteristics
Unless otherwise specified V
S
e
g
15V T
A
e
25 C Boldface type refers to limits over 0 C
s
T
A
s
70 C
Symbol
Parameter
Conditions
OP-07E
OP-07C
Units
Min
Typ
Max
Min
Typ
Max
V
OS
Input Offset Voltage
(Note 1)
30
75
60
150
m
V
45
130
85
250
V
OS t
Long-Term V
OS
(Note 2)
0 3
1 5
0 4
2 0
m
V Mo
Stability
I
OS
Input Offset Current
0 5
3 8
0 8
6 0
nA
0 9
5 3
1 6
8 0
I
B
Input Bias Current
g
1 2
g
4 0
g
1 8
g
7 0
nA
g
1 5
g
5 5
g
2 2
g
9 0
e
np-p
Input Noise Voltage
0 1 Hz to 10 Hz (Note 3)
0 35
0 6
0 38
0 65
m
V
p-p
e
n
Input Noise Voltage
f
O
e
10 Hz
10 3
18 0
10 5
20 0
Density
f
O
e
100 Hz (Note 3)
10 0
13 0
10 2
13 5
nV
0
Hz
f
O
e
1000 Hz
9 6
11 0
9 8
11 5
i
np-p
Input Noise Current
0 1 Hz to 10 Hz (Note 3)
14
30
15
35
pA
p-p
i
n
Input Noise Current
f
O
e
10 Hz
0 32
0 80
0 35
0 90
Density
f
O
e
100 Hz (Note 3)
0 14
0 23
0 15
0 27
pA
0
Hz
f
O
e
1000 Hz
0 12
0 17
0 13
0 18
R
IN
Input Resistance
(Note 4)
15
50
8
33
MX
Differential-Mode
R
INCM
Input Resistance
160
120
GX
Common-Mode
IVR
Input Voltage Range
g
13 0
g
14 0
g
13
g
14
V
CMRR
Common-Mode
V
CM
e
g
13V
106
123
100
120
dB
Rejection Ratio
103
123
97
120
PSRR
Power Supply
V
S
e
g
3V to
g
18V
5
20
7
32
m
V V
Rejection Ratio
V
S
e
g
3V to
g
18V
7
32
10
51
A
VO
Large Signal
R
L
t
2 kX V
O
e
g
10V
200
500
120
400
Voltage Gain
R
L
t
2 kX
180
450
100
400
V mV
R
L
t
500X V
O
e
g
0 5V
150
400
100
400
V
S
e
g
3V (Note 4)
V
O
Output Voltage Swing
R
L
t
10 kX
g
12 5
g
13 0
g
12 0
g
13 0
R
L
t
2 kX
g
12 0
g
12 8
g
11 5
g
12 8
V
R
L
t
2 kX
g
12 0
g
12 6
g
11 0
g
12 6
R
L
t
1 kX
g
10 5
g
12 0
g
12 0
SR
Slew Rate
R
L
t
2 kX (Note 3)
0 1
0 3
0 1
0 3
V ms
BW
Closed-Loop Bandwidth
A
VCL
e a
1 (Note 3)
0 4
0 6
0 4
0 6
MHz
R
O
Output Resistance
V
O
e
0 I
O
e
0
60
60
X
P
d
Power Consumption
V
S
e
g
15V No Load
75
120
80
150
mW
V
S
e
g
3V No Load
4
6
4
8
Offset Adj Range
R
P
e
20 kX
g
4
g
4
mV
TCV
OS
Average Input Offset
(Note 4)
0 3
1 3
0 5
1 8
Voltage Drift Without
m
V C
External Trim
TCV
OS
n
With External Trim
R
P
e
20 kX (Note 4)
0 3
1 3
0 4
1 6
TCI
OS
Average Input Offset
(Note 3)
8
35
12
50
pA C
Current Drift
TCI
B
Average Input Bias
(Note 3)
13
35
18
50
pA C
Current Drift
3
Electrical Characteristics
Unless otherwise specified V
S
e
g
15V T
A
e
25 C Boldface type refers to limits over 0 C
s
T
A
s
a
70 C
Symbol
Parameter
Conditions
OP-07D
Units
Min
Typ
Max
V
OS
Input Offset Voltage
(Note 1)
60
150
m
V
85
250
V
OS t
Long-Term V
OS
Stability
(Note 2)
0 5
3 0
m
V Mo
I
OS
Input Offset Current
0 8
6 0
nA
1 6
8 0
I
B
Input Bias Current
g
2 0
g
12 0
nA
g
3 0
g
14 0
e
np-p
Input Noise Voltage
0 1 Hz to 10 Hz (Note 3)
0 38
0 65
m
Vp-p
e
n
Input Noise Voltage Density
f
O
e
10 Hz
10 5
20 0
f
O
e
100 Hz (Note 3)
10 3
13 5
nV
0
Hz
f
O
e
1000 Hz
9 8
11 5
i
np-p
Input Noise Current
0 1 Hz to 10 Hz (Note 3)
15
35
pAp-p
i
n
Input Noise Current Density
f
O
e
10 Hz
0 35
0 90
pA
0
Hz
f
O
e
100 Hz (Note 3)
0 15
0 27
f
O
e
1000 Hz
0 13
0 18
R
IN
Input Resistance Differential-Mode
(Note 4)
7
31
MX
R
INCM
Input Resistance Common-Mode
120
GX
IVR
Input Voltage Range
g
13
g
14
V
CMRR
Common-Mode
V
CM
e
g
13V
94
110
dB
Rejection Ratio
94
106
PSRR
Power Supply
V
S
e
g
3V to
g
18V
7
32
m
V V
Rejection Ratio
10
51
A
VO
Large Signal
R
L
s
2 kX V
O
e
g
10V
120
400
Voltage Gain
R
L
e
2 kX V
O
e
g
10V
100
400
V mV
R
L
t
500X V
O
e
g
0 5V
400
V
S
g
3V (Note 4)
V
O
Output Voltage Swing
R
L
t
10 kX
g
12 0
g
13 0
R
L
t
2 kX
g
11 5
g
12 8
V
R
L
t
2 kX
g
11 0
g
12 6
R
L
t
1 kX
g
12 0
SR
Slew Rate
R
L
t
2 kX (Note 3)
0 1
0 3
V ms
BW
Closed-Loop Bandwidth
A
VCL
e a
1 (Note 3)
0 4
0 6
MHz
RO
Output Resistance
V
O
e
0 I
O
e
0
60
X
P
d
Power Consumption
V
S
e
g
15V No Load
80
150
mW
V
S
e
g
3V No Load
4
8
Offset Adj Range
R
P
e
20 kX
g
4
mV
TCV
OS
Average Input Offset
(Note 4)
0 7
2 5
m
V C
Voltage Drift Without
External Trim
TCV
OS
n
With External Trim
R
P
e
20 kX (Note 4)
0 7
2 5
m
V C
TCI
OS
Average Input Offset Current Drift
(Note 3)
12
50
pA C
TCI
B
Average Input Bias Current Drift
(Note 3)
18
50
pA C
Note 1
V
OS
is measured approximately 0 5 second after application of power
Note 2
Long-Term Offset Voltage Stability refers to the averaged trend line of V
OS
vs Time over extended periods after the first 30 days of operation
Excluding the initial hour of operation changes in V
OS
during the first 30 operating days are typically 2 5 mV Parameter is sample tested
Note 3
Sample Tested
Note 4
Guaranteed by design
4
Test Circuits
Offset Voltage Test Circuit
TL H 10550 4
Low Frequency Noise Test Circuit
TL H 10550 5
Optional Offset Nulling Circuit
TL H 10550 6
5
OP-07
Low
Offset
Low
Drift
Operational
Amplifier
Physical Dimensions
inches (millimeters) (Continued)
Order Number OP-07EP OP-07CP or OP-07DP
NS Package Number N08E
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support device or system whose failure to perform can
into the body or (b) support or sustain life and whose
be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance
support device or system or to affect its safety or
with instructions for use provided in the labeling can
effectiveness
be reasonably expected to result in a significant injury
to the user
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