54ACTQ16646
16-Bit Transceiver/Register with TRI-STATE
Outputs
General Description
The 'ACTQ16646 contains sixteen non-inverting bidirec-
tional registered bus transceivers providing multiplexed
transmission of data directly from the input bus or from the
internal storage registers. Each byte has separate control in-
puts which can be shorted together for full 16-bit operation.
The DIR inputs determine the direction of data flow through
the device. The CPAB and CPBA inputs load data into the
registers on the LOW-to-HIGH transition. The 'ACTQ16646
utilizes NSC Quiet Series technology to guarantee quiet out-
put switching and improved dynamic threshold performance.
FACT Quiet Series
features GTO
output control and un-
dershoot corrector for superior performance.
Features
n
Utilizes NSC FACT Quiet Series technology
n
Guaranteed simultaneous switching noise level and
dynamic threshold performance
n
Independent registers for A and B buses
n
Multiplexed real-time and stored data transfers
n
Separate control logic for each byte
n
16-bit version of the 'ACTQ646
n
Outputs source/sink 24 mA
n
Standard Microcircuit Drawing (SMD) 5962-9581601
Logic Symbol
GTO
TM
is a trademark of National Semiconductor Corporation.
TRI-STATE
is a registered trademark of National Semiconductor Corporation.
FACT
TM
and FACT Quiet Series
TM
are trademarks of Fairchild Semiconductor Corporation.
DS010937-1
September 1998
54ACTQ16646
16-Bit
T
ransceiver/Register
with
TRI-ST
A
T
E
Outputs
1998 National Semiconductor Corporation
DS010937
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Connection Diagram
Pin Assignment for
CERPAK
DS010937-2
Real Time Transfer
A-Bus to B-Bus
DS010937-3
FIGURE 1.
Real Time Transfer
B-Bus to A-Bus
DS010937-4
FIGURE 2.
Storage from
Bus to Register
DS010937-5
FIGURE 3.
Transfer from
Register to Bus
DS010937-6
FIGURE 4.
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Function Table
Inputs
Data I/O (Note 1)
Output Operation Mode
G
1
DIR
1
CPAB
1
CPBA
1
SAB
1
SBA
1
A
07
B
07
H
X
H or L
H or L
X
X
Isolation
H
X
N
X
X
X
Input
Input
Clock An Data into A Register
H
X
X
N
X
X
Clock Bn Data Into B Register
L
H
X
X
L
X
An to Bn -- Real Time (Transparent Mode)
L
H
N
X
L
X
Input
Output
Clock An Data to A Register
L
H
H or L
X
H
X
A Register to Bn (Stored Mode)
L
H
N
X
H
X
Clock An Data into A Register and Output to Bn
L
L
X
X
X
L
Bn to An -- Real Time (Transparent Mode)
L
L
X
N
X
L
Output
Input
Clock Bn Data into B Register
L
L
X
H or L
X
H
B Register to An (Stored Mode)
L
L
X
N
X
H
Clock Bn into B Register and Output to An
H = HIGH Voltage Level
X = Immaterial
L = LOW Voltage Level
N = LOW-to-HIGH Transition.
Note 1: The data output functions may be enabled or disabled by various signals at the G and DIR inputs. Data input functions are always enabled; i.e., data at the
bus pins will be stored on every LOW-to-HIGH transition of the appropriate clock inputs. Also applies to data I/O (A and B: 8-15) and #2 control pins.
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Logic Diagram
DS010937-7
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Absolute Maximum Ratings
(Note 2)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage (V
CC
)
-0.5V to +7.0V
DC Input Diode Current (I
IK
)
V
I
= -0.5V
-20 mA
V
I
= V
CC
+ 0.5V
+20 mA
DC Output Diode Current (I
OK
)
V
O
= -0.5V
-20 mA
V
O
= V
CC
+ 0.5V
+20 mA
DC Output Voltage (V
O
)
-0.5V to V
CC
+ 0.5V
DC Output Source/Sink Current (I
O
)
50 mA
DC V
CC
or Ground Current
per Output Pin
50 mA
Junction Temperature
CDIP
+175C
Storage Temperature
-65C to +150C
Recommended Operating
Conditions
Supply Voltage (V
CC
)
'ACTQ
4.5V to 5.5V
Input Voltage (V
I
)
0V to V
CC
Output Voltage (V
O
)
0V to V
CC
Operating Temperature (T
A
):
54ACTQ
-55C to +125C
Minimum Input Edge Rate (dV/dt)
'ACTQ Devices
125 mV/ns
V
IN
from 0.8V to 2.0V
V
CC
@
4.5V, 5.5V
Note 2: Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, without
exception to ensure that the system design is reliable over its power supply,
temperature, and output/input loading variables. National does not recom-
mend operation of FACT
TM
circuits outside databook specifications.
DC Electrical Characteristics for 'ACTQ Family Devices
Symbol
Parameter
V
CC
(V)
54ACTQ
Units
Conditions
T
A
= -55C to +125C
Guaranteed Limits
V
IH
Minimum High
4.5
2.0
V
V
OUT
= 0.1V
Input Voltage
5.5
2.0
or V
CC
- 0.1V
V
IL
Maximum Low
4.5
0.8
V
V
OUT
= 0.1V
Input Voltage
5.5
0.8
or V
CC
- 0.1V
V
OH
Minimum High
4.5
4.4
V
I
OUT
= -50 A
Output Voltage
5.5
5.4
V
IN
= V
IL
or V
IH
4.5
3.70
V
I
OH
= -24 mA
5.5
4.70
I
OH
= -24 mA
V
OL
Maximum Low
4.5
0.1
V
I
OUT
= 50 A
Output Voltage
5.5
0.1
V
IN
= V
IL
or V
IH
4.5
0.50
V
I
OL
= 24 mA
5.5
0.50
I
OL
= 24 mA
I
OZT
Maximum I/O
5.5
10.0
A
V
IN
= V
IL
, V
IH
Leakage Current
V
O
= V
CC
, GND
I
IN
Maximum Input
5.5
1.0
A
V
I
= V
CC
, GND
Leakage Current
I
CCT
Maximum I
CC
/Input
5.5
1.6
mA
V
I
= V
CC
- 2.1V
I
CC
Max Quiescent
5.5
160.0
A
V
IN
= V
CC
or GND
Supply Current
I
OLD
Minimum Dynamic
5.5
50
mA
V
OLD
= 1.65V Max
I
OHD
Output Current (Note 4)
50
mA
V
OHD
= 3.85V Min
V
OLP
Quick Output
5.0
1.1
V
Maximum Dynamic V
OL
(Notes 5, 6)
V
OLV
Quick Output
5.0
-0.8
V
Minimum Dynamic V
OL
(Notes 5, 6)
Note 3: All outputs loaded; thresholds associated with output under test.
Note 4: Maximum test duration 2.0 ms; one output loaded at a time.
Note 5: Maximum number of outputs that can switch simultaneously is n. (n - 1) outputs are switched LOW and one output held LOW.
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