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Электронный компонент: CF9501A

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preliminary
SM9501A/B
NIPPON PRECISION CIRCUITS INC.--1
Radio Controlled Clock Receiver IC
OVERVIEW
The SM9501A/B is a BiCMOS RCC
*1
receiver IC. It accepts low frequency standard wave input received
from an external antenna, amplifies it, detects the data signal, and outputs a digital time code signal.
*1
: Radio controlled clock
FEATURES
I
Operating supply voltage range
2.4 to 3.6V (A version)
4.5 to 5.5V (B version)
I
Operating current consumption
55
A (typ) @3V (A version)
55
A (typ) @5V (B version)
I
Standby current consumption
0.1
A (max) @3V (A version)
0.1
A (max) @5V (B version)
I
High sensitivity: 0.5
Vrms input
I
Wide frequency range (35kHz to 80kHz)
I
Include analog switch for antennatuning capaci-
tors change
I
AGC gain hold function
I
External crystal filter connection
I
BiCMOS process
I
Package:16-pin VSOP, Chip form
ORDERING INFORMATION
PINOUT
(Top view)
PACKAGE DIMENSIONS
(Unit: mm)
Device
Package
SM9501AV
16-pin VSOP
SM9501BV
CF9501A
Chip form
VDDA
1
IN1
IN3
IN2
16
VDD
PON
OUT
VSS
FCN
XO
VSSA
XI
8
HLDN
CP
CB
9
LF
6.4 0.2
4.4 0.2
0.275TYP
5.1 0.2
0.65
0.12
0.10
M
0.22
- 0.05
+ 0.1
1.15 0.1
0.10 0.05
0.15 - 0.05
+ 0.1
0.5 0.2
0 to 10
preliminary
SM9501A/B
NIPPON PRECISION CIRCUITS INC.--2
PAD LAYOUT (CF9501A)
(Unit:
m)
PAD NAME and DIMENSIONS (CF9501A)
Chip size: 1.43
2.36mm
Chip thickness: 300 30m
PAD size: 100m (TN: 80m)
Chip base: V
SS
level
Number
Name
Pad dimensions [m]
X
Y
1
VDDA
386
2117
2
IN1
177
2035
3
IN3
177
1766
4
IN2
177
1486
5
FCN
177
1217
6
XO
177
937
7
VSSA
177
586
8
XI
177
288
9
LF
1237
286
10
CB
1237
555
11
CP
1237
809
12
HLDN
1237
1078
13
VSS
1237
1302
14
OUT
1237
1755
15
PON
1237
2035
16
VDD
1031
2117
-
TN
1
1. For test mode
1257
1506
IN1
VDDA
PON
(0,0)
(1430,2360)
DA9501
NPC
1
2
5
4
3
13
14
15
16
7
6
8
9
10
11
12
OUT
VSS
HLDN
CP
CB
LF
IN3
IN2
FCN
XO
VSSA
XI
VDD
TN
preliminary
SM9501A/B
NIPPON PRECISION CIRCUITS INC.--3
BLOCK DIAGRAM
PIN DESCRIPTION
Number
Name
I/O
1
1. I: input, O: output, Ipu: input with pull-up resistor, : supply pin
A/D
2
2. A: analog signal, D: digital signal
Description
1
VDDA
-
A
AGC amplifier (+) supply input
2
IN1
I
A
Antenna input 1 (fixed input)
3
IN3
I
A
Antenna input 3 (via analog switch)
4
IN2
I
A
Antenna input 2 (analog switch bypass)
5
FCN
Ipu
D
Analog switch control input (active LOW)
6
XO
O
A
Output for crystal filter
7
VSSA
-
A
AGC amplifier () supply input
8
XI
I
A
Input from crystal filter
9
LF
O
A
Rectifier LPF capacitor connection
10
CB
O
A
Bottom hold detector capacitor connection
11
CP
O
A
Peak hold detector capacitor connection
12
HLDN
Ipu
D
AGC gain hold control (active LOW)
13
VSS
-
A
Substrate () supply input
14
OUT
O
D
Clock time code output (active LOW)
15
PON
Ipu
D
Standby state control input (active LOW)
16
VDD
-
A
(+) supply input
-
TN
Ipu
D
AGC amplifier gain control switch (active LOW, for test mode)
VDDA
VSS
VDD
CP
AGC Control
Peak/Bottom
Hold Det.
Decoder
CB
HLDN
PON
Bias
Rectifier
LPF
AGC Amp
XI
FCN
OUT
LF
XO VSSA
Post Amp
IN1
IN3
IN2
preliminary
SM9501A/B
NIPPON PRECISION CIRCUITS INC.--4
SPECIFICATIONS
Absolute Maximum Ratings
V
SS
= 0V
Recommended Operating Conditions
V
SS
= 0V
Parameter
Symbol
Condition
Rating
Unit
Supply voltage range
V
DD
-
0.3 to +7.0
V
Input voltage range
V
IN
-
0.3 to V
DD
+0.3
V
Power dissipation
P
D
16-pin VSOP
150
mW
Storage temperature range
T
stg
16-pin VSOP
-
55 to +125
C
Chip form
-
65 to +150
C
Parameter
Symbol
Condition
Rating
Unit
Supply voltage range
V
DD
A version
2.4 to 3.6
V
B version
4.5 to 5.5
V
Operating temperature range
T
opr
A version
-
20 to +70
C
B version
-
40 to +85
C
preliminary
SM9501A/B
NIPPON PRECISION CIRCUITS INC.--5
Electrical Characteristics
9501A version
V
DD
= 2.4 to 3.6V, V
SS
= 0V, Ta =
-
20 to +70
C unless otherwise noted.
Parameter
Symbol
Condition
Rating
Unit
min
typ
max
Minimum operating voltage
V
MIN
2.4
V
Maximum operating voltage
V
MAX
3.6
V
Maximum operating current
consumption
1
1. Measured using the standard circuit.
I
DDM
V
DD
= 3.0V, no input signal,
PON: VSS, OUT: OPEN
65
100
A
Operating current consumption
1
I
DDT
V
DD
= 3.0V, 500ms pulsewidth,
0.1mVrms input (differential input),
PON: VSS, OUT: OPEN
55
A
Standby mode current consumption
I
ST
PON, FCN, HLDN: VDD or OPEN
0.1
A
Minimum input voltage range
V
FMIN
IN1IN2 differential input
0.5
1.0
Vrms
Maximum input voltage range
V
FMAX
IN1IN2 differential input
80
mVrms
Input frequency
F
IN
IN1IN2 differential input
35
80
kHz
Analog switch resistance
R
A
V|IN2IN3| = 50mV, V
IN2
= 0V
15
Startup time
2
2. The time taken under stable wave input conditions from when power is applied or standby is released, using PON, until stable digital output occurs
within ratings.
t
ON
When supply is applied
8
sec
Startup time
2
(PON)
t
PON
From standby mode
8
sec
PON input current
I
I1
V
IN
= 0V
1.5
A
FCN input current
I
I2
V
IN
= 0V
1.5
A
HLDN input current
I
I3
V
IN
= 0V
1.5
A
LOW-level output current
I
OL
V
DD
= 2.4V, OUT = 0.5V
10
A
HIGH-level output current
I
OH
V
DD
= 2.4V, OUT = 1.9V
10
A
Gain hold time
t
HLD
3dB change
1
sec
Fall time output propagation delay
3
3. The time taken, with 10:1 input signal amplitude ratio and 500ms pulsewidth, from when a change in signal input occurs until the output OUT changes.
Note that this characteristic is very dependent on the antenna and crystal filter characteristics. The standard crystal used here has the following equiv-
alent circuit coefficients.
t
DN
FIN = 40/60kHz, standard crystal,
NPC standard jig
V
IN
= 1
Vrms to 80mVrms
160
ms
Rise time output propagation delay
3
t
UP
200
ms
LOW-level output pulsewidth
4
(200ms)
4. Values obtained when using the standard crystal employed here. Note that these values are dependent on the crystal characteristics, and should be
considered as reference values.
T
200
100
200
300
ms
LOW-level output pulsewidth
4
(500ms)
T
500
400
500
650
ms
LOW-level output pulsewidth
4
(800ms)
T
800
700
800
900
ms
Noise rejection ratio
5
5. Time averaged rms values, where the noise is white noise and the measurement bandwidth is determined by the crystal filter equivalent used in the
standard circuit.
S/N
9
dB
f [kHz]
L
1
[kH]
C
1
[fF]
R
1
[k
]
C
0
[pF]
40
6.70280
2.36228
11.4492
1.42773
60
5.17396
1.36007
13.4826
1.04927
L
1
C
0
R
1
C
1