SM8223A
NIPPON PRECISION CIRCUITS--1
NIPPON PRECISION CIRCUITS INC.
FSK Decoder and DTMF Receiver IC
OVERVIEW
The SM8223A is a FSK (Frequency shift keying) decoder and DTMF (Dual tone multi-frequency) receiver IC.
It is fabricated using a CMOS process and features a power-down function for low power dissipation opera-
tion. The FSK decoder and DTMF receiver have the same performance characteristics as dedicated ICs that
perform the same functions, with the added benefit of an FSK decoder/DTMF receiver auto-select function
1
using the telephone tip/ring input signal. It also features a ring (call signal) signal detection circuit, making for
easy construction of low power dissipation, high-performance analog telephone-related applications.
FEATURES
s
Both FSK signal caller-ID information services
and DTMF signal caller-ID information services
supported
s
FSK decoder/DTMF receiver auto-select function
s
Ring (call signal) signal detection circuit built-in
s
Serial I/O
s
Input gain adjustment circuit built-in
s
Power-down mode
s
Single supply operation: 3.0V 10%
s
3.579545MHz external crystal oscillator fre-
quency
s
Molybdenum-gate CMOS process
APPLICATIONS
s
Telephones, fax machines and modems that sup-
port caller-ID information services
s
Adapters for caller-ID information service func-
tions
s
Telephones, fax machines and modems that sup-
port remote operation functions
ORDERING INFORMATION
PINOUT
(Top view)
PINOUT
(Unit:
m)
1. Auto-select function operates if the FSK signal conforms to the Bellcore GR-30-CORE standard.
D e vice
P a ck ag e
S M 8 2 2 3 A
16-pin DIP
C F 8 2 2 3 A
Chip
P ad size : 90
m
9 0
m
1
9
16
8
TIP
RING
GS
AGND
RDIN
RDRC
VDD
DOUT
FSK/DTMF
IC
OSCIN
DV
RDET
PDWN
OSCOUT
GND
SM8223AP
GS
(0, 0)
(2810, 3160)
DOUT
RDET
AGND
RDIN
RDRC
PDWN
GND OSCOUT
FSK/DTMF
IC
OSCIN
RING
TIP
VDD
DV
S M 8 2 2 3 A
NIPPON PRECISION CIRCUITS--2
PACKAGE DIMENSIONS
(Unit: mm)
BLOCK DIAGRAM
19.05
2.54
0.25
2.54
0.46
1.52
3.68 to 4.32
0.38 to 1.02
6.35
3.18
3.30
7.49 to 8.13
8.13 to 9.40
RING
TIP
GS
DOUT
Band Pass
Filter
FSK
Decoder
Logic
High Group
Filter
Dial Tone
Filter
DTMF
Decoder
Logic
Bias
Circuit
AGND
OSCIN
OSCOUT
RDIN
RDRC
RDET
GND
VDD
PDWN
FSK/DTMF
Discriminator
Logic
Low Group
Filter
FSK/DTMF
DV
DTMF Receiver
FSK Decoder
Differential
Amplifier
OSC
Ring Detect
S M 8 2 2 3 A
NIPPON PRECISION CIRCUITS--3
PIN DESCRIPTION
N u m b e r
N a m e
I/O
Function
P ad dimensions (
m )
X
Y
1
TIP
I
Tip input. Connected to the telephone line through a protection circuit
1 0 4 6
2 9 3 4
2
R I N G
I
Ring input. Connected to the telephone line through a protection circuit
6 3 8
2 9 3 4
3
G S
O
Input-stage amplifier gain-select output. Used to adjust the gain of the input-
stage amplifier.
1 7 6
2 6 6 5
4
A G N D
O
Analog ground output. Internal reference voltage (V
D D
/2) output level
1 7 6
1 9 5 4
5
R D I N
I
Ring detector input. Used for line reversal and ring signal detection.
Connected for ring detection of attenuated ring signals.
1 7 6
1 5 3 4
6
R D R C
I/O
Ring detector RC terminal. Connected to an RC network which sets the ring
detector delay time.
1 7 6
4 9 2
7
R D E T
O
Ring detector output. R D R C -input Schmitt-trigger buffer output. L OW -level
output when ring signal is detected.
5 9 6
2 2 6
8
P D W N
I
P ow er-down control input. L OW -level for normal operation. HIGH-level for
p ow er-down state. In the pow er-down state, pins AG N D , O S C O U T, D O U T,
and D V are HIGH.
1 0 6 3
2 2 6
9
G N D
Ground. Connected to the system ground potential.
1 6 3 4
2 2 6
1 0
O S C O U T
O
Cr ystal oscillator output. The cr ystal oscillator element is connected between
this pin and OSCIN.
2 0 5 3
2 2 6
1 1
O S C I N
I
Cr ystal oscillator input. The cr ystal oscillator element is connected between
this pin and OSCOUT.
2 6 3 4
5 0 6
1 2
IC
I
Test input. Tied LOW for normal operation.
2 6 3 4
1 5 5 0
1 3
F S K / D T M F
O
FSK/DTMF discr iminator output. HIGH-level output when receiving FSK
signal, and LOW -level output when receiving DTMF signal.
2 6 3 4
1 9 4 2
1 4
D O U T
O
Demodulator output. Demodulated FSK or DTMF signal output. HIGH-level
output in pow er-down state.
2 6 3 4
2 6 2 3
1 5
D V
O
Data trigger output. Data is output on DOUT when this pin goes LOW .
2 2 1 1
2 9 3 4
1 6
V D D
Supply
1 6 1 2
2 9 3 4
S M 8 2 2 3 A
NIPPON PRECISION CIRCUITS--4
SPECIFICATIONS
Absolute Maximum Ratings
GND = 0V
Recommended Operating Conditions
GND = 0V
DC Electrical Characteristics
V
DD
= 3.0V 0.3V, GND = 0V, f
CLK
= 3.579545MHz, T
a
=
-
20 to 85
C unless otherwise noted.
P arameter
S y m b o l
Rating
Unit
Supply voltage ra n g e
V
D D
-
0.5 to 5.0
V
Input voltage ra n g e
V
IN
-
0.3 to V
D D
+ 0.3
V
DC input current
I
IN
10
m A
Storage temperature ra n g e
T
stg
-
40 to 125
C
P arameter
S y m b o l
Condition
Rating
Unit
m i n
typ
m a x
Supply voltage
V
D D
2.7
3.3
V
Clock frequency
f
C L K
3.579545
M H z
Clock frequency accuracy
f
C
-
0.1
+0.1
%
O p e rating temperature
T
a
-
2 0
8 5
C
P arameter
S y m b o l
Condition
Rating
Unit
m i n
typ
m a x
Supply current consumption
I
D D
P D W N = 0 V, RDIN = 0 V,
R D R C = 0 V, all other inputs
o p e n
4.5
m A
P ow er-down state current
I
D P D
P D W N = V
D D
, RDIN = 0 V,
R D R C = 0 V, all other inputs
o p e n
1 5
A
P D WN, RDIN, R D R C L OW -level
input voltage
V
IL1
0.3V
D D
V
P D WN, RDIN, R D R C HIGH-level
input voltage
V
IH1
0.7V
D D
V
O S C I N L OW -level input voltage
V
IL2
W h e n external clock input
0.3V
D D
V
O S C I N H I G H - l evel input voltage
V
IH2
W h e n external clock input
0.7V
D D
V
D O U T, D V, R D E T, FSK/D T M F L OW -
level output current
I
O L
2
m A
D O U T, D V, R D E T, FSK/D T M F HIGH-
level output current
I
O H
-
0.8
m A
P D WN, RDIN input leakage current
I
IN
-
1
1
A
R D R C output leakage current
I
O F F
1
A
S M 8 2 2 3 A
NIPPON PRECISION CIRCUITS--5
AC Electrical Characteristics
FSK decoder
V
DD
= 3.0V 0.3V, GND = 0V, f
CLK
= 3.579545MHz, T
a
=
-
20 to 85
C unless otherwise noted.
DTMF receiver
V
DD
= 3.0V 0.3V, GND = 0V, f
CLK
= 3.579545MHz, T
a
=
-
20 to 85
C unless otherwise noted.
Input-stage amplifier Characteristics
V
DD
= 3.0V 0.3V, GND = 0V, f
CLK
= 3.579545MHz, T
a
=
-
20 to 85
C unless otherwise noted.
P arameter
S y m b o l
Condition
Rating
Unit
m i n
typ
m a x
Detection sensitivity
Typical application circuit
-
4 0
-
37.5
0
d B m
Noise reduction ratio
M a r k signal and SPA C E
signal are same level.
Noise: Random noise from
200Hz to 3400Hz.
2 0
d B
P arameter
S y m b o l
Condition
Rating
Unit
m i n
typ
m a x
Detection frequency deviation
Typical application circuit
1.5% 2
H z
Non-detection frequency deviation
3.5
%
Detection sensitivity
-
32.0
0.0
d B m
Non-detection sensitivity
-
50.0
d B m
Signal level error
Typical application circuit
1
1. Input signal is up to V
D D
level.
6
d B
High-frequency rejection ratio
1 8
d B
Noise rejection ratio
1 2
d B
Dial tone rejection ratio
2 0
d B
P arameter
S y m b o l
Condition
Rating
Unit
m i n
typ
m a x
Input leakage current
I
IN
1
A
Input resistance
R
IN
1
M
DC open-loop voltage gain
A
V O L
3 0
d B
Unity gain frequency
f
C
8 0
k H z
Load capacitance
C
L
1 0 0
p F
Load resistance
R
L
5 0
k
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