Rel. 07/03
1
Via S. M. Maddalena, 12 - 38100 Trento - Italy
Tel. +39 0461 260552 - Fax +39 0461 260617
e-mail: info@neuricam.com http://www.neuricam.com
NC1802 - PUPILLA 640 x 480-pixel CMOS Optical Sensor
DATA SHEET
Rel. 07/03
The NC1802 - PUPILLA is a monolithic VGA active-pixel gray level camera-on-a-chip sensor; it integrates the
pixel array, video amplifiers, a 10-bit ADC, microprocessor interface, and several other support blocks. It is
fabricated using 0.
35
m
CMOS technology.
Its features make the sensor particularly attractive for automotive and outdoor applications, and in general for
use in environments with uncontrolled lighting. Many applications can take advantage of the individual pixel
addressing of the sensor to increase speed. Because of the on-chip integration of most blocks, only few support
components and minimum glue logic are required to assemble very compact camera heads.
Fig.1-Simplified camera block diagram.
KEY FEATURES
High dynamic range (120 dB) with logarithmic response and non-integrating continuous readout
640x480-pixel resolution, 8-m pitch square pixels, array size 5.120 x 3.840 mm
2
Random pixel addressing
Integrated video amplifiers and pipelined analog-to-digital converter with 10-bit resolution
Addressing optimization circuitry for maximum efficiency when scanned with a TV raster
Typical sensitivity: less than 1 mW/m
2
Sampling rate up to 16 M pixels/s, corresponding to 52 frames per second
NC1802-Pupilla VGA-size CMOS Optical Sensor
NeuriCam S.p.A.
Rel. 07/03
2
Lower cost and fewer support components compared to CCD-based solutions
Single 3.3 V operating voltage, 200 mW operating power dissipation, less than 10 mW power-down mode
Differential analog output
Evaluation kit based on high-performance CameraLink standard interface available
APPLICATIONS
Automotive cameras
Indoor and outdoor security cameras
Laser imaging
Industrial quality control and inspection
Robotics
PINOUT FOR THE 100 PIN PACKAGE
The following picture shows the pinout of the 100 PIN CQFP package
100
NC
1
NC
99
NC
98
NC
97
NC
96
NC
95
TST3
94
TST2
93
VDDP
92
GNDP
91
DO5
90
DO6
89
DO7
88
DO8
87
DO9
86
AR1
85
AR2
84
AR3
83
AR4
82
AR5
81
TST4
80
TST7
79
NC
78
NC
77
NC
76
NC
2
NC
3
NC
4
NC
5
ENAALL
6
PREDISN
7
DO4
8
DO3
9
DO2
10
DO1
11
DO0
12
AR0
13
AC9
14
AC8
15
AC7
16
AC6
17
AC5
18
PWDN
19
GND
20
AC0
21
NC
22
NC
23
NC
24
NC
25
NC
NC
26
NC
27
NC
28
NC
29
AC4
30
AC3
31
VDD
32
CLK
33
OEN
34
AC2
35
AC1
36
TST5
37
TSTF
38
TSTE
39
TSTG
40
IB_VAMP
41
IBTL
42
VBG
43
TSTB
44
TST8
45
NC
46
NC
47
NC
48
NC
49
NC
50
NC
75
NC
74
NC
73
NC
72
NC
71
TST6
70
AR6
69
AR7
68
AR8
67
TST1
66
VDDB
65
GNDB
64
TSTC
63
TSTD
62
VCM
61
60
VPREC
60
VREF
59
VDDA
58
GNDA
57
TST9
56
TSTA
55
NC
54
NC
53
NC
52
NC
51
PIXEL
ARRAY
ANALOG PINS
PIN LIST FOR THE 100 PIN PACKAGE
NC1802-Pupilla VGA-size CMOS Optical Sensor
NeuriCam S.p.A.
Rel. 07/03
4
PIN DESCRIPTION FOR THE 100 PIN PACKAGE
PIN NAME
TYPE
DESCRIPTION
DIGITAL
CLK
TTL IN
Conversion clock
AR[8:0]
TTL IN
Row address bus, valid range 0-479d
AC[9:0]
TTL IN
Column address bus, valid range 0-639d
DO[9:0]
DIG OUT/TS
Digital video data output
OEN
TTL IN
Output enable for DO output bus. Active low. If high, DO output bus is in
high impedance.
PWDN
TTL IN
Power down control - active low - to keep high in normal operation
PREDISN
TTL IN
Enable bitline preenabling - active low - to keep low in normal operation
ENAALL
TTL IN
Preenable all bitlines - active high - to keep low in normal operation
ANALOG
IBTL
AN IN
Bitline bias current sink *
IB_VAMP
AN IN
Video amplifier bias current sink *
VREF
AN IN
Video line reference voltage *
VCM
AN IN
Common mode voltage for video amplifier and A/D converter *
VPREC
AN IN
Bitline precharge voltage *
VBG
AN IN
Bandgap reference voltage or A/D converter *
TEST
TST1
TTL IN
To keep high in normal operation
TST2
TTL IN
To keep low in normal operation
TST3
TTL IN
To keep high in normal operation
TST4
TTL IN
To keep low in normal operation
TST5
TTL IN
To keep high in normal operation
TST6
DIG OUT
Do not connect in normal operation
TST7
TTL IN
To keep low in normal operation
TST8
AN IN/OUT
To keep low in normal operation
TST9
AN OUT
Do not connect in normal operation
TSTA
AN OUT
Do not connect in normal operation
TSTB
AN OUT
Do not connect in normal operation
TSTC
AN IN/OUT
To keep low in normal operation
TSTD
AN IN/OUT
To keep low in normal operation
TSTE
AN OUT
Do not connect in normal operation
TSTF
AN OUT
Do not connect in normal operation
TSTG
AN IN
Current pin to keep to a very low current *
POWER
GND
Digital S
Ground for digital parts
VDD
Digital S
Supply voltage for digital parts
GNDP
Digital S
Ground for pad drivers
VDDP
Digital S
Supply voltage for pad drivers
GNDA
Analog S
Ground for analog core and pads
VDDA
Analog S
Supply voltage for core and pads
GNDB
Analog S
Ground for biasing of substrate
VDDB
Analog S
Supply voltage for biasing of wells
* Please refer to the "Analog References" section
LEGEND:
TTL IN
TTL-level digital input
AN IN
Analog input
DIG OUT
Digital Output
AN OUT
Analog output
DIG OUT/TS Digital Output with three-state
Analog S
Analog supply pin
Digital S
Digital supply pin
PINOUT FOR THE 64 PIN PACKAGE
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