CB-C8VX/VM Series Features
0.5-micron (drawn), Ti-Silicide CMOS technology
True 3.3 V process
36 base sizes, each with 2- and 3-metal layer options
Usable gates from 14K to 703K gates
True 5 V CMOS interface by multi-oxide I/O structure
Staggered pad ring for high gate-to-pad ratio
5 V and 3.3 V PCI buffer, including 66-MHz PCI
GTL and HSTL buffer in development
Low power dissipation: 1.04 mW/MHz/gate (3.3 V)
Extensive macro range (CPUs, peripherals, analog)
Memory compiler for various types of memory blocks
Extensive package support: PQFP, TQFP, BGA, TBGA
Automatic clock skew control by clock tree synthesis
OpenCAD: popular, third-party CAE tools supported
NEC Electronics Inc.
CB-C8VX/VM
3-Volt, 0.5-Micron
Cell-Based CMOS ASIC
Description
NEC's CB-C8VX/VM CMOS cell-based ASIC family
facilitates the design of complete cell-based silicon
systems composed of user-defined logic, complex
macrofunctions such as microprocessors, intelligent
peripherals, analog functions, and compiled memory
blocks.
The CB-C8VX cell-based ASIC series employs a
0.5-micron (0.35-micron effective) silicon gate CMOS
process with silicidation. This advanced process greatly
reduces the number of contacts per cell, leading to area-
efficient library elements optimized on speed with a 3.3-
volt power supply. CB-C8VM, a derivative of CB-C8VX,
features a unique I/O structure that provides a full 5-volt
CMOS interface. For both technologies, the Titanium-
Silicide process results in overall reduced power
consumption per cell. Combining very high integration,
high speed, and low power consumption, this technology
meets today's rigorous application demands.
Fully supported by NEC's sophisticated OpenCAD
design framework, CB-C8VX/VM maximizes design
quality and flexibility while minimizing ASIC design
time. NEC's OpenCAD system combines popular
third-party design tools with proprietary NEC tools,
including advanced floorplanner and clock tree
synthesis tools.
A10985EU1V0DS00
April 1996
Table 1. CB-C8VX/VM Series Features and Benefits
CB-C8VX/VM Series Benefits
High-density cell structure
High speed at low power supply
Flexible base sizes to best fit design needs
High integration capabilities
Supports flexible interfacing to different signal voltages
Minimizes device cost for high I/O requirement
Full PCI support compliant with latest PCI specification
High-speed I/F to memory and processor buses
Ideally-suited for hand-held applications
Advanced system-on-silicon capabilities
Area-effective memory integration on chip
Delivers the latest package requirements
Minimizes on-chip clock skew
Smooth design flow from customer design to silicon
Figure 1. BGA Package Examples
OpenCAD is a registered trademark of NEC Electronics Inc.
Preliminary
Full 5-Volt CMOS Interface
CB-C8VM offers a full voltage swing interface to a 5-volt
CMOS signal environment. This option is realized by
implementing a section of thicker gate oxide into the I/O
buffer to guarantee the necessary breakdown voltages.
The 5-volt I/O buffers can be placed at any location of the
I/O area and are freely mixable with 3.3-volt buffers. The
internal core is identical to CB-C8VX.
CB-C8VX/VM
2
5-Volt-Tolerant Interface
CB-C8VX supports both 3.3-volt and 5-volt-tolerant
signaling. The 5-volt-tolerant buffers enable CB-C8VX
devices to communicate with 5-volt TTL signals while
protecting the ASIC. CB-C8VX requires only a 3.3-volt
power supply.
Integration and Performance
Gate complexities up to 703K usable gates can be
integrated on the largest of 36 die sizes, each routable
with 2- or 3-metal layers. This gives enough flexibility
to optimally fit design needs. Twenty-two die sizes
offer a single I/O pad ring and 14 are equipped with a
staggered dual pad ring in order to achieve a high pad-
to-gate ratio. For details, please refer to Table 2 and
Table 3.
The family offers an extensive library of primitive
macrofunctions characterized for 3.3-volt operation.
Each of these blocks has several different drive
strengths, allowing the synthesis tool to select the most
suitable block for the required internal load. This
generally reduces the design overhead without
influencing design performance. The internal gate
delay for a two-input NAND gate is 110 picoseconds
(ps), (F/O=1, L=0mm) and 220 ps under loaded
conditions (F/O=2, L=2mm).
To meet today's high-speed demands, high-perform-
ance I/O macros are mandatory. CB-C8VX/VM
supports macros such as GTL and HSTL for fast, low-
power data transfer, PLLs to synchronize on-chip
system clocks, and PCI signaling standards. Also,
CB-C8VX/VM offers a variety of macrofunctions to be
incorporated on a single chip. These macrofunctions
include CPU cores, peripheral devices, RAM/ROM and
analog functions, enabling designers to create systems
on silicon.
Low Power Consumption
NEC's CB-C8VX/VM Ti-Silicide process features
exceptionally low power dissipation to facilitate high-
speed operation without the need of costly package
options, and drastically increases battery life for hand-
held applications. At 3.3-volts, power dissipation for
internal cells is 1.04 W/gate/MHz.
Table 2. CB-C8VX/VM Die Steps
(124 pad pitch)
Step
I/O
Max. Usable Gates
(1)
2 Layer
3 Layer
B18
88
13078
19617
B57
104
18797
28195
B97
120
25438
38156
C37
136
33219
49828
C76
152
42016
63023
D16
168
51703
77555
D55
184
62547
93820
D75
192
67969
101953
E15
208
80484
120727
E54
224
93875
140813
E94
240
106000
159000
F34
256
120969
181453
F74
272
136641
204961
G14
288
153500
230250
G53
304
171234
256852
G93
320
183078
274617
H33
336
202328
303492
H72
352
222219
333328
J32
376
254094
381141
J71
392
275813
413719
K11
408
298797
448195
K90
440
347031
520547
Single pad ring die steps.
(1) Glue logic only, with average utilization.
Table 3. CB-C8VX/VM Die Steps
Step
I/O
Max. Usable Gates
(1)
2 Layer
3 Layer
B73T
148
18844
28266
C37T
188
30250
45375
C50T
196
32703
49055
D01T
228
44000
66000
D52T
260
57047
85570
D90T
284
67797
101695
E54T
324
88281
132422
F18T
364
109125
163688
F70T
396
128875
193313
G34T
436
155297
232945
H49T
508
202766
304148
J51T
572
256047
384070
K92T
660
337531
506297
M97T
788
468984
703477
Dual pad ring die steps.
(1) Glue logic only, with average utilization.
(80 staggered pad pitch)
3
CB-C8VX/VM
Multi-Voltage I/O Interface
For those systems not yet ready to migrate completely
to 3.3-volts, CB-C8 has a full 5-volt CMOS interface
available. Applying two additional process steps that
realize a "multi-oxide" section in the I/O area, 5-volt
speed and drive capabilities are available with the help
of a separate 5-volt supply rail. The 5-volt I/O buffers
include level shifters to convert the 5-volt signal levels
to the internal core supply voltage of 3.3-volts. This
CB-C8 derivative is called CB-C8VM and is, except for
the different I/O structure, identical to CB-C8VX.
For moderate speed and driveable 5-volt I/O cell
requirements, CB-C8VM's flexibility provides tolerant
I/Os that safely interface to 5V devices using a single 3.3-
volt power supply.
In both cases, the 3.3-volt and 5-volt interfaces can be
mixed without restriction along the entire I/O ring.
System on Silicon
NEC offers a wide selection of CPU/MCU cores, industry-
standard intelligent peripheral macros, and compilable
RAM/ROM blocks as well as analog functions in hard
macro form that can be integrated onto a single CB-
C8VX/VM chip. Including such macrofunctions in an
ASIC design makes it possible to achieve a high level of
integration, performance, and system security.
The range of NEC's on-chip macrofunctions includes
NEC's proprietary 32-bit V810TM RISC CPU, and an
upgraded high-speed version of the popular 16-bit
CPU V30HLTM, called V30MXTM, which operates at
clock speeds of 33 MHz at 3.3-volts, and offers an
improved 286-compatible address pipelining and uses
a 24-bit address bus. Other specific cores can be
implemented on request. For details about the full
range of on-chip macrofunctions, refer to Table 4.
Embedded macrofunctions are easy to place, route,
and simulate. Because these macros are derived from
NEC's standard parts, they have fully characterized
parameters and can be tested with standard test
vectors to ensure full functionality and reliability.
NEC's test bus architecture allows complete system
simulation, production testing of the internal circuits of the
macrofunctions, and seamless embedded CPU core
emulation. The CPU may be connected externally and
can be replaced by an in-circuit emulator (ICE). All this is
performed with only two dedicated test control pins.
CB-C8VX
CB-C8VM
Device Names
PD97xxx
PD99xxx
Interface options
true 3.3 V
true 3.3 V
5 V tolerant
5 V tolerant
true 5 V CMOS
Core voltage
3.3 V
3.3 V
I/O voltage
3.3 V
3.3 V and 5 V
Table 4. Macrofunction Range
Comparable
Macro
Device
Description
NZ 70008H
PD70008A
Z80TM: 8-bit microprocessor (16 MHz)
NZ V30MX
PD70108H
V30MX: 16-bit microprocessor (16-bit data bus, 33 MHz)
NZ V810
PD70732
V810TM: 32-bit RISC microprocessor (25 MHz)
NZ 71037H
PD71037
Programmable DMA controller (4 channels, 20 MHz)
NZ 71051H
PD71051
USART: serial data control (full-duplex Tx/Rx, 300kbit/s, 20 MHz)
NZ 71054H
PD71054
Programmable timer/counter (16-bit, 3 counter, 6 modes, 20 MHz)
NZ 71055H
PD71055
Programmable parallel interface (8-bit, 3 I/O ports, 3 modes)
NZ 71059H
PD71059
Programmable interrupt control (64 interrupt request inputs)
NA 4993
PD4993
8-bit parallel I/O real-time clock
NA 72065BL
PD72065B
Single-double density floppy disk controller
NZ 72103
PD72103
HDLC Controller: Full duplex, Baud rate 4 Mbps, built-in DMA
M I
2
CTM
--
I
2
C Bus interface: receive, transmit, master and slave
NA 16450L
NS16C450
UART: for PC-compatible serial ports
NA 16550L
NS16550A
UART with FIFO: for PC-compatible serial ports
Z80 is a trademark of Zilog, Inc.
V30HL, V30MX and v810 are trademarks of NEC Corporation
I
2
C
is a trademark of Philips
CB-C8VX/VM
4
Memory Macros
All memory blocks in NEC's CB-C8VX/VM technology
are realized as embedded hard macros and are
generated by a memory compiler. To ease the task of
RAM testing for the designer, NEC supplies standard
test pattern sets, which help to save valuable develop-
ment time. NEC offers seven different types of
memory blocks, as shown in Table 5.
Packaging
NEC offers a wide variety of over 60 package types.
The CB-C8VX/VM family can be packaged in NEC's
most popular surface-mount and through-hole
packages. These include plastic quad-flat packs
(PQFPs) with up to 376 pins. The QFP range includes
thin packages (TQFP, LQFP), QFPs with integrated
heatspreader, and tape-automated-bonding QFPs
(TAB-QFP) with up to 304 pins. Pin grid arrays
(PGAs) with up to 528 pins, BGA packages with up to
672 pins, and TBGA packages with up to 696 pins can
be used.
CB-C8VX/VM Applications
CB-C8VX/VM devices are targeted for 3.3-volt
products in telecommunications, electronic data
processing (EDP), and consumer applications. Typical
telecommunications applications include cellular
telephones, high-end pagers, and PCMCIA devices, as
well as broad-band communication systems up to 156
Mbit/s. In the EDP segment, applications range from
personal computers to high-end workstations and
Table 5. Memory Blocks
Macro Type
Word Range
Bit Range
Step (Word / Bit)
ROM
128 - 8192
4 - 64
128 / 2
256 - 16384
2 - 32
256 / 1
512 - 32768
1 - 16
512 / 1
Low-power RAM, single-port
64 - 512
1 - 32
16 / 1
(asynchronous, bi-directional I/O)
128 - 1024
1 - 16
32 / 1
256 - 2048
1 - 8
64 / 1
Low-power RAM, single-port
64 - 512
1 - 32
16 / 1
(synchronous, separate I/O)
128 - 1024
1 - 16
32 / 1
256 - 2048
1 - 8
64 / 1
High-density RAM, single-port
128 - 2048
1 - 64
16 / 1
(synchronous, separate I/O)
High-speed RAM, single-port
32 - 2048
1- 32
32 / 1
(synchronous, separate I/O)
Register files, dual-port
8 - 256
4 - 32
4 / 1
Register files, triple-port
8 - 256
4 - 32
4 / 1
mainframes, multimedia platforms, graphic accel-
erators, personal digital assistants (PDAs), notebook
and pen-based devices, hand-held data terminals, and
hard disk controllers. Consumer applications include
g a m e s , v i d e o c a m e r a s , p o r t a b l e p r i n t e r s , a n d
sophisticated calculators.
Each of these applications demands the benefits
of increased integration and low power consumption
that only a cell-based family using an optimized 3.3-
volt process technology can deliver. CB-C8VX/VM
provides the flexibility needed when a 3.3-volt process
is required.
Design Tool Support
The CB-C8VX/VM family is fully supported by NEC's
OpenCAD Design System, a unified front-to-back-end
design package that allows designers to mix and
match tools from the industry's most popular third-party
vendors and from NEC's offering of powerful propri-
etary software tools. These tools perform schematic
capture, logic synthesis, floorplanning, logic and timing
simulation, layout, design and circuit rule check, and
memory compilations.
The company's proprietary clock tree synthesis tool
automatically buffers clock lines as needed to minimize
clock skew, which is essential for half-micron designs.
The nonlinear delay calculator ensures timing accuracy
throughout the simulation, synthesis, and silicon stages.
Finally, NEC's memory compiler software enables
memory block generation based on size and perform-
ance requirements.
5
CB-C8VX/VM
Input/Output Capacitance
(V
DD
= V
I
= 0 V; f = 1 MHz)
Terminal
Symbol
Typ
Max
Unit
Input
C
IN
10
20
pF
Output
C
OUT
10
20
pF
I/O
C
I/O
10
20
pF
(1)
Values include package pin capacitance
Absolute Maximum Ratings
Power supply voltage, V
DD
3.3 V supply
0.5 to +4.6 V
5 V supply
0.5 to +6.0 V
I/O voltage, V
I
/V
O
3.3 V interface block
0.5 to +4.6 V and (V
I
/V
O
< V
DD
+0.5 V)
5 V-tolerant block
0.5 to +6.6 V and (V
I
/V
O
< V
DD
+3.0 V)
5 V swing block
0.5 to +6.0 V and (V
I
/V
O
< V
DD
+0.5 V)
Latch-up current, I
LATCH
>1 A (typ)
Operating temperature, T
OPT
40 to +85C
Storage temperature, T
STG
65 to +150C
AC Characteristics
(V
DD
= 3.3 V 0.3 V; T
J
= 40 to +125C)
Parameter
Symbol
Min
Typ
Max
Unit
Conditions
Toggle frequency
f
TOG
480
MHz
D-F/F; F/O = 2 mm
Delay time
2-input NAND (F322)
t
PD
236
ps
F/O = 1; L = 0 mm
t
PD
272
ps
F/O = 2; L = typ
Flip-flop (F661)
t
PD
777
ps
F/O = 1; L = 0 mm
t
PD
865
ps
F/O = 2; L = typ
t
SETUP
420
ps
--
t
HOLD
580
ps
--
Input buffer (FI01)
t
PD
126
ps
F/O = 1; L = 0 mm
t
PD
228
ps
F/O = 2; L = typ
Output buffer (9 mA) 3.3 V
t
PD
1.24
ns
C
L
= 15 pF
Output buffer (9 mA) 5 V-tolerant
t
PD
4.262
ns
C
L
= 15 pF
Output buffer (6 mA) 5 V-swing
t
PD
2.698
ns
C
L
= 15 pF
Output rise time (9 mA)
t
R
1.88
ns
C
L
= 15 pF
Output fall time (9 mA)
t
F
1.32
ns
C
L
= 15 pF
Recommended Operating Conditions
(V
DD
= 3.3 V 0.165 V; V
CC
= 5.0 V 0.5 V; T
J
= 40 to +125C)
3.3 V Interface
5 V Tolerant
5 V Swing
5 V Swing
Block
Block
CMOS Level
TTL Level
(CB-C8VX/VM)
(CB-C8VM)
(CB-C8 VM)
Parameter
Symbol
Min
Max
Min
Max
Min
Max
Min
Max
Unit
I/O power supply voltage
V
DD
3.0
3.6
3.0
3.6
4.5
5.5
4.75
5.25
V
Junction temperature
T
J
40
+125
40
+125
40
+125
40
+125
C
High-level input voltage
V
IH
2.0
V
DD
2.0
5.5
0.7 V
DD
V
DD
2.0
V
DD
V
Low-level input voltage
V
IL
0
0.8
0
0.8
0
0.3 V
DD
0
0.8
V
Positive trigger voltage
V
P
1.2
2.4
1.2
2.4
1.8
4.0
1.2
2.4
V
Negative trigger voltage
V
N
0.6
1.8
0.6
1.8
0.6
3.1
0.6
1.8
V
Hysteresis voltage
V
H
0.3
1.5
0.3
1.5
0.3
1.5
0.3
1.5
V
Input rise/fall time
t
R
, t
F
0
200
0
200
0
200
0
200
ns
Input rise/fall time, Schmitt
t
R
, t
F
0
10
0
10
0
10
0
10
ms
Power Consumption
Description
Limits
Unit
Internal gate
(1)
1.04
W/MHz
Input block
--
W/MHz
Output block
--
W/MHz
(1)
Assumes 30% internal gate switching at one time
Caution: Exposure to absolute maximum ratings for extended periods may affect
device reliability; exceeding the ratings could cause permanent damage. The device
should not be operated outside the recommended operating conditions.
Caution: Exposure to absolute maximum ratings for extended periods may affect
device reliability; exceeding the ratings could cause permanent damage. The device
should not be operated outside the recommended operating conditions.
CB-C8VX/VM
6
DC Characteristics
(V
DD
= 3.3 V 0.3 V, 5 V 0.5 V; T
A
= 40 to +125C)
Parameters
Symbol
Conditions
MIN.
TYP.
MAX.
Unit
Static current consumption
I
L
V
I
= V
DD
B18 to H33
200
A
or GND
H72 to K90
300
A
Off-state output current
I
OZ
V
O
= V
DD
or GND
10
A
Output short-circuit current
I
OS
V
O
= 0V
250
mA
Input leakage current
I
I
Normal input
V
I
= V
DD
or GND
10
-5
10
A
With pull-up resistor (50 k)
V
I
= GND
10
40
80
A
With pull-up resistor (5 k)
V
I
= GND
130
350
640
A
With pull-down resistor (50 k)
V
I
= V
DD
10
65
130
A
Low-level output current
I
OL
3 V interface buffer
V
OL
= 0.4V
mA
3 mA
I
OL
3
mA
6 mA
I
OL
6
mA
9 mA
I
OL
9
mA
12 mA
I
OL
12
mA
18 mA
I
OL
18
mA
24 mA
I
OL
24
mA
5 V-tolerant buffer
V
OL
= 0.4V
mA
1 mA
I
OL
1
mA
2 mA
I
OL
2
mA
3 mA
I
OL
3
mA
6 mA
I
OL
6
mA
9 mA
I
OL
9
mA
5 V swing buffer
V
OL
= 0.4V
mA
1 mA
I
OL
1
mA
2 mA
I
OL
2
mA
3 mA
I
OL
3
mA
6 mA
I
OL
6
mA
9 mA
I
OL
9
mA
12 mA
I
OL
12
mA
18 mA
I
OL
18
mA
High-level output current
I
OH
3 V interface buffer
V
OH
= 2.4V
3 mA
I
OH
-3
mA
6 mA
I
OH
-6
mA
9 mA
I
OH
-9
mA
12 mA
I
OH
-12
mA
18 mA
I
OH
-18
mA
24 mA
I
OH
-24
mA
7
CB-C8VX/VM
DC Characteristics (continued)
(V
DD
= 3.3 V 0.3 V, 5 V 0.5 V; T
A
= 40 to +125C)
Parameters
Symbol
Conditions
MIN.
TYP.
MAX.
Unit
High-level output current
I
OH
5 V-tolerant buffer
V
OH
= 2.4 V
1 mA
I
OH
1
mA
2 mA
I
OH
2
mA
3 mA
I
OH
3
mA
6 mA
I
OH
6
mA
9 mA
I
OH
9
mA
5 V swing buffer
V
OH
= 0.4 V
1 mA
I
OH
1
mA
2 mA
I
OH
2
mA
3 mA
I
OH
3
mA
6 mA
I
OH
6
mA
9 mA
I
OH
9
mA
12 mA
I
OH
12
mA
18 mA
I
OH
18
mA
Low-level output voltage
V
OL
I
OL
= 0 mA
0.1
V
3 V interface buffer
V
OL
0.1
V
5 V interface buffer
V
OL
0.1
V
5 V swing buffer
V
OL
0.1
V
High-level output voltage
V
OH
I
OH
= 0 mA
V
3 V interface buffer
V
OH
V
DD
0.1
V
5 V interface buffer
V
OH
V
DD
0.2
V
5 V swing buffer
V
OH
V
DD
0.1
V
CB-C8VX/VM
8
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or FAX your request to: 1-800-729-9288
No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Electronics Inc.
(NECEL). The information in this document is subject to change without notice. ALL DEVICES SOLD BY NECEL ARE COVERED BY THE
PROVISIONS APPEARING IN NECEL TERMS AND CONDITIONS OF SALES ONLY. INCLUDING THE LIMITATION OF LIABILITY, WAR-
RANTY, AND PATENT PROVISIONS. NECEL makes no warranty, express, statutory, implied or by description, regarding information set forth
herein or regarding the freedom of the described devices from patent infringement. NECEL assumes no responsibility for any errors that
may appear in this document. NECEL makes no commitments to update or to keep current information contained in this document. The
devices listed in this document are not suitable for use in applications such as, but not limited to, aircraft control systems, aerospace
equipment, submarine cables, nuclear reactor control systems and life support systems. "Standard" quality grade devices are recom-
mended for computers, office equipment, communication equipment, test and measurement equipment, machine tools, industrial robots,
audio and visual equipment, and other consumer products. For automotive and transportation equipment, traffic control systems, anti-
disaster and anti-crime systems, it is recommended that the customer contact the responsible NECEL salesperson to determine the
reliabilty requirements for any such application and any cost adder. NECEL does not recommend or approve use of any of its products in
life support devices or systems or in any application where failure could result in injury or death. If customers wish to use NECEL devices
in applications not intended by NECEL, customer must contact the responsible NECEL sales people to determine NECEL's willingness
to support a given application.
1996 NEC Electronics Inc./Printed in U.S.A.
Document No. A10985EU1V0DS00
NEC ASIC DESIGN CENTERS
WEST
3033 Scott Boulevard
Santa Clara, CA 95054
TEL 408-588-5008
FAX 408-588-5017
One Embassy Centre
9020 S.W. Washington Square Road,
Suite 400
Tigard, OR 97223
TEL 503-671-0177
FAX 503-643-5911
THIRD-PARTY DESIGN CENTERS
SOUTH CENTRAL/SOUTHEAST
Koos Technical Services, Inc.
385 Commerce Way, Suite 101
Longwood, FL 32750
TEL
407-260-8727
FAX 407-260-6227
Integrated Silicon Systems Inc.
2222 Chapel Hill Nelson Highway
Durham, NC 27713
TEL
919-361-5814
FAX 919-361-2019
Applied Systems, Inc.
1761 W. Hillsboro Blvd., Suite 328
Deerfield Beach, FL 33442
TEL
305-428-0534
FAX 305-428-5906
NORTH CENTRAL/NORTHEAST
The Meadows, 2nd Floor
161 Worcester Road
Framingham, MA 01701
TEL 508-935-2200
FAX 508-935-2234
Greenspoint Tower
2800 W. Higgins Road, Suite 765
Hoffman Estates, IL 60195
TEL 708-519-3945
FAX 708-882-7564
NEC Electronics Inc.
CORPORATE HEADQUARTERS
2880 Scott Boulevard
P.O. Box 58062
Santa Clara, CA 95052
TEL 408-588-6000
SOUTH CENTRAL/SOUTHEAST
16475 Dallas Parkway, Suite 380
Dallas, TX 75248
TEL 972-735-7444
FAX 972-931-8680
Research Triangle Park
2000 Regency Parkway, Suite 455
Cary, NC 27511
TEL 919-460-1890
FAX 919-469-5926
Two Chasewood Park
20405 SH 249, Suite 580
Houston, TX 77070
TEL 713-320-0524
FAX 713-320-0574
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