2002 Microchip Technology Inc.

Preliminary

DS21673B-page 1

24AA515/24LC515/24FC515

Device Selection Table

Features

· Low power CMOS technology

- Maximum write current 3 mA at 5.5V

- Maximum read current 400 µA at 5.5V

- Standby current 100 nA typical at 5.5V

· 2-wire serial interface bus, I

CTM compatible

· Cascadable for up to four devices

· Self-timed ERASE/WRITE cycle

· 64-byte page-write mode available

· 5 ms max write-cycle time

· Hardware write protect for entire array

· Output slope control to eliminate ground bounce

· Schmitt Trigger inputs for noise suppression

· 100,000 erase/write cycles

· Electrostatic discharge protection > 4000V

· Data retention > 200 years

· 8-pin PDIP, SOIC packages

· Temperature ranges:

Description

The Microchip Technology Inc. 24AA515/24LC515/
24FC515 (24XX515*) is a 64K x 8 (512K bit) Serial
Electrically Erasable PROM, capable of operation
across a broad voltage range (1.8V to 5.5V). It has
been developed for advanced, low power applications
such as personal communications or data acquisition.
This device has both byte-write and page-write capabil-
ity of up to 64 bytes of data. This device is capable of
both random and sequential reads. Reads may be
sequential within address boundaries 0000h to 7FFFh
& 8000h to FFFFh. Functional address lines allow up to
four devices on the same data bus. This allows for up
to 2 Mbits total system EEPROM memory. This device
is available in the standard 8-pin plastic DIP and SOIC
packages.

Package Type

Block Diagram

Part

Number

Range

Max Clock

Frequency

Temp

Ranges

24AA515

1.8-5.5V

400 kHz

24LC515

2.5-5.5V

400 kHz

24FC515

2.5-5.5V

1 MHz

100 kHz for V

< 2.5V.

- Industrial (I):

-40

°C to

+85

°C

SCL

SDA

24XX515

PDIP

SOIC

SCL

SDA

24XX515

HV GENERATOR

EEPROM

ARRAY

PAGE LATCHES

YDEC

XDEC

SENSE AMP

R/W CONTROL

MEMORY

CONTROL

LOGIC

I/O

CONTROL

LOGIC

I/O

A0 A1

SDA

SCL

512K Bit I

CTM CMOS Serial EEPROM

*24XX515 is used in this document as a generic part number for the 24AA515/24LC515/24FC515 devices.

24AA515/24LC515/24FC515

DS21673B-page 2

Preliminary

2002 Microchip Technology Inc.

1.0

ELECTRICAL CHARACTERISTICS

Absolute Maximum Ratings

.............................................................................................................................................................................6.5V

All inputs and outputs w.r.t. V

......................................................................................................... -0.6V to V

+1.0V

Storage temperature ...............................................................................................................................-65°C to +150°C

Ambient temp. with power applied ..........................................................................................................-65°C to +125°C

Soldering temperature of leads (10 seconds) ....................................................................................................... +300°C

ESD protection on all pins

...................................................................................................................................................... 4 kV

1.1

DC Characteristics

NOTICE: Stresses above those listed under "Maximum Ratings" may cause permanent damage to the device. This
is a stress rating only and functional operation of the device at those or any other conditions above those indicated in
the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods
may affect device reliability.

DC CHARACTERISTICS

Industrial (I):

= +1.8V to 5.5V

AMB

= -40°C to +85°C

Param.

No.

Sym

Characteristic

Min

Max

Units

Conditions

A0, A1, SCL, SDA, and
WP pins:

High level input voltage

0.7 V

2.5V

Low level input voltage

0.3 V

0.2 V

V
V

2.5V

< 2.5V

HYS

Hysteresis of Schmitt
Trigger inputs
(SDA, SCL pins)

0.05 V

2.5V (Note)

Low level output voltage

0.40

= 3.0 mA @ V

= 4.5V

= 2.1 mA @ V

= 2.5V

Input leakage current

±10

µA

= V

or V

, WP = V

= V

or V

, WP = V

Output leakage current

±10

µA

OUT

= V

or V

OUT

Pin capacitance
(all inputs/outputs)

= 5.0V (Note)

AMB

= 25°C, f

= 1 MHz

Read Operating current

400

µA

= 5.5V, SCL = 400 kHz

Write

= 5.5V

D10

CCS

Standby current

µA SCL = SDA = V

= 5.5V

A0, A1, WP = V

, A2 = V

Note:

This parameter is periodically sampled and not 100% tested.

2002 Microchip Technology Inc.

Preliminary

DS21673B-page 3

24AA515/24LC515/24FC515

1.2

AC Characteristics

AC CHARACTERISTICS

Industrial (I):

= +1.8V to 5.5V

AMB

= -40°C to +85°C

Param.

No.

Sym

Characteristic

Min.

Max.

Units

Conditions

CLK

Clock frequency

--
--
--

100
400

1000

kHz

1.8V

2.5V

5.5V

2.5V

5.5V (24FC515 only)

HIGH

Clock high time

4000

600
500

--
--
--

1.8V

2.5V

5.5V

2.5V

5.5V (24FC515 only)

LOW

Clock low time

4700
1300

500

--
--
--

1.8V

2.5V

5.5V

2.5V

5.5V (24FC515 only)

SDA and SCL rise time
(Note 1)

--
--
--

1000

300
300

1.8V

2.5V

5.5V

2.5V

5.5V (24FC515 only)

SDA and SCL fall time
(Note 1)

--
--

300
100

All except, 24FC515
2.5V

5.5V (24FC515 only)

STA

START condition hold time

4000

600
250

--
--
--

1.8V

2.5V

5.5V

2.5V

5.5V (24FC515 only)

STA

START condition setup time

4700

600
250

--
--
--

1.8V

2.5V

5.5V

2.5V

5.5V (24FC515 only)

DAT

Data input hold time

(Note 2)

DAT

Data input setup time

250
100
100

--
--
--

1.8V

2.5V

5.5V

2.5V

5.5V (24FC515 only)

STO

STOP condition setup time

4000

600
250

--
--
--

1.8V

2.5V

5.5V

2.5V

5.5V (24FC515 only)

WP setup time

4000

600
600

--
--
--

1.8V

2.5V

5.5V

2.5V

5.5V (24FC515 only)

WP hold time

4700
1300
1300

--
--
--

1.8V

2.5V

5.5V

2.5V

5.5V (24FC515 only)

Output valid from clock
(Note 2)

--
--
--

3500

900
400

1.8V

2.5V

5.5V

2.5V

5.5V (24FC515 only)

BUF

Bus free time: Time the bus
must be free before a new
transmission can start

4700
1300

500

--
--
--

1.8V

2.5V

5.5V

2.5V

5.5V (24FC515 only)

Output fall time from V

minimum to V

maximum

100 pF

10 + 0.1C

250
250

All except, 24FC515 (Note 1)
24FC515 (Note 1)

Input filter spike suppression
(SDA and SCL pins)

All except, 24FC515 (Notes 1 and 3)

Write cycle time (byte or page)

Endurance

1 M

cycles

25°C, V

= 5.0V, Block Mode (Note 4)

Note 1: Not 100% tested. C

= total capacitance of one bus line in pF.

2: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region (minimum

300 ns) of the falling edge of SCL to avoid unintended generation of START or STOP conditions.

3: The combined T

and V

HYS

specifications are due to new Schmitt Trigger inputs which provide improved noise spike

suppression. This eliminates the need for a TI specification for standard operation.

4: This parameter is not tested but established by characterization. For endurance estimates in a specific application,

please consult the Total Endurance Model which can be obtained on Microchip's website @www.microchip.com.

2002 Microchip Technology Inc.

Preliminary

DS21673B-page 5

24AA515/24LC515/24FC515

2.0

PIN DESCRIPTIONS

The descriptions of the pins are listed in Table 2-1.

TABLE 2-1:

PIN FUNCTION TABLE

2.1

A0, A1 Chip Address Inputs

The A0, A1 inputs are used by the 24XX515 for multiple
device operations. The levels on these inputs are com-
pared with the corresponding bits in the slave address.
The chip is selected if the compare is true.

Up to four devices may be connected to the same bus
by using different chip select bit combinations. If left
unconnected, these inputs will be pulled down inter-
nally to V

2.2

A2 Chip Address Input

The A2 input is non-configurable chip select. This pin
must be tied to V

in order for this device to operate.

2.3

Serial Data (SDA)

This is a bi-directional pin used to transfer addresses
and data into and data out of the device. It is an open-
drain terminal, therefore, the SDA bus requires a pull-
up resistor to V

(typical 10 k

for 100 kHz, 2 k for

400 kHz and 1 MHz).

For normal data transfer SDA is allowed to change only
during SCL low. Changes during SCL high are
reserved for indicating the START and STOP condi-
tions.

2.4

Serial Clock (SCL)

This input is used to synchronize the data transfer from
and to the device.

2.5

Write Protect (WP)

This pin can be connected to either V

, V

or left

floating. An internal pull-down resistor on this pin will
keep this device in the unprotected state if left floating.
If tied to V

or left floating, normal memory operation

is enabled (read/write the entire memory 0000h-
FFFFh).

If tied to V

, WRITE operations are inhibited. Read

operations are not affected.

3.0

FUNCTIONAL DESCRIPTION

The 24XX515 supports a bi-directional 2-wire bus and
data transmission protocol. A device that sends data
onto the bus is defined as a transmitter, and a device
receiving data as a receiver. The bus must be con-
trolled by a master device which generates the serial
clock (SCL), controls the bus access, and generates
the START and STOP conditions while the 24XX515
works as a slave. Both master and slave can operate
as a transmitter or receiver, but the master device
determines which mode is activated.

Name PDIP SOIC

Function

User Configurable Chip Select

Non-Configurable Chip Select.
This pin must be hard wired to
logical 1 state (V

). Device

will not operate with this pin
left floating or held to logical 0
(V

Ground

SDA

Serial Data

SCL

Serial Clock

Write Protect Input

+1.8 to 5.5V (24AA515)
+2.5 to 5.5V (24LC515)
+4.5 to 5.5V (24FC515)

24AA515/24LC515/24FC515

DS21673B-page 6

Preliminary

2002 Microchip Technology Inc.

4.0

BUS CHARACTERISTICS

The following bus protocol has been defined:

· Data transfer may be initiated only when the bus

is not busy.

· During data transfer, the data line must remain

stable whenever the clock line is HIGH. Changes
in the data line while the clock line is HIGH will be
interpreted as a START or STOP condition.

Accordingly, the following bus conditions have been
defined (Figure 4-1).

4.1

Bus not Busy (A)

Both data and clock lines remain HIGH.

4.2

Start Data Transfer (B)

A HIGH to LOW transition of the SDA line while the
clock (SCL) is HIGH determines a START condition. All
commands must be preceded by a START condition.

4.3

Stop Data Transfer (C)

A LOW to HIGH transition of the SDA line while the
clock (SCL) is HIGH determines a STOP condition. All
operations must end with a STOP condition.

4.4

Data Valid (D)

The state of the data line represents valid data when,
after a START condition, the data line is stable for the
duration of the HIGH period of the clock signal.

The data on the line must be changed during the LOW
period of the clock signal. There is one bit of data per
clock pulse.

Each data transfer is initiated with a START condition
and terminated with a STOP condition. The number of
the data bytes transferred between the START and
STOP conditions is determined by the master device.

4.5

Acknowledge

Each receiving device, when addressed, is obliged to
generate an Acknowledge signal after the reception of
each byte. The master device must generate an extra
clock pulse which is associated with this Acknowledge
bit.

A device that acknowledges must pull-down the SDA
line during the acknowledge clock pulse in such a way
that the SDA line is stable LOW during the HIGH period
of the acknowledge related clock pulse. Of course,
setup and hold times must be taken into account. Dur-
ing reads, a master must signal an end of data to the
slave by NOT generating an Acknowledge bit on the
last byte that has been clocked out of the slave. In this
case, the slave (24XX515) will leave the data line HIGH
to enable the master to generate the STOP condition.

FIGURE 4-1:

DATA TRANSFER SEQUENCE ON THE SERIAL BUS

FIGURE 4-2:

ACKNOWLEDGE TIMING

Note:

The 24XX515 does not generate any
Acknowledge bits if an internal program-
ming cycle is in progress.

ADDRESS OR

ACKNOWLEDGE

VALID

DATA

ALLOWED

TO CHANGE

STOP

CONDITION

START

CONDITION

SCL

SDA

(A)

(B)

(D)

(C)

(A)

SCL

Transmitter must release the SDA line at this point
allowing the Receiver to pull the SDA line low to
acknowledge the previous eight bits of data.

Receiver must release the SDA line at this point
so the Transmitter can continue sending data.

Data from transmitter

SDA

Acknowledge

Bit

2002 Microchip Technology Inc.

Preliminary

DS21673B-page 7

24AA515/24LC515/24FC515

5.0

DEVICE ADDRESSING

A control byte is the first byte received following the
START condition from the master device (Figure 5-1).
The control byte consists of a 4-bit control code; for the
24XX515, this is set as 1010 binary for read and write
operations. The next bit of the control byte is the block
select bit (B0). This bit acts as the A15 address bit for
accessing the entire array. The next two bits of the con-
trol byte are the chip select bits (A1, A0). The chip
select bits allow the use of up to four 24XX515 devices
on the same bus and are used to select which device is
accessed. The chip select bits in the control byte must
correspond to the logic levels on the corresponding A1
and A0 pins for the device to respond. These bits are in
effect the two Most Significant bits of the word address.

The last bit of the control byte defines the operation to
be performed. When set to a one, a read operation is
selected, and when set to a zero, a write operation is
selected. The next two bytes received define the
address of the first data byte (Figure 5-2). Because
only A14...A0 are used, the upper address bit is a don't
care. The upper address bits are transferred first, fol-
lowed by the less significant bits.

Following the START condition, the 24XX515 monitors
the SDA bus checking the device type identifier being
transmitted. Upon receiving a 1010 code and appropri-
ate device select bits, the slave device outputs an
Acknowledge signal on the SDA line. Depending on the
state of the R/W bit, the 24XX515 will select a read or
write operation.

This device has an internal addressing boundary limita-
tion that is divided into two segments of 256K bits.
Block select bit `B0' is used in place of address bit loca-
tion `A15' to control access to each segment.

FIGURE 5-1:

CONTROL BYTE
FORMAT

5.1

Contiguous Addressing Across
Multiple Devices

The chip select bits A1, A0 can be used to expand the
contiguous address space for up to 2 Mbit by adding up
to four 24XX515's on the same bus. In this case, soft-
ware can use A0 of the control byte as address bit A16
and A1 as address bit A17. It is not possible to sequen-
tially read across device boundaries.

Each device has internal addressing boundary limita-
tions. This divides each part into two segments of 256K
bits. The block select bit `B0' controls access to each
"half" rather than address bit location A15.

Sequential read operations are limited to 256K blocks.
To read through four devices on the same bus, eight
random read commands must be given.

FIGURE 5-2:

ADDRESS SEQUENCE BIT ASSIGNMENTS

ACK

R/W

Control Code

Chip Select

Bits

Slave Address

Acknowledge Bit

START Bit

Read/Write Bit

0 R/W

CONTROL BYTE

ADDRESS HIGH BYTE

ADDRESS LOW BYTE

CONTROL

CODE

CHIP

SELECT

BITS

X = Don't Care Bit

BLOCK

SELECT

BIT

24AA515/24LC515/24FC515

DS21673B-page 8

Preliminary

2002 Microchip Technology Inc.

6.0

WRITE OPERATIONS

6.1

Byte Write

Following the START condition from the master, the
control code (four bits), the block select (one bit) the
chip select (two bits), and the R/W bit (which is a logic
low) are clocked onto the bus by the master transmitter.
This indicates to the addressed slave receiver that the
address high byte will follow after it has generated an
Acknowledge bit during the ninth clock cycle. There-
fore, the next byte transmitted by the master is the
high-order byte of the word address and will be written
into the address pointer of the 24XX515. The next byte
is the Least Significant Address Byte. After receiving
another Acknowledge signal from the 24XX515, the
master device will transmit the data word to be written
into the addressed memory location. The 24XX515
acknowledges again and the master generates a
STOP condition. This initiates the internal write cycle
and during this time, the 24XX515 will not generate
Acknowledge signals (Figure 6-1). If an attempt is
made to write to the array with the WP pin held high, the
device will acknowledge the command but no write
cycle will occur, no data will be written, and the device
will immediately accept a new command. After a byte
write command, the internal address counter will point
to the address location following the one that was just
written.

6.2

Page Write

The write control byte, word address, and the first data
byte are transmitted to the 24XX515 in the same way
as in a byte write. But instead of generating a STOP
condition, the master transmits up to 63 additional
bytes, which are temporarily stored in the on-chip page
buffer and will be written into memory after the master
has transmitted a STOP condition. After receipt of each

word, the six lower address pointer bits are internally
incremented by one. If the master should transmit more
than 64 bytes prior to generating the STOP condition,
the address counter will roll over and the previously
received data will be overwritten. As with the byte write
operation, once the STOP condition is received, an
internal write cycle will begin (Figure 6-2). If an attempt
is made to write to the array with the WP pin held high,
the device will acknowledge the command but no write
cycle will occur, no data will be written, and the device
will immediately accept a new command.

6.3

Write Protection

The WP pin allows the user to write-protect the entire
array (0000-FFFF) when the pin is tied to V

. If tied to

or left floating, the write protection is disabled. The

WP pin is sampled at the STOP bit for every write
command (Figure 1-1) Toggling the WP pin after the
STOP bit will have no effect on the execution of the
write cycle.

FIGURE 6-1:

BYTE WRITE

FIGURE 6-2:

PAGE WRITE

Note:

Page write operations are limited to writing
bytes within a single physical page, regard-
less of the number of bytes actually being
written. Physical page boundaries start at
addresses that are integer multiples of the
page buffer size (or `page size') and end at
addresses that are integer multiples of
[page size - 1]. If a page write command
attempts to write across a physical page
boundary, the result is that the data wraps
around to the beginning of the current page
(overwriting data previously stored there),
instead of being written to the next page as
might be expected. It is therefore neces-
sary for the application software to prevent
page write operations that would attempt to
cross a page boundary.

BUS ACTIVITY
MASTER

SDA LINE

BUS ACTIVITY

S
T
A
R
T

CONTROL

BYTE

ADDRESS

HIGH BYTE

ADDRESS
LOW BYTE

DATA

S
T
O
P

A
C
K

X = don't care bit

S 1 0 1 0

BUS ACTIVITY
MASTER

SDA LINE

BUS ACTIVITY

S
T
A
R
T

CONTROL

BYTE

ADDRESS

HIGH BYTE

ADDRESS
LOW BYTE

DATA BYTE 0

S
T
O
P

A
C
K

DATA BYTE 63

A
C
K

X = don't care bit

S 1 0 1 0

2002 Microchip Technology Inc.

Preliminary

DS21673B-page 9

24AA515/24LC515/24FC515

7.0

ACKNOWLEDGE POLLING

Since the device will not acknowledge during a write
cycle, this can be used to determine when the cycle is
complete (This feature can be used to maximize bus
throughput.) Once the STOP condition for a write com-
mand has been issued from the master, the device ini-
tiates the internally timed write cycle. ACK polling can
be initiated immediately. This involves the master
sending a START condition, followed by the control
byte for a write command (R/W = 0). If the device is still
busy with the write cycle, then no ACK will be returned.
If no ACK is returned, then the START bit and control
byte must be resent. If the cycle is complete, then the
device will return the ACK, and the master can then
proceed with the next read or write command. See
Figure 7-1 for flow diagram.

FIGURE 7-1:

ACKNOWLEDGE
POLLING FLOW

Send

Write Command

Send STOP
Condition to

Initiate Write Cycle

Send Start

Send Control Byte

with R/W = 0

Did Device

Acknowledge

(ACK = 0)?

Operation

YES

24AA515/24LC515/24FC515

DS21673B-page 10

Preliminary

2002 Microchip Technology Inc.

8.0

READ OPERATION

Read operations are initiated in the same way as write
operations with the exception that the R/W bit of the
control byte is set to one. There are three basic types
of read operations: current address read, random read,
and sequential read.

8.1

Current Address Read

The 24XX515 contains an address counter that main-
tains the address of the last word accessed, internally
incremented by one. Therefore, if the previous read
access was to address n (n is any legal address), the
next current address read operation would access data
from address n + 1.

Upon receipt of the control byte with R/W bit set to one,
the 24XX515 issues an acknowledge and transmits the
8-bit data word. The master will not acknowledge the
transfer but does generate a STOP condition and the
24XX515 discontinues transmission (Figure 8-1).

FIGURE 8-1:

CURRENT ADDRESS
READ

8.2

Random Read

Random read operations allow the master to access
any memory location in a random manner. To perform
this type of read operation, first the word address must
be set. This is done by sending the word address to the

24XX515 as part of a write operation (R/W bit set to 0).
After the word address is sent, the master generates a
START condition following the acknowledge. This ter-
minates the write operation, but not before the internal
address pointer is set. Then, the master issues the
control byte again but with the R/W bit set to a one. The
24XX515 will then issue an acknowledge and transmit
the 8-bit data word. The master will not acknowledge
the transfer but does generate a STOP condition which
causes the 24XX515 to discontinue transmission
(Figure 8-2). After a random read command, the inter-
nal address counter will point to the address location
following the one that was just read.

8.3

Sequential Read

Sequential reads are initiated in the same way as a ran-
dom read except that after the 24XX515 transmits the
first data byte, the master issues an acknowledge as
opposed to the STOP condition used in a random read.
This acknowledge directs the 24XX515 to transmit the
next sequentially addressed 8-bit word (Figure 8-3).
Following the final byte transmitted to the master, the
master will NOT generate an acknowledge but will gen-
erate a STOP condition. To provide sequential reads,
the 24XX515 contains an internal address pointer
which is incremented by one at the completion of each
operation. This address pointer allows half the memory
contents to be serially read during one operation.
Sequential read address boundaries are 0000h to
7FFFh and 8000h to FFFFh. The internal address
pointer will automatically roll over from address 7FFF to
address 0000 if the master acknowledges the byte
received from the array address 7FFF. The internal
address counter will automatically roll over from
address FFFFh to address 8000h if the master
acknowledges the byte received from the array
address FFFFh.

FIGURE 8-2:

RANDOM READ

FIGURE 8-3:

SEQUENTIAL READ

BUS ACTIVITY
MASTER

SDA LINE

BUS ACTIVITY

S
T
O
P

CONTROL

BYTE

S
T
A
R
T

DATA

A
C
K

N
O

A
C
K

0 B A A 1

BYTE

0 1 0

BUS ACTIVITY
MASTER

SDA LINE

BUS ACTIVITY

A
C
K

N
O

A
C
K

S
T
O
P

S
T
A
R
T

CONTROL

BYTE

ADDRESS

HIGH BYTE

ADDRESS

LOW BYTE

CONTROL

BYTE

DATA

BYTE

S
T
A
R
T

X = Don't Care Bit

S 1 0 1 0

B A A

0 1 0

S 1 0 1 0

B A A

0 1 0

BUS ACTIVITY

MASTER

SDA LINE

BUS ACTIVITY

CONTROL

BYTE

DATA n

DATA n + 1

DATA n + 2

DATA n + X

N
O

A
C
K

S
T
O
P

2002 Microchip Technology Inc.

Preliminary

DS21673B-page 11

24AA515/24LC515/24FC515

9.0

PACKAGING INFORMATION

9.1

Package Marking Information

XXXXXXXX

XXXXXNNN

YYWW

8-Lead PDIP (300 mil)

Example:

Legend: XX...X

Customer specific information*

Year code (last 2 digits of calendar year)

Week code (week of January 1 is week `01')

NNN

Alphanumeric traceability code

Note:

In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line thus limiting the number of available characters
for customer specific information.

Standard marking consists of Microchip part number, year code, week code, traceability code (facility
code, mask rev#, and assembly code). For marking beyond this, certain price adders apply. Please
check with your Microchip Sales Office.

24LC515

I/PNNN

YYWW

8-Lead SOIC (208 mil)

Example:

XXXXXXXX

YYWWNNN

XXXXXXXX

24LC515

YYWWNNN

I/SM

24AA515/24LC515/24FC515

DS21673B-page 12

Preliminary

2002 Microchip Technology Inc.

8-Lead Plastic Dual In-line (P) 300 mil (PDIP)

Units

INCHES*

MILLIMETERS

Dimension Limits

MIN

NOM

MAX

MIN

NOM

MAX

Number of Pins

Pitch

.100

2.54

Top to Seating Plane

.140

.155

.170

3.56

3.94

4.32

Molded Package Thickness

.115

.130

.145

2.92

3.30

3.68

Base to Seating Plane

.015

0.38

Shoulder to Shoulder Width

.300

.313

.325

7.62

7.94

8.26

Molded Package Width

.240

.250

.260

6.10

6.35

6.60

Overall Length

.360

.373

.385

9.14

9.46

9.78

Tip to Seating Plane

.125

.130

.135

3.18

3.30

3.43

Lead Thickness

.008

.012

.015

0.20

0.29

0.38

Upper Lead Width

.045

.058

.070

1.14

1.46

1.78

Lower Lead Width

.014

.018

.022

0.36

0.46

0.56

Overall Row Spacing

.310

.370

.430

7.87

9.40

10.92

Mold Draft Angle Top

Mold Draft Angle Bottom

* Controlling Parameter

Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed

JEDEC Equivalent: MS-001
Drawing No. C04-018

.010" (0.254mm) per side.

§ Significant Characteristic

2002 Microchip Technology Inc.

Preliminary

DS21673B-page 13

24AA515/24LC515/24FC515

8-Lead Plastic Small Outline (SM) Medium, 208 mil (SOIC)

Foot Angle

Mold Draft Angle Bottom

Mold Draft Angle Top

0.51

0.43

0.36

.020

.017

.014

Lead Width

0.25

0.23

0.20

.010

.009

.008

Lead Thickness

0.76

0.64

0.51

.030

.025

.020

Foot Length

5.33

5.21

5.13

.210

.205

.202

Overall Length

5.38

5.28

5.11

.212

.208

.201

Molded Package Width

8.26

7.95

7.62

.325

.313

.300

Overall Width

0.25

0.13

0.05

.010

.005

.002

Standoff

1.98

.078

Molded Package Thickness

2.03

.080

Overall Height

1.27

.050

Pitch

Number of Pins

MAX

NOM

MIN

MAX

NOM

MIN

Dimension Limits

MILLIMETERS

INCHES*

Units

.070

.075

.069

.074

1.78

1.75

1.97

1.88

* Controlling Parameter

Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010" (0.254mm) per side.
Drawing No. C04-056

§ Significant Characteristic

2002 Microchip Technology Inc.

Preliminary

DS21673B-page 15

24AA515/24LC515/24FC515

SYSTEMS INFORMATION AND

UPGRADE HOT LINE

The Systems Information and Upgrade Line provides
system users a listing of the latest versions of all of
Microchip's development systems software products.
Plus, this line provides information on how customers
can receive the most current upgrade kits.The Hot Line
Numbers are:

1-800-755-2345 for U.S. and most of Canada, and

1-480-792-7302 for the rest of the world.

ON-LINE SUPPORT

Microchip provides on-line support on the Microchip
World Wide Web site.

The web site is used by Microchip as a means to make
files and information easily available to customers. To
view the site, the user must have access to the Internet
and a web browser, such as Netscape

or Microsoft

Internet Explorer. Files are also available for FTP
download from our FTP site.

Connecting to the Microchip Internet Web Site

The Microchip web site is available at the following
URL:

www.microchip.com

The file transfer site is available by using an FTP ser-
vice to connect to:

ftp://ftp.microchip.com

The web site and file transfer site provide a variety of
services. Users may download files for the latest
Development Tools, Data Sheets, Application Notes,
User's Guides, Articles and Sample Programs. A vari-
ety of Microchip specific business information is also
available, including listings of Microchip sales offices,
distributors and factory representatives. Other data
available for consideration is:

· Latest Microchip Press Releases

· Technical Support Section with Frequently Asked

Questions

· Design Tips

· Device Errata

· Job Postings

· Microchip Consultant Program Member Listing

· Links to other useful web sites related to

Microchip Products

· Conferences for products, Development Systems,

technical information and more

· Listing of seminars and events

092002

24AA515/24LC515/24FC515

DS21673B-page 16

Preliminary

2002 Microchip Technology Inc.

READER RESPONSE

It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip prod-
uct. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation
can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150.

Please list the following information, and use this outline to provide us with your comments about this document.

What are the best features of this document?

How does this document meet your hardware and software development needs?

Do you find the organization of this document easy to follow? If not, why?

What additions to the document do you think would enhance the structure and subject?

What deletions from the document could be made without affecting the overall usefulness?

Is there any incorrect or misleading information (what and where)?

How would you improve this document?

To:

Technical Publications Manager

RE:

Reader Response

Total Pages Sent ________

From: Name

Company

Address

City / State / ZIP / Country

Telephone: (_______) _________ - _________

Application (optional):

Would you like a reply? Y N

Device:

Literature Number:

Questions:

FAX: (______) _________ - _________

DS21673B

24AA515/24LC515/24FC515

2002 Microchip Technology Inc.

Preliminary

DS21673B-page 17

24AA515/24LC515/24FC515

PRODUCT IDENTIFICATION SYSTEM

To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.

SALES AND SUPPORT

Data Sheets
Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recom-
mended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following:

Your local Microchip sales office

The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277

The Microchip Worldwide Site (www.microchip.com)

Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using.

New Customer Notification System
Register on our web site (www.microchip.com/cn) to receive the most current information on our products.

PART NO.

/XX

Package

Temperature

Range

Device

24AA515:

512K Bit 1.8V I

C CMOS Serial EEPROM

24AA515T: =

512K Bit 1.8V I

C CMOS Serial EEPROM

(Tape and Reel)

24LC515:

512K Bit 2.5V I

C CMOS Serial EEPROM

24LC515T: =

512K Bit 2.5V I

C CMOS Serial EEPROM

(Tape and Reel)

24FC515:

512K Bit 2.5V I

C CMOS Serial EEPROM

24FC515T: =

512K Bit 2.5V I

C CMOS Serial EEPROM

(Tape and Reel)

Temperature Range

-40

°C to +85°C

Package

Plastic DIP (300 mil Body), 8-lead

Plastic SOIC (208 mil Body), 8-lead

Examples:

24AA515T-I/SM: Tape and Reel, Industrial
Temperature, SOIC package.

24LC515-I/P: Industrial Temperature, PDIP
package.

24LC515-I/SM: Industrial Temperature,
SOIC package.

24LC515T-I/SM: Tape and Reel, Industrial
Temperature, SOIC package.

2002 Microchip Technology Inc.

Preliminary

DS21673B - page 19

Information contained in this publication regarding device
applications and the like is intended through suggestion only
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
No representation or warranty is given and no liability is
assumed by Microchip Technology Incorporated with respect
to the accuracy or use of such information, or infringement of
patents or other intellectual property rights arising from such
use or otherwise. Use of Microchip's products as critical com-
ponents in life support systems is not authorized except with
express written approval by Microchip. No licenses are con-
veyed, implicitly or otherwise, under any intellectual property
rights.

Trademarks

The Microchip name and logo, the Microchip logo, K

MPLAB, PIC, PICmicro, PICSTART and PRO MATE are
registered trademarks of Microchip Technology Incorporated
in the U.S.A. and other countries.

FilterLab, micro

ID, MXDEV, MXLAB, PICMASTER, SEEVAL

and The Embedded Control Solutions Company are
registered trademarks of Microchip Technology Incorporated
in the U.S.A.

dsPIC, dsPICDEM.net, ECONOMONITOR, FanSense,
FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP,
ICEPIC, microPort, Migratable Memory, MPASM, MPLIB,
MPLINK, MPSIM, PICC, PICDEM, PICDEM.net, rfPIC, Select
Mode and Total Endurance are trademarks of Microchip
Technology Incorporated in the U.S.A. and other countries.

Serialized Quick Turn Programming (SQTP) is a service mark
of Microchip Technology Incorporated in the U.S.A.

All other trademarks mentioned herein are property of their
respective companies.

Printed on recycled paper.

Microchip received QS-9000 quality system
certification for its worldwide headquarters,
design and wafer fabrication facilities in
Chandler and Tempe, Arizona in July 1999
and Mountain View, California in March 2002.
The Company's quality system processes and
procedures are QS-9000 compliant for its
PICmicro

8-bit MCUs, K

code hopping

devices, Serial EEPROMs, microperipherals,
non-volatile memory and analog products. In
addition, Microchip's quality system for the
design and manufacture of development
systems is ISO 9001 certified.

Note the following details of the code protection feature on Microchip devices:

Microchip products meet the specification contained in their particular Microchip Data Sheet.

Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.

There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowl-
edge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.

Microchip is willing to work with the customer who is concerned about the integrity of their code.

Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as "unbreakable."

Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products.

DS21673B-page 20

Preliminary

2002 Microchip Technology Inc.

AMERICAS

Corporate Office

2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7200 Fax: 480-792-7277
Technical Support: 480-792-7627
Web Address: http://www.microchip.com

Rocky Mountain

2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7966 Fax: 480-792-4338

Atlanta

3780 Mansell Road, Suite 130
Alpharetta, GA 30022
Tel: 770-640-0034 Fax: 770-640-0307

Boston

2 Lan Drive, Suite 120
Westford, MA 01886
Tel: 978-692-3848 Fax: 978-692-3821

Chicago

333 Pierce Road, Suite 180
Itasca, IL 60143
Tel: 630-285-0071 Fax: 630-285-0075

Dallas

4570 Westgrove Drive, Suite 160
Addison, TX 75001
Tel: 972-818-7423 Fax: 972-818-2924

Detroit

Tri-Atria Office Building
32255 Northwestern Highway, Suite 190
Farmington Hills, MI 48334
Tel: 248-538-2250 Fax: 248-538-2260

Kokomo

2767 S. Albright Road
Kokomo, Indiana 46902
Tel: 765-864-8360 Fax: 765-864-8387

Los Angeles

18201 Von Karman, Suite 1090
Irvine, CA 92612
Tel: 949-263-1888 Fax: 949-263-1338

San Jose

Microchip Technology Inc.
2107 North First Street, Suite 590
San Jose, CA 95131
Tel: 408-436-7950 Fax: 408-436-7955

Toronto

6285 Northam Drive, Suite 108
Mississauga, Ontario L4V 1X5, Canada
Tel: 905-673-0699 Fax: 905-673-6509

ASIA/PACIFIC

Australia

Microchip Technology Australia Pty Ltd
Suite 22, 41 Rawson Street
Epping 2121, NSW
Australia
Tel: 61-2-9868-6733 Fax: 61-2-9868-6755

China - Beijing

Microchip Technology Consulting (Shanghai)
Co., Ltd., Beijing Liaison Office
Unit 915
Bei Hai Wan Tai Bldg.
No. 6 Chaoyangmen Beidajie
Beijing, 100027, No. China
Tel: 86-10-85282100 Fax: 86-10-85282104

China - Chengdu

Microchip Technology Consulting (Shanghai)
Co., Ltd., Chengdu Liaison Office
Rm. 2401-2402, 24th Floor,
Ming Xing Financial Tower
No. 88 TIDU Street
Chengdu 610016, China
Tel: 86-28-86766200 Fax: 86-28-86766599

China - Fuzhou

Microchip Technology Consulting (Shanghai)
Co., Ltd., Fuzhou Liaison Office
Unit 28F, World Trade Plaza
No. 71 Wusi Road
Fuzhou 350001, China
Tel: 86-591-7503506 Fax: 86-591-7503521

China - Hong Kong SAR

Microchip Technology Hongkong Ltd.
Unit 901-6, Tower 2, Metroplaza
223 Hing Fong Road
Kwai Fong, N.T., Hong Kong
Tel: 852-2401-1200 Fax: 852-2401-3431

China - Shanghai

Microchip Technology Consulting (Shanghai)
Co., Ltd.
Room 701, Bldg. B
Far East International Plaza
No. 317 Xian Xia Road
Shanghai, 200051
Tel: 86-21-6275-5700 Fax: 86-21-6275-5060

China - Shenzhen

Microchip Technology Consulting (Shanghai)
Co., Ltd., Shenzhen Liaison Office
Rm. 1812, 18/F, Building A, United Plaza
No. 5022 Binhe Road, Futian District
Shenzhen 518033, China
Tel: 86-755-82901380 Fax: 86-755-82966626

China - Qingdao

Rm. B503, Fullhope Plaza,
No. 12 Hong Kong Central Rd.
Qingdao 266071, China
Tel: 86-532-5027355 Fax: 86-532-5027205

India

Microchip Technology Inc.
India Liaison Office
Divyasree Chambers
1 Floor, Wing A (A3/A4)
No. 11, O'Shaugnessey Road
Bangalore, 560 025, India
Tel: 91-80-2290061 Fax: 91-80-2290062

Japan

Microchip Technology Japan K.K.
Benex S-1 6F
3-18-20, Shinyokohama
Kohoku-Ku, Yokohama-shi
Kanagawa, 222-0033, Japan
Tel: 81-45-471- 6166 Fax: 81-45-471-6122

Korea

Microchip Technology Korea
168-1, Youngbo Bldg. 3 Floor
Samsung-Dong, Kangnam-Ku
Seoul, Korea 135-882
Tel: 82-2-554-7200 Fax: 82-2-558-5934

Singapore

Microchip Technology Singapore Pte Ltd.
200 Middle Road
#07-02 Prime Centre
Singapore, 188980
Tel: 65-6334-8870 Fax: 65-6334-8850

Taiwan

Microchip Technology (Barbados) Inc.,
Taiwan Branch
11F-3, No. 207
Tung Hua North Road
Taipei, 105, Taiwan
Tel: 886-2-2717-7175 Fax: 886-2-2545-0139

EUROPE

Austria

Microchip Technology Austria GmbH
Durisolstrasse 2
A-4600 Wels
Austria
Tel: 43-7242-2244-399
Fax: 43-7242-2244-393

Denmark

Microchip Technology Nordic ApS
Regus Business Centre
Lautrup hoj 1-3
Ballerup DK-2750 Denmark
Tel: 45 4420 9895 Fax: 45 4420 9910

France

Microchip Technology SARL
Parc d'Activite du Moulin de Massy
43 Rue du Saule Trapu
Batiment A - ler Etage
91300 Massy, France
Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79

Germany

Microchip Technology GmbH
Steinheilstrasse 10
D-85737 Ismaning, Germany
Tel: 49-89-627-144 0 Fax: 49-89-627-144-44

Italy

Microchip Technology SRL
Centro Direzionale Colleoni
Palazzo Taurus 1 V. Le Colleoni 1
20041 Agrate Brianza
Milan, Italy
Tel: 39-039-65791-1 Fax: 39-039-6899883

United Kingdom

Microchip Ltd.
505 Eskdale Road
Winnersh Triangle
Wokingham
Berkshire, England RG41 5TU
Tel: 44 118 921 5869 Fax: 44-118 921-5820

12/05/02

ORLDWIDE

ALES

AND

ERVICE

Document Outline

Ð­Ð»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: 24FC515T

Document Outline

ÐÐ»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: 24FC515T