DESCRIPTION
s
Guaranteed AC parameters over temperature:
f
MAX
> 3.0GHz (SY55851A)
t
r
/ t
f
< 100ps
Propagation delay < 280ps
s
Guaranteed operation over 40
C to +85
C
temperature range
s
Wide supply voltage range: 2.3V to 3.6V
s
Single IC provides 8 logic functions
s
2:1 MUX capability
s
Fully differential I/O
s
Source terminated CML outputs for fast edge rates:
SY55851 for 100
load
SY55851A for 50
load
s
Guaranteed matched propagation delays:
Select (S)-to-out: < 280ps
Input (A and B)-to-out: < 280ps
s
Accepts PECL, LVPECL, CML input signals
s
Functions as a PECL/LVPECL-to-CML translator
s
Available in a 10-pin (3mm
3mm) MSOP package
The SY55851 and SY55851A are highly flexible,
universal logic gates capable of up to 3.0GHz operation
(SY55851A). These AnyGate differential logic devices
will produce all possible logic functions of two Boolean
variables. They can be configured as any of the following
gates: AND, NAND, OR, NOR, XOR, XNOR, DELAY,
NEGATION (NOT). The SY55851 and SY55851A can
also function as a 2-input multiplexer.
The SY55851 has an output stage optimized for 100
loads, and the SY55851A is optimized for 50
loads.
The differential inputs for both devices are normally
terminated with a single resistor (100
) between the true
and complement pins.
FEATURES
2.5V/3V, 3.0GHz
CML AnyGateTMANY LOGIC
w/50
or 100
OUTPUTS
SuperLiteTM
SY55851
SY55851A
FINAL
APPLICATIONS
s
Port bypass
s
Data communication systems
s
Wireless communication systems
s
Telecom systems
PIN CONFIGURATION
FUNCTIONAL BLOCK DIAGRAM
1
Rev.: A
Amendment: /2
Issue Date:
October 2001
S
0
1
A
B
S
Q
2
2
2
2
PIN NAMES
Pin
Function
A, /A
CML, PECL, LVPECL Input
B, /B
CML, PECL, LVPECL Input
Q, /Q
Differential CML Output
S, /S
CML, PECL, LVPECL Input Selector
GND
Ground
V
CC
V
CC
AnyGate and SuperLite are trademarks of Micrel, Inc.
1
S
/S
A
/A
GND
10 VCC
/B
B
Q
/Q
9
8
7
6
2
3
4
5
MSOP
SY55851 and SY55851A
2
SuperLiteTM
SY55851
SY55851A
Micrel
PIN DESCRIPTIONS
A, /A CML Input (Differential)
This is one of the differential inputs to the logic block.
For a 2-variable logic function, it is either a constant
value or a Boolean input. For a 2-input mux, this signal
represents the output when S is set to logic zero.
B, /B CML Input (Differential)
This is one of the differential inputs to the logic block.
For a 2-variable logic function, it is either a constant
value or a Boolean input. For a 2-input mux, this signal
represents the output when S is set to logic one.
Q, /Q CML Output (Differential)
This is the differential CML output for the logic block. For
termination guidelines, see Figure 3.
S, /S CML Input (Differential)
This differential CML input is one of the inputs to the
logic block. It represents either one Boolean input for a
2-variable logic function, or the select input for a 2-input
mux.
FUNCTIONAL DESCRIPTION
V
CC
NC
Input
/Input
Figure 1. Hard Wiring A Logic "1"
(1)
NC
For V
CC
> 3.0V Applications
NC
Input
/Input
NC
For V
CC
< 3.0V Applications
VCC
Input
/Input
Figure 2. Hard Wiring A Logic "0"
(1)
Establishing Static Logic Inputs
The true pin of an input pair is internally biased to ground
through a 75k
resistor. The complement pin of an input
pair is internally biased to V
CC
/2 through an internal voltage
divider consisting of two 75k
resistors. Since some logic
functions necessitate an output to be connected to two
inputs, SY55851/A inputs have no internal terminations.
Typically, one resistor between the true and complement
input is all that is required, as per Figure 3. To keep an
NOTE:
1. Input is either A, B, S input, and /Input is either /A, /B, /S input.
input at static logic zero at V
CC
3.0V, leave both inputs
unconnected or tie the complement input to V
CC
. For V
CC
<
3.0V applications, connect the complement input to V
CC
and leave the true input unconnected. To make an input
static logic one, connect the true input to V
CC
, and leave
the complement input unconnected. These are the only safe
ways to cause inputs to be at a static value. In particular,
no input pin should be directly connected to ground. All NC
(no connect) pins should be unconnected.
3
SuperLiteTM
SY55851
SY55851A
Micrel
( )
A
B
S
Q
/Q
L
H
L
L
H
L
H
H
H
L
H
L
L
H
L
H
L
H
L
H
+
(
+
)
A
B
S
Q
/Q
L
H
L
L
H
H
H
L
H
L
L
H
H
H
L
H
H
H
H
L
A
B
S
Q
/Q
L
X
L
L
H
H
X
L
H
L
TRUTH TABLES
AND/NAND
Q
/Q
S
/S
A
/A
B
/B
NC
(
)
V
CC
OR/NOR
Q
/Q
S
/S
A
/A
B
/B
+
(
+ )
V
CC
NC
XOR/XNOR
Q
/Q
S
/S
A
/A
B
/B
(
)
DELAY/NEGATION
Q
/Q
S
A
/B
/S
B
/A
NC
V
CC
A
B
S
Q
/Q
X
L
H
L
H
X
H
H
H
L
Q
/Q
S
A
/B
/S
B
/A
V
CC
NC
()
A
B
S
Q
/Q
L
L
L
L
H
L
H
L
L
H
L
L
H
L
H
L
H
H
H
L
Q
S
A
B
0
1
S
Q
H
B
L
A
2:1 MUX
4
SuperLiteTM
SY55851
SY55851A
Micrel
CML TERMINATION AND TTL INTERFACE
All inputs accept the output from any other member of
this family. All outputs are source terminated 100
or 50
CML differential drivers as shown in Figure 3. All inputs to
the SY55851/A must be externally terminated. SY55851/A
inputs are designed to accept a termination resistor between
the true and complement inputs of a differential pair. 0402
form factor chip resistors will fit with some trace fanout.
100
100
200
SY55851
V
CC
8mA
100
100
Q
/Q
Figure 3a. SY55851
100
Load CML Output
50
50
SY55851A
100
50
50
16mA
Q
/Q
V
CC
Figure 3b. Differentially Terminated SY55851A
(50
Load CML Output)
100
100
100
100
SY55851
100
50
50
8mA
Q
/Q
V
CC
V
CC
Figure 3c. Differentially Terminated SY55851
(50
Load CML Output)
V
CC
V
CC
SY55851
SY55851A
1.47k
549
S
/S
V
CC
1k
1k
TTL
Driver
V
CC
V
CC
(TTL Driver)
Figure 4. Interfacing TTL-to-CML Select Inputs
5
SuperLiteTM
SY55851
SY55851A
Micrel
Symbol
Rating
Value
Unit
V
CC
Power Supply Voltage
0.5 to +6.0
V
V
IN
Input Voltage
0.5 to V
CC
+0.5
V
V
OUT
CML Output Voltage
V
CC
1.0 to V
CC
+0.5
V
T
A
Operating Temperature Range
40 to +85
C
T
store
Storage Temperature Range
65 to +150
C
JA
Package Thermal Resistance
Still-Air (multi-layer PCB)
113
C/W
(Junction-to-Ambient)
500lfpm (multi-layer PCB)
96
C/W
JC
Package Thermal Resistance
42
C/W
(Junction-to-Case)
ABSOLUTE MAXIMUM RATINGS
(1)
NOTE:
1. Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. This is a stress rating only and functional operation is not implied
at conditions other than those detailed in the operational sections of this data sheet. Exposure to ABSOLUTE MAXIMUM RATlNG conditions for extended
periods may affect device reliability.
Symbol
Parameter
Min.
Typ.
Max.
Unit
Condition
V
ID
Differential Input Voltage
100
--
--
mV
V
IH
Input HIGH Voltage
1.6
--
V
CC
V
V
IL
Input LOW Voltage
1.5
--
V
CC
0.1
V
V
OH
Output HIGH Voltage
V
CC
0.040
V
CC
0.010
V
CC
V
No Load
V
OL
Output LOW Voltage
V
CC
1.00
V
CC
0.800
V
CC
0.65
V
No Load
V
OUT
Output Voltage Swing
(2)
0.650
0.800
1.00
V
No Load
SY55851
--
0.400
--
V
100
Load
(3)
--
0.200
--
V
50
Load
(4)
(SY55851)
SY55851A
--
0.400
--
V
50
Load
(5)
(SY55851A)
R
OUT
Output Source Impedance
SY55851
80
100
120
SY55851A
40
50
60
CML DC ELECTRICAL CHARACTERISTICS
V
CC
= 2.3V to 3.6V; GND = 0V; T
A
= 40
C to +85
C
(1)
NOTES:
1. The DC parameters are guaranteed after thermal equilibrium has been established.
2. Actual voltage levels and differential swing will depend on customer termination scheme. Refer to the "CML Termination" diagram for more details.
3. Applies to SY55851: 200
termination resistor across Q and /Q. See Figure 3a.
4. Applies to the SY55851. See Figure 3c.
5. Applies to the SY55851A: 100
termination resistor across Q and /Q. See Figure 3b.
Symbol
Parameter
Min.
Typ.
Max.
Unit
Condition
V
CC
Power Supply Voltage
2.3
--
3.6
V
I
CC
Power Supply Current
SY55851
--
--
40
mA
No Load
SY55851A
--
46
60
mA
No Load
DC ELECTRICAL CHARACTERISTICS
T
A
= 40
C to +85
C
(1)
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