MDT2030(CC)
This specification are subject to be changed without notice. Any latest information
please preview http;//www.mdtic.com.tw
P. 1
2005/6 Ver. 1.4
1. General Description
This ROM-Based 8-bit micro-controller uses a
fully static CMOS technology process to
achieve high speed, small size, the low power
and high noise immunity.
On chip memory includes 2K words EPROM,
and 80 bytes static RAM.
2. Features
The followings are some of the features on the
hardware and software :
u
Fully CMOS static design
u
8-bit data bus
u
On chip EPROM size : 2.0 K words
u
Internal RAM size : 80 bytes
(73 general purpose registers, 7 special
registers)
u
36 single word instructions
u
14-bit instructions
u
2-level stacks
u
Operating voltage : 2.3 V ~ 6.0 V
u
Operating frequency : 0 ~ 20 MHz
u
The most fast execution time is 200 ns
under 20 MHz in all single cycle
instructions except the branch instruction
u
Addressing modes include direct, indirect
and relative addressing modes
u
Power-on Reset
u
Power edge-detector Reset
u
Sleep Mode for power saving
u
4 types of oscillator can be selected by
programming option:
RC
Low cost RC oscillator
LFXT
Low frequency crystal oscillator
XTAL
Standard crystal oscillator
HFXT
High frequency crystal oscillator
u
4 oscillator start-up time can be selected
by programming option:
150
s, 20 ms, 40 ms, 80 ms
u
8-bit real time clock/counter(RTCC) with
8-bit programmable prescaler
u
On-chip RC oscillator based Watchdog
Timer(WDT)
u
12 I/O pins with their own independent
direction control
3. Applications
The application areas of this MDT2030 range
from appliance motor control and high speed
automotive to low power remote transmitters
/receivers, pointing devices, and
telecommunications processors, such as
Remote controller, small instruments,
chargers, toy, automobile and PC
peripheral ... etc.
4. Pin Assignment
DIP / SOP
PA2 1
18 PA1
PA3 2
17 PA0
RTCC 3
16 OSC1
/MCLR 4
15 OSC2
V
ss
5
14 V
dd
PB0 6
13 PB7
PB1 7
12 PB6
PB2 8
11 PB5
PB3 9
10 PB4
SSOP
PA2 1
20 PA1
PA3 2
19 PA0
RTCC 3
18 OSC1
/MCLR 4
17 OSC2
VSS 5
16 VDD
VSS 6
15 VDD
PB0 7
14 PB7
PB1 8
13 PB6
PB2 9
12 PB5
PB3 10
11 PB4
MDT2030(CC)
This specification are subject to be changed without notice. Any latest information
please preview http;//www.mdtic.com.tw
P. 2
2005/6 Ver. 1.4
5. Block Diagram
S ta ck Tw o Le ve ls
P ro g ra m C o u n te rs
O s cilla to r Circu it
P o we r o n Re s e t
P o w e r Do wn R e s e t
8 -b it Tim e r/Co u n te r
E P R O M
2 0 4 8 X1 4
In s tru ctio n
Re g is te r
In s tru ctio n
De co d e r
W o rkin g R e g is te r
ALU
P re s ca le
RAM
7 3 X8
S p e c ia l Re g is te r
Co n tro l C ircu it
S ta tu s R e g is te r
W DT/O S T
Tim e r
P o rt A
P o rt B
O S C 1
O S C 2
MCLR
Da ta
8 -b it
R TCC
1 1 b its
1 1 b its
1 4
b its
P o rt
P A0 ~P A3
4 b its
P o rt
P B0 ~ P B7
8 b its
D 0 ~D 7
MDT2030(CC)
This specification are subject to be changed without notice. Any latest information
please preview http;//www.mdtic.com.tw
P. 2
2005/6 Ver. 1.4
6. Pin Function Description
Pin Name
I/O
Function Description
PA0~PA3
I/O
Port A, TTL input level
PB0~PB7
I/O
Port B, TTL input level
RTCC
I
Real Time Clock/Counter, Schmitt Trigger input levels
/MCLR
I
Master Clear, Schmitt Trigger input levels
OSC1
I
Oscillator Input
OSC2
O
Oscillator Output
V
dd
Power supply
V
ss
Ground
7. Memory Map
(A) Register Map
Address
Description
00
Indirect Addressing Register
01
RTCC
02
PC
03
STATUS
04
MSR
05
Port A
06
Port B
07~1F
Internal RAM, Memory bank 0
30~3F
Internal RAM, Memory bank 1
50~5F
Internal RAM, Memory bank 2
70~7F
Internal RAM, memory bank 3
(1) IAR ( Indirect Address Register) : R0
(2) RTCC (Real Time Counter/Counter Register) : R1
MDT2030(CC)
This specification are subject to be changed without notice. Any latest information
please preview http;//www.mdtic.com.tw
P. 3
2005/6 Ver. 1.4
(3) PC (Program Counter) : R2
Write PC, CALL --- always 0
JUMP --- from instruction word
RTWI, RET --- from STACK
A10
A9
A8
A7~A0
Write PC, JUMP, CALL --- from STATUS b6 b5
RTWI, RET --- from STACK
Write PC --- from ALU
JUMP, CALL --- from instruction word
RTWI, RET --- from STACK
(4) STATUS (Status register) : R3
Bit
Symbol
Function
0
1
2
3
4
6
--
5
7
C
HC
Z
PF
TF
page
----
Carry bit
Half Carry bit
Zero bit
Power loss Flag bit
WDT Timer overflow Flag bit
ROM page select bit :
00 : Page 0, 000H --- 1FFH
01 : Page 1, 200H --- 3FFH
10 : Page 2, 400H --- 5FFH
11 : Page 3, 600H --- 7FFH
General purpose bit
MDT2030(CC)
This specification are subject to be changed without notice. Any latest information
please preview http;//www.mdtic.com.tw
P. 4
2005/6 Ver. 1.4
(5) MSR (Memory Bank Select Register) : R4
Memory Bank Select Register :
00 : 10~1F
01 : 30~3F
10 : 50~5F
11 : 70~7F
b7
b6
b5
b4
b3
b2
b1
b0
Read only "1"
Indirect Addressing Mode
(6) PORT A : R5
PA3~PA0, I/O Register
(7) PORT B : R6
PB7~PB0, I/O Register
(8) TMR (Time Mode Register)
Bit
Symbol
Function
Prescaler Value
RTCC rate
WDT rate
2
--
0
PS2
--
0
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
1 : 2
1 : 4
1 : 8
1 : 16
1 : 32
1 : 64
1 : 128
1 : 256
1 : 1
1 : 2
1 : 4
1 : 8
1 : 16
1 : 32
1 : 64
1 : 128
3
PSC
Prescaler assignment bit :
0
--
RTCC
1
--
Watchdog Timer
4
TCE
RTCC signal Edge :
0
--
Increment on low-to-high transition on RTCC pin
1
--
Increment on high-to-low transition on RTCC pin
5
TCS
RTCC signal set :
0
--
Internal instruction cycle clock
1
--
Transition on RTCC pin
(9) CPIO A, CPIO B (Control Port I/O Mode Register)
The CPIO register is "write-only"
"0", I/O pin in output mode;
"1", I/O pin in input mode.
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