FEATURES
Switchable organization
- 256K x 8 (byte mode)
- 128K x 16 (word mode)
Single +5V power supply
Fast access time:150/200ns
Totally static operation
PIN DESCRIPTION
Symbol
Pin Function
A0~A16
Address Input
Q0~Q14
Data Output
CE/CE
Chip Enable Input
OE/OE
Output Enable Input
BYTE
Word/Byte Selection
Q15/A-1
Q15 (Word mode)/LSB addr. (Byte
mode)
VCC
Power Supply Pin (+5V)
VSS
Ground Pin
GENERAL DESCRIPTION
The MX23C2100 is a 5V only, 2M-bit, Read Only
Memory. It is organized as 256K x 8 bits (byte mode) or
as 128K x 16 bit (word mode) depending on BYTE (pin
31) voltage level. MX23C2100 has a static standby
mode, and has an access time of 150/200ns. It is de-
signed to be compatible with all microprocessors and
similar applications in which high performance, large bit
storage and simple interfacing are important design con-
siderations.
Completely TTL compatible
Operating current: 60mA
Standby current: 100uA
Package type:
- 40 pin DIP (600 mil)
PIN CONFIGURATION
40 PDIP
MX23C2100 offers automatic power-down, with power-
down controlled by the chip enable (CE/CE) input. When
CE/CE is not selected, the device automatically powers
down and remains in a low-power standby mode as long
as CE/CE stays in the unselected mode.
The OE/OE inputs as well as CE/CE input may be pro-
grammed either active High or Low.
BLOCK DIAGRAM
1
P/N:PM0134
REV. 2.2, JAN. 28, 1999
MX23C2100
2M-BIT [256K x 8/128K x 16] CMOS MASK ROM
CONTROL
LOGIC
OUTPUT
BUFFERS
Q0~Q14
CE/CE
OE/OE
BYTE
Q15/A-1
A0~A16
ADDRESS
INPUTS
Y-DECODER
X-DECODER
Y-DECODER
2M BIT
ROM ARRAY
VCC
VSS
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
MX23C2100
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
NC
A7
A6
A5
A4
A3
A2
A1
A0
CE/CE
VSS
OE/OE
Q0
Q8
Q1
Q9
Q2
Q10
Q3
Q11
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
A8
A9
A10
A11
A12
A13
A14
A15
A16
BYTE
VSS
Q15/A-1
Q7
Q14
Q6
Q13
Q5
Q12
Q4
VCC
INDEX
2
P/N:PM0134
REV. 2.2, JAN. 29, 1999
MX23C2100
DC CHARACTERISTICS (Ta = 0
C ~ 70
C, VCC = 5V
10%)
Item
Symbol
MIN.
MAX.
Conditions
Output High Voltage
VOH
2.4
-
IOH = -1.0mA
Output Low Voltage
VOL
-
0.4V
IOL = 2.1mA
Input High Voltage
VIH
2.2V
VCC+0.3V
Input Low Voltage
VIL
-0.3V
0.8V
Input Leakage Current
ILI
10uA
VIN=0 to 5.5V
Output Leakage Current
ILO
10uA
VOUT=0 to 5.5V
Power-Down Supply Current
ICC3
-
100uA
CE>VCC-0.2V
Standby Supply Current
ICC2
-
1.0mA
CE = VIH
Operating Supply Current
ICC1
-
60mA
Note 1
ABSOLUTE MAXIMUM RATINGS*
RATING
VALUE
Ambient Operating Temperature
0
C to 70
C
Storage Temperature
-65
C to 125
C
Applied Input Voltage
-0.5V to 7.0V
Applied Output Voltage
-0.5V to 7.0V
VCC to Ground Potential
-0.5V to 7.0V
Power Dissipation
1.0W
*Notice:
Stress greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This
is a stress rating only and functional operation of the device
at these or any other conditions above those indicated in the
operational sections of this specification is not implied. Ex-
posure to absolute maximum rating conditions for extended
period may affect reliability.
TRUTH TABLE OF BYTE FUNCTION
BYTE MODE (BYTE=VSS)
CE
OE/OE
D15/A-1
MODE
D0-D7
SUPPLY CURRENT
NOTE
H
X
X
Non selected
High Z
Standby (ICC2)
1
L
L/H
X
Non selected
High Z
Operating (ICC1)
1
L
H/L
A-1 input
Selected
DOUT
Operating (ICC1)
1
WORD MODE (BYTE=VSS)
CE
OE/OE
D15/A-1
MODE
D0-D14
SUPPLY CURRENT
NOTE
H
X
High Z
Non selected
High Z
Standby (ICC2)
1
L
L/H
High Z
Non selected
High Z
Operating (ICC1)
1
L
H/L
DOUT
Selected
DOUT
Operating (ICC1)
1
NOTE1:X=H or L
INDEX
3
P/N:PM0134
REV. 2.2, JAN. 29, 1999
MX23C2100
AC CHARACTERISTICS (Ta = 0
C ~ 70
C, VCC = 5V
10%)
Item
Symbol
23C2100-15
23C2100-20
MIN.
MAX.
MIN.
MAX.
CONDITIONS
Cycle Time
tCYC
150ns
-
200ns
-
Address Access Time
tAA
-
150ns
-
200ns
Output Hold Time After
tOH
0ns
-
0ns
-
Address Change
Chip Enable Access Time
tACE
-
150ns
-
200ns
Output Enable/Chip Select
tAOE
-
80ns
-
90ns
Access Time
Output Low Z Delay
tLZ
0ns
-
0ns
-
Note 3
Output High Z Delay
tHZ
-
70ns
-
70ns
Note 4
BYTE Access Time
tBHA
-
150ns
-
200ns
BYTE Output Hold Time
tOHB
0ns
-
0ns
-
BYTE Output Delay Time
tBHZ
-
70ns
-
70ns
BYTE Output Set Time
tBLZ
10ns
-
10ns
-
Note:
1. Measured with device selected at f=5 MHz and output unloaded.
2. This parameter is periodically sampled and is not 100% tested.
3. Output low-impedance delay (tLZ) is measured from CE going low.
4. Output high-impedance delay (tHZ) is measured from CE going high.
AC Test Conditions
Input Pulse Levels
0.4V~ 2.4V
Input Rise and Fall Times
10ns
Input Timing Level
1.5V
Output Timing Level
0.8V and 2.0V
Output Load
1TLL+100pF
CAPACITANCE (Ta = 25
C, f=1.0MHz (Note 2))
Item
Symbol
TYP.
MAX.
UNIT
Conditions
Input Capacitance
CIN
10
pF
VIN=0V
Output Capacitance
COUT
10
pF
VOUT=0V
INDEX
4
P/N:PM0134
REV. 2.2, JAN. 29, 1999
MX23C2100
TIMING DIAGRAM
PROPAGATION DELAY FROM ADDRESS (CE/OE=ACTIVE)
PROPAGATION DELAY FROM CHIP ENABLE (ADDRESS VALID)
VALID DATA
VALID ADDRESS
ADDRESS
INPUTS
tCYC
tAA
DATA OUT
tOH
tHZ
tACE
tAOE
tLZ
OE
DATA OUT
CE
PROPAGATION DELAY FROM CHIP ENABLE (ADDRESS VALID)
tAA
tOH
tBHA
tBLZ
tOHB
tBHZ
HIGH-Z
VALID DATA
VALID DATA
HIGH-Z
A-1
BYTE
D0-D7
D15-D8
VALID DATA
INDEX
PDF 
ZIP