DPLL
Block
PLL Clock
SIE
Block
UBL Block
Configurable
EPINFO
Block
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Protocol
Layer
Endpoint
Block
Function Core
USB
Connector
and
Cable
Peripheral
Function
Logic
LSI Logic
USB
Transceiver
I/O
USB Function Core
LSI Logic's USB Function Core is a flexible and configurable core interfacing a peripheral
function to the Universal Serial Bus and enabling the design of highly integrated peripheral sin-
gle-chip systems. Combining the USB Function core and LSI Logic's USB transceiver I/Os with
other CoreWare
cores and customer-defined logic creates cost-effective solutions for USB peripher-
als such as digital cameras, scanners, ISDN modems and multifunction peripherals. The USB specifi-
cation compliant USB Function core implements the USB protocol and provides a basic read/write
interface to the peripheral application logic which simplifies design integration.
Overview
The USB Function Core simplifies the design of highly integrated USB peripherals by providing a
complete implementation of the USB protocol.
Features
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USB Specification Revision 1.0 Compliant
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"Firm" implementation - netlist with flexible layout
guidelines
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Programmable number of endpoints with a configurable
organization
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Simple application interface
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Integrated digital PLL
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Supports low speed and full speed data rates
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Gated clock option
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SCAN inserted netlist
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Interfaces with LSI Logic's USB transceiver I/Os
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Verified functionality and timing for LSI Logic's ASIC
technologies
Benefits
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Ensures "hot plug and play" interoperability
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More flexible layout interface vs. fixed layout and
placement
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Performance and gate count optimized for each applica-
tion
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Eases system-on-a-chip integration
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No external components required
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Suitable for all USB peripheral applications
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Reduces power consumption
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Simplifies test verification
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External transceiver chip is not required
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Fast time to market with Right-First-TimeTM
Methodology designs
USB Device Controller Core
The USB Function Core consists of a digital phase locked-loop, serial interface engine, USB
bridge layer and a configurable Endpoint Information (EPINFO) block. Together with the sepa-
rate USB transceiver from LSI Logic's I/O library, the USB Function core provides a complete
interface solution to an application's peripheral function logic.
Digital Phase Locked-Loop (DPLL) Block: The DPLL block is the interface from the USB
Function Core to the USB transceiver. It consists of a digital phase-locked loop which recovers the
embedded clock (PLL clock) from the incoming data stream and provides it to the SIE block
along with the serialized data. The DPLL also identifies the SE0 (Single-Ended Zero) signal for
system suspend and resume operation.
Serial Interface Engine (SIE) Block: Utilizing the recovered PLL Clock the SIE block performs the
serial to parallel data conversion from the DPLL when the function is in the receive mode. This
converted parallel data is then provided to the UBL block. When transmitting data back to the
USB, the SIE performs the parallel to serial conversion and clock embedding of data from the UBL
block and forwards the data stream to the USB transceiver.
USB Bridge Layer (UBL) Block: The UBL is divided into the protocol layer (PL) block which serves
as the interface between the SIE and the application interface and the endpoint block which
administer the control transfers to endpoint. As the parallel data is received from the SIE the UBL
decodes the standard commands and passes them to the peripheral function logic via the applica-
tion bus. It also generates the responses from the peripheral function and sends them as parallel
data to the SIE.
EPINFO Configurable Block: The EPINFO block maintains the address pointer registers that store
information about the supported endpoints, the size of the configuration and the supported string
descriptors. This block is configured using a script compiler enabling the designer to easily opti-
mize the implementation to minimize the memory size and maximize performance based on the
application requirements. A hardwire option can further reduce the gate count and power.
CoreWare Design Program: The CoreWare design program enables system-on-a-chip design inte-
gration, delivering unmatched market advantages. Industry-standard functions, or cores, are com-
bined with on-chip memory and user-defined logic to create market-leading, one-of-a-kind designs
efficiently and rapidly.
Description
ISO 9000 Certified
Printed on
Recycled Paper
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Embedded Array, FlexCore, G-2, HYDRA, MDE Modular Design Environment and SeriaLink are registered trademarks and
ChipSizer, C-MDE, Compacted Array, DVTV, First-Time-Right, G10 and G10 logo design, G11, G12, GigaBlaze, Hyper-LVDS,
Iddalyzer, Integra, Internet on a Chip, It Takes Two to Make One of a Kind, JVieW, Merlin, MiniRISC, MiniSIM, Netcore, PowerPlay,
Right-First-Time, Scenario, The System on a Chip Company, TinyRISC and Video Compute Engine are trademarks of LSI Logic
Corporation. SparKIT is a trademark of SPARC International, Inc. and is exclusively licensed to LSI Logic Corporation. All other
brand and product names may be trademarks of their respective companies.
Order No. C20022
1296.1K.CM.LDC Printed in USA
LSI Logic Corporation reserves the right to make changes to any products and services herein at any time without notice. LSI
Logic does not assume any responsibility or liability arising out of the application or use of any product or service described
herein, except as expressly agreed to in writing by LSI Logic; nor does the purchase, lease, or use of a product or service from
LSI Logic convey a license under any patent rights, copyrights, trademark rights, or any other of the intellectual property
rights of LSI Logic or of third parties.
Copyright 1996 by LSI Logic Corporation. All rights reserved.
s
To receive product literature, call us at
1.800.574.4286
(U.S. and Canada);
+32.11.300.351 (Europe);
408.433.7700 (outside U.S., Canada &
Europe) and ask for Dept. JDS; or visit us
at
http://www.lsilogic.com
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LSI Logic Corporation
North American Headquarters
Milpitas CA
Tel: 408.433.8000
Fax: 408.433.8989
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European Headquarters
United Kingdom
Tel: 44.1344.426544
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