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Электронный компонент: L64767

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April 1999
1
Copyright 1995, 1996, 1997 by LSI Logic Corporation. All rights reserved.
L64767
SMATV QAM Encoder
Datasheet
Introduction
LSI Logic's L64767 SMATV QAM Encoder is a highly-integrated device
designed specifically for Satellite Master Antenna Television (SMATV)
applications. The L64767 is ideally suited to any application that requires
a low-power, highly integrated forward error correction (FEC)
transmission encoder. Typical applications include rooftop SMATV
systems, cable head-ends, and optical networks in fiber-deep networks.
Figure 1
shows a basic SMATV QAM system using the L64767. The
device can process input from either an MPEG-2 transport encoder, a
satellite receiver, or a transmission network.
Figure 1. L64767 SMATV QAM System
The L64767 simplifies the design process for FEC and modulation
encoding systems by providing built-in signal processing capabilities and
a byte-parallel, power saving architecture. The L64767's ease of use will
help system engineers create the next generation of time-to-volume
sensitive digital products. In contrast, previous solutions for these
systems forced system engineers to use many programmable and
discrete devices on large circuit boards. These end products were
expensive and power-intensive, both of which are unacceptable for
today's SMATV applications.
Passive
Filter
Cable
Plant
PLL
I
Q
D/A
PLL
Analog
Mod
Transmission
Network
MPEG-2 Transport
MUX
QPSK Satellite Receiver
LSI Logic
L64704
L64767
MD97.1
2
L64767 SMATV QAM Encoder
The L64767 integrates CoreWare
processing elements that conform to
the specifications described in the document
DTVB1190/DTVC37,
Revision 3.
Figure 2
shows the L64767's major functional blocks.
Figure 2. L64767 Functional Blocks
The CoreWare processing elements of the L64767 comprise the data
processing chain of the device and include:
Input synchronizer
Circular FIFO buffer
Sync/error flag inserter and scrambler
Reed-Solomon encoder
Convolutional interleaver
Bytes to m-tuple converter
Differential encoder and QAM mapper
Nyquist filter
Reed-
Solomon
Encoder
Convolutional
and
Mapper
Bytes
to
m-tuple
Global Control and Synchronization - Start/Stop Signals Generation
I
CLK
Microprocessor Interface
DATA[7:0] DTACK_N
CS_N
OCLK
Data In
Nyquist
Filter
READ
Diff.
Encoder
Input
Sync
Test Scan Chain
Sync/Error
FIFO
Flag
Inserter
Circular
Buffer
and
10-bit
10-bit
Interleaver
Scrambler
QAM
4
4
m
I
Q
8
8
8
8
8
8
AS_N
MD97.3
PLL
L64767 SMATV QAM Encoder
3
In addition to the processing chain, the L64767 provides:
Global control and synchronization components
Microprocessor interface for configuring and monitoring internal
registers
Test scan chain
The L64767 can accept byte-parallel or bit-serial input and provides
flexible input synchronization support. It can automatically search for a
digital video broadcasting (DVB) or user-programmable 8-bit sync code.
Alternatively, the L64767 can use an external frame start signal to
indicate the beginning of a frame for input synchronization. By inserting
the Reed-Solomon (RS) check words into the circular FIFO buffer, the
device can also use an MPEG-2 input stream without gaps, or operate
on packets with gaps for RS check words.
The length of sync words and sync blocks is user-programmable, and
sync information can be reinserted as needed. The L64767 also provides
an error indication bit for MPEG-2 transport packet errors. Using this bit,
error flags from a preceding device can be properly inserted in the
MPEG-2 transport stream.
The L64767 can process quadrature amplitude modulation (QAM) levels
of 16, 32, 64, 128, and 256. The QAM level is user-programmable.
4
L64767 SMATV QAM Encoder
Features
SMATV
DTVB1190/DTVC37,
Revision 3 compliant
Highly integrated, global
synchronization and clock control
2- or 4-fold Nyquist filter oversampling
Maskable interrupts for all error
conditions
Individual module bypass
configuration modes
IEEE 1149.1 JTAG interface for testing
User-controllable input
synchronization schemes
Low-power (1 W), low-cost surface
mount package
Up to 7.8 Mbaud operation
Up to 62 Mbits/second serial data
input
Up to 10 Mbytes/second parallel data
input
16, 32, 64, 128, 256 QAM modes
Reed-Solomon encoder
Frame sync-byte insertion
Convolutional data interleaving depth
(B = 12)
Benefits
Directly connects to LSI Logic's satellite
receiver/FEC
Allows low-cost external filters (4-fold
oversampling mode)
85
C ambient operation without special
cooling devices
Entire device or individual SMATV
CoreWare processing blocks available
Easy interface to most input sources
Continuous data-in, continuous data-out
operation
Input jitter handling and Reed-Solomon
gap insertion by 128-word circular FIFO
buffer
L64767 SMATV QAM Encoder
5
Functional Description
This section provides a brief description of the major blocks shown in
Figure 2
.
Input Synchronizer
As shown in
Figure 2
, only the input synchronizer is driven by the input
clock. All other processing is done based on the OCLK. OCLK can be
two or four times the symbol clock (SCLK) frequency based on the
oversampling setting of the Nyquist filter.
ICLK is limited to a maximum of 62.5 MHz in serial input mode and
10 MHz in parallel input mode. The maximum symbol rate handled by
the L64767 is 7.5 Mbaud. Therefore, OCLK is limited to 15 MHz in 2-fold
oversampling mode and 30 MHz in 4-fold oversampling mode.
The input format for the L64767 is based on the data format specified in
the MPEG-2 system layer standard in relation to the DVB transport
framing structure. It requires a Reed-Solomon (204,188) protected
transport packet to consist of 204 bytes, including the sync byte plus
187 data bytes and 16 redundancy bytes.
This basic format has been adopted by the V4/MOD-B task force for a
multiprogram TV via satellite standard, and by the DVB group in Europe.
In a scrambled DVB data stream, one out of every eight synchronization
words is mod 2 complemented (inverted) in order to define the beginning
of a scrambling sequence.
The descrambled stream contains no inverted sync word. This MPEG-2
frame format is the basic input format for the L64767 device. The device
assumes that the inserted sync byte at the chip input can only have the
normal value, not the inverted one. You can insert gaps for Reed-Solomon
check bytes or make them available in the input stream.
To synchronize input, you can do one of the following:
Send a frame start pulse at the FSTARTIN pin forcing the beginning
of each Reed-Solomon code block. Whenever FSTARTIN is
asserted, the L64767 reinserts the sync byte into the data stream
and inverts the sync word every eight blocks, as defined by the DVB.