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Электронный компонент: LS6501

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FEATURES:
Low Quiescent Current
Direct Interface with PIR Sensor
Two-Stage Differential Amplifier
Amplifier Gain and Bandwidth externally controlled
Window Comparator and Digital Filter limit Noise
Triac or Relay Output Drive
Programmable Output Duration Timer
Ambient Light Level Inhibit input
Selectable Dead Time
Single or Dual Pulse Detection
Timing derived from RC Oscillator or 50Hz/60Hz AC
Regulated 5V Output for PIR Sensor
Motion Detection LED Indicator
Triac can drive Incandescent or Fluorescent Lamps
LS6501LP (DIP), LS6501LP-S (SOIC-NB)
LS6501LP-SW (SOIC-WB) - See Figure 1
APPLICATIONS:
Automatic Light Control
Intrusion Alarm
DESCRIPTION: (See Figure 2)
The LS6501LP is a monolithic, CMOS Silicon Gate in-
tegrated circuit, designed for detecting motion from a PIR
Sensor and initiating appropriate responses. The detailed
description of the functional blocks is as follows:
DIFFERENTIAL AMPLIFIER
Each stage of the two stage Differential Amplifier can be set
to have its own amplification and bandwidth. The two inputs
to the first stage allow for single ended or differential con-
nection to PIR Sensors. This stage can be biased anywhere
in its dynamic range. The second stage is internally biased
so that the Window Comparator's lower and higher thresh-
olds can be fixed relative to this bias.
WINDOW COMPARATOR
The Window Comparator provides noise filtering by enabling
only those signals equal to or greater than a fixed threshold
at the output of the Differential Amplifier to appear at the
output of the Window Comparator.
COMPARATOR DIGITAL FILTER
The output of the Window Comparator is filtered so that
motion must be present for a certain duration before it can
be recognized and appear as pulses at the Digital Filter
output.
OUTPUT DURATION TIMER
The voltage level at the TIMER CONTROL input can
select 16 different timeouts for this Timer (See Table 1).
The selection can be made by varying the setting of a
potentiometer. The Timer is retriggerable and controls
the ON duration of the TRIAC/RELAY output. The trigger
for the Timer is generated from pulses appearing at the
Digital Filter output.
SINGLE PULSE/DUAL PULSE MODES
A Single Pulse or Dual Pulse (two pulses occurring within
a specified time period) at the Digital Filter output can be
selected as the trigger for the Output Duration Timer.
This selection is made by the logic level at the PULSE
MODE SELECT input. Logic 0 = Single Pulse Mode,
logic 1 = Dual Pulse Mode.
LED OUTPUT
This is an open drain output which is turned on by pulses
generated by a retriggerable one-shot. The one-shot is
triggered by the leading edge of pulses appearing at the
Digital Filter output. When turned on, this output can sink
current from a series Resistor-LED network returned to a
positive voltage (V
DD
to 12.5V maximum). This results in
the LED lighting whenever motion is detected.
PIR MOTION DETECTOR
July 2001
6501LP-071201-1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
LSI
LS6501LP
DIFF. AMP. 2 INPUT (-)
DIFF. AMP. 2 OUTPUT
AC INPUT
OSCILLATOR INPUT
TRIAC/RELAY OUTPUT
V
DD
DIFF. AMP 1 INPUT (-)
DIFF. AMP 1 INPUT (+)
5V REGULATOR OUTPUT
TIMER CONTROL INPUT
DEAD TIME SELECT INPUT
I N H I B I T I N P U T
PULSE MODE
SELECT INPUT
LED OUTPUT
PIN ASSIGNMENT - TOP VIEW
FIGURE 1
DIFF. AMP. 1 OUTPUT
V
SS
LSI/CSI
LSI Computer Systems, Inc. 1235 Walt Whitman Road, Melville, NY 11747 (631) 271-0400 FAX (631) 271-0405
LS6501LP
UL
A3800
INHIBIT
The Output Duration Timer can be inhibited from trig-
gering by the voltage level at the INHIBIT input. When this
voltage level exceeds the Inhibit Threshold, the Timer will
be prevented from triggering if it is OFF. If the Timer is
ON, the INHIBIT input is blocked from affecting the Timer.
There is approximately 10% hysteresis between the In-
hibit and Enable thresholds at the INHIBIT input. The LED
output is not affected by the INHIBIT input. An adjustable
Ambient Light Level Inhibit can be implemented by con-
necting a Light Determining Resistor (LDR) network to the
INHIBIT input (See Figures 3 and 4).
DEAD TIME
False turn-ons are prevented from occurring by es-
tablishing a Dead Time between the end of the timeout of
the Output Duration Timer and the retriggering of that
Timer. The state of the DEAD TIME SELECT input de-
termines the Dead Time duration (See Table 2).
OSCILLATOR
For battery operation, an external RC is connected to the
OSCILLATOR input to produce a 50Hz or 60Hz clock. A
30Hz clock can be used to extend timing durations (See
Tables 1 and 2).
DC POWER SUPPLY
V
DD
-Vss is 8V1V. Typical quiescent current is 250A
(
TRIAC/RELAY, LED
and
REGULATOR
outputs not loaded).
DC REGULATOR
The LS6501LP includes a Regulator which provides a
nominal +5V to the Differential Amplifier and Window
Comparator and is available as an output to supply the
PIR Sensor.
TRIAC/RELAY OUTPUT
This open drain output turns ON when the Output Dura-
tion Timer is triggered. The output drives a Triac when
the OSCILLATOR input is tied to ground and 50/60Hz is
applied to the AC input (See Figure 3). The output drives
a Relay when the AC input is tied to ground and an RC
network is connected to the OSCILLATOR input (See
Figure 4).
TRIAC DRIVE (See Figure 3)
With the Output Duration Timer ON and a 2.7V P-P
60Hz signal applied to the AC input, the output produces
a negative-going pulse in each half-cycle delayed a
nominal 1.2ms from the zero crossing. There is no more
than 150s difference between the zero-crossing delay
of each pulse.
RELAY DRIVE (See Figure 4)
The output can sink current continously with the Output
Duration Timer ON and the OSCILLATOR input active.
This output can sink current from a relay coil returned to
a positive voltage (V
DD
to 12.5V maximum).
0
30
18
15
1/16 V
DD
60
36
30
2/16 V
DD
90
54
45
3/16 V
DD
120
72
60
4/16 V
DD
4
2.4
2
5/16 V
DD
6
3.6
3
6/16 V
DD
8
4.8
4
7/16 V
DD
10
6
5
8/16 V
DD
12
7.2
6
9/16 V
DD
14
8.4
7
10/16 V
DD
16
9.6
8
11/16 V
DD
18
10.8
9
12/16 V
DD
20
12
10
13/16 V
DD
24
14.4
12
14/16 V
DD
28
16.8
14
15/16 V
DD
30
18
15
TABLE 1
OUTPUT DURATION TIMER AS A FUNCTION OF TIMER CONTROL INPUT VOLTAGE
(f = Frequency at AC input or OSCILLATOR input)
INPUT VOLTAGE f = 30Hz f = 50Hz f = 60Hz UNIT
TABLE 2
DEAD TIME DURATION AS A FUNCTION OF THE STATE OF DEAD TIME SELECT INPUT
(f = Frequency at AC input or OSCILLATOR input)

INPUT STATE f = 30Hz f = 50Hz f = 60Hz UNIT
0
2
1.2
1
OPEN
8
4.8
4
1
16
9.6
8
6501LP070601-2
sec
sec
sec
sec
min
min
min
min
min
min
min
min
min
min
min
min
sec
sec
sec
ABSOLUTE MAXIMUM RATINGS:
PARAMETER
SYMBOL
VALUE
UNIT
DC supply voltage
V
DD -
V
SS
+10
V
Any input voltage
V
IN
V
SS
- 0.3 to V
DD
+ 0.3
V
Operating temperature
T
A
-40 to +85
C
Storage temperature
T
STG
-65 to +150
C
ELECTRICAL CHARACTERISTICS:
( All voltages referenced to V
SS
, T
A
= -40C to +55C, 7V
V
DD
9V, unless otherwise specified.)
PARAMETER
SYMBOL
MIN
TYP
MAX
UNIT
CONDITIONS
SUPPLY CURRENT:
V
DD
= 8V
I
DD
-
250
350
A
TRIAC/RELAY,
V
DD
= 7V - 9V
I
DD
-
300
420
A
LED and REGULATOR
outputs not loaded
REGULATOR:
Voltage
V
R
4.5
-
6
V
-
Current
I
R
-
-
200
A
-
DIFFERENTIAL AMPLIFIERS:
Open Loop Gain,
Each Stage
G
70
-
-
dB
-
Common Mode
Rejection Ratio
CMRR
60
-
-
dB
-
Power Supply
Rejection Ratio
PSRR
60
-
-
dB
-
Output Drive Current
I
D
-
-
25
A
-
Input Sensitivity
V
S
70
-
-
V
TA = 25C, with Amplifier
(Minimum Detectable Voltage
Bandpass configuration
to first amplifier when both
as shown in Figure 3
amplifiers are cascaded for
a net gain of 7,500)
Input Dynamic Range
-
0
-
2.5
V
-
Diff. Amp 2 Internal
V
IR
-
.4V
R
-
V
-
Reference
COMPARATOR:
Lower Reference
V
THL
-
V
IR
- .5V
-
V
-
Higher Reference
V
THH
-
V
IR
+ .5V
-
V
-
DIGITAL FILTER:
Input Pulse Width
T
PW
66.3
-
-
ms
60Hz operation
(for recognition)
T
PW
79.6
-
-
ms
50Hz operation
INHIBIT INPUT:
Inhibit Threshold
V
THI
-
.5V
DD
-
V
-
Enable Threshold
V
THE
-
.45V
DD
-
V
-
OSCILLATOR:
Resistor
R
O
-
2.2
-
M
60Hz Oscillator
Capacitor
C
O
-
.01
-
F
Frequency
Resistor
R
O
-
4.3
-
M
30Hz Oscillator
Capacitor
C
O
-
.01
-
F
Frequency
6501LP-070601-3
PARAMETER
SYMBOL
MIN
TYP
MAX
UNIT
CONDITIONS
OUTPUT DRIVE CURRENT:
Triac (AC MODE)
I
O
-40
-
-
mA
With 3V Triac Gate Drive
Relay (DC MODE)
I
O
-10
-
-
mA
With 1V Max. across the
LS6501LP.
TRIAC OUTPUT TIMING:
Pulse Width
T
TPW
20
30
45
s
V
DD
= 8V, f = 60Hz and
Delay from zero crossover
T
OD
1.00
1.2
1.32
ms
2.7V P-P AC
input
Delay difference between
T
ODD
-
-
150
s
f = 60Hz
zero crossovers
AC INPUT IMPEDANCE
Z
AC
270
-
-
k
-
LED OUTPUT:
Sink Current
I
LS
-
-
8
mA
V
DD
= 8V, Vo = .5V Max.
Pulse Width
T
LPW
.75
1
1.25
sec
f = 60Hz.
DUAL PULSE MODE:
Time between
pulse-pairs
T
R
-
-
5.125
sec
-
for motion recognition
6501LP-070601-4
+
-
AMP
+
-
AMP
+
-
COMP
+
-
COMP
3
2
1
13
15
16
DIFF AMP 2
OUTPUT
DIFF AMP 2
INPUT (-)
DIFF AMP 1
OUTPUT
DIFF AMP 1
INPUT (-)
DIFF AMP 1
INPUT (+)
11
10
12
A/D
CONVERTER
OUTPUT
DURATION
TIMER
DIGITAL
FILTER
CONTROL
LOGIC
DEAD
TIME
TIMER
1 SECOND
PULSE GEN
V
REG
5 VOLT
REGULATOR
VREG
OUTPUT
BUFFER
ZERO CROSS-OVER
DETECT
OSCILLATOR
14
8
6
9
7
5
4
TIMER
CONTROL
INPUT
INHIBIT INPUT
PULSE MODE
SELECT INPUT
DEAD TIME
SELECT INPUT
5V REGULATOR
OUTPUT
V
DD
V
SS
LED OUTPUT
TRIAC/RELAY OUTPUT
AC INPUT
OSCILLATOR INPUT
FIGURE 2. LS6501LP BLOCK DIAGRAM
V
REG
V
REG
V
REG
V
REG
INHIBIT
COMPARATOR
PULSE
SELECT
LOGIC
WINDOW
COMPARATOR
FIGURE 3. TYPICAL TRIAC WALL SWITCH APPLICATION
AMP 1
OUT
AMP 1
(-)IN
AMP 2
(-)IN
AMP 1
(+)IN
AMP 2
OUT
5V REG
OUT
OSC
TIMER
C O N T R O L
AC
DEAD TIME
SEL
V
SS
INH
TRIAC
OUT
P U L S E
MODE
SEL
LED
OUT
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
AC MAINS
LOAD
SW
TI
MT2
MT1
R7
R11
C7
Z1
D1
R9
C9
R10
C8
R8
V
DD
C4
R4
C5
R5
1
2
3
4
5
6
7
8
V
DD
9
10
11
12
13
14
15
16
C2
R2
R6
R1
C1
PIR
S E N S O R
R12
R14
LDR
R13
R15
LED
R3
C3
L S 6 5 0 1 L P
C6
G
+
-
+
-
+
-
+
-
N
P
S1
S1 = SPDT (On-Off-On)
SPDT (On -On)
S1
R1 = 36k
R8 = 1k
R2 = 36k
R9 = 910k
R3 = 2.7M
R10 = 7.5k
R4 = 36k
R10 = 3.6k
R5 = 2.7M
R11 = 100
R6 = 36k
R12 = 1.0M
R7 = 270
,1/2W
R13 = 1.0M
R7 = 1k
,1W
R14 = 910k
R15 = 3.6k
All Resistors 1/4W, all Capacitors 10V
unless otherwise specified.
C1 = 100F
C8 = 1000F
C2 = 33F
C9 = .1F, 250V
C3 = .01F
C9 = .1F, 400V
C4 = 33F
D1 = 1N4004
C5 = .01F
LDR = SILONEX HSL-19M52 (Typical)
C6 = .1F
Z1 = 9.1V, 1/2W
C7 = .47F, 250V
T1 = Q4008L4 (Typical)
C7 = .33F, 400V
T1 = Q5004L4 (Typical)
PIR = HEIMANN LHi 958 or 878 (Typical)
*
= Component change for 220VAC
6501LP-071201-5
*
*
*
*
NOTES: 1. The R9, R10, C9 network provides a 2.7V Peak-to-Peak AC signal input to Pin 5.
2. The C8, D1, Z1, C7, R7 components generate the DC Supply Voltage for the LS6501LP.
3. The R2, C2, R3, C3, R4, C4, R5, C5, R6, C6 components and the two on-chip Differential Amplifiers set a
nominal gain of 5,500 with bandpass filtering of .13Hz to 6Hz.
*