KING BILLION ELECTRONICS CO., LTD
HE83750
HE80000 SERIES
1
V3.2E
A. HE83750 Introduction
HE83750 is a member of 8-bit Micro-controller series developed by King Billion Electronics Ltd. Users
can chose any one of combination among 2048 dots LCD Driver + 16 Bit I/O Port...1792 dots LCD
Driver + 24 Bit I/O Portetc. The built-in OP comparator can be used with (lightvoicetemperature
humility) sensor and used as battery low detection. And the 7-bit current-type D/A converter and PWM
device provide the complete speech output mechanism. The built-in DTMF generator can generate the
PSTN dialing tone directly. The 512K ROM Size can be used in the storage of large speech data,
graphic, text etc. It can be applicable to the medium systems such as Small-Scale Dictionary, Data Bank,
Pocket Dialer, Automatic Dialer Machine, Medium Level Educational Toy, Lower Second Voice
Recording System and connect external SRAM or Flash RAM for Higher Second Voice Recording etc..
The instruction set of HE83750 are quite easy to learn and simple to use. Only about thirty instructions
with four-type addressing mode are provided. Most of instructions take only 3 oscillator clocks (machine
cycles). The processing power is enough to most of battery operation system.
B. HE83750 Feature
Operation Voltage
2.4V 5.5V
System Clock
DC ~ 8MHz @ 5.0V
DC
~
4MHz
@
2.4V
Internal ROM
512K
Bytes(64K
Program ROM, 448K Data ROM)
Internal RAM
16K
Bytes.
Dual Clock System
Normal (Fast) clock 32.768K ~ 8MHz
Slow
clock
32.768KHz
Operation Mode DUALFASTSLOWIDLESLEEP Mode.
With WDT (WATCH DOG TIMER) to prevent deadlock condition.
16~24 bit Bi-directional I/O port.
Mask Option can select PUSH-PULL or OPEN DRAIN output
mode for each I/O pin.
One built-in OP comparator.
2048~1792 dots LCD driver (B TYPE selectable).
One 7-bit current-type DAC output.
PWM device.
Built-in DTMF Generator.
Two external interrupts and three internal timer interrupts.
Three 16-bit timer.
Instruction set 32 instructions, 4 addressing mode.
14-bit DATA POINTER
for RAM and
19-bit
TABLE POINTER
for ROM.
C.
Application Circuit
KING BILLION ELECTRONICS CO., LTD
HE83750
HE80000 SERIES
2
V3.2E
VDD
VDD
VDD
VDD
VDD
VDD
VDD
SXO
SXI
FXI
FXO
FXI
SXI
SXO
SXO
FXI
FXO
SXI
SXO
LC1
LC2
LV1
LC1
LC2
LC1
LV2
LC2
LC2
LC1
LV3
LV2
LV3
LV2
LV1
LV3
LV1
LV3
LV2
LV1
LC1
LV2
LC2
LV1
LV3
C9 0.1uF
C6
0.1uF
2MHZ
R: Please ref. AN016
C2
100uF
C3
0.1uF
20P
20P
32.768K
R > 8.2 KOhm
20P
20P
HE83750
VDD
FXO
FXI
SXI
SXO
LC1
LC2
LV1
LV2
LV3 < 9 Volt
LR1
LR2
LR3
LR4
LVG
TS
TP
_
P
VO
PWMP
PWMN
COM[31:0]
SEG[55:0]
PRTC[7:0]
RSTP_N
GND
PRT14[7:0]/SEG[63:56]
LR0
PRTD[7:0]
OPIN
OPIP
OPO
DTMFO
MUTE
SDO
KEYTONE
DAO
Q1
NPN
SP1
SPEAKER
C4
0.1uF
C3
0.1uF
C2
0.1uF
C1
0.1uF
BATTERY1
3V
SW1
RESET
R1
50K
C1
0.1uF
C9 0.1uF
C8 0.1uF
C6
0.1uF
C6
0.1uF
0.1uF
C5
C9 0.1uF
C7 0.1uF
VR1
?K Ohm
C: Please Ref. AN016
1/7 BAIS CONFIGURATION
External Slow Clock:
RC osc.
No External Parts is
necessary if user adopt
Internal Fast RC Clock
External Fast Clock:
Crystal osc.
External Fast Clock:
RC osc.
External Slow Clock:
Crystal osc.
LCD PANEL
Passive
Bias &
Filter
Circuit
Buzzer
or
Speaker
Circuit
Please Refer
AN022 for Speech
Output Circuit
Four Charge Pump is selected
LCD Max. Voltage=LV3=3*VDD
Four Charge Pump is selected
LCD Max. Voltage=LV3=3/2*VDD
Four Charge Pump is selected
LCD Max. Voltage=LV3=VDD
No Capacitor
Floating
Floating
Four Charge Pump is selected
LCD Max. Voltage=LV3=2*VDD
KING BILLION ELECTRONICS CO., LTD
HE83750
HE80000 SERIES
3
V3.2E
H. Important Note
1. For accessing any address large than 64KB, users must update TPP first, TPH then TPL. Only by this order,
the pre-charge circuit of ROM will work correctly. 5us waiting is necessary before LDV instruction is
executed since Data ROM is a low speed ROM. Users can not emulate this accessing process in ICE. So 5us
delay should be added by firmware.
2. LCD driving circuit must be turn off before IC goes into sleep mode.
3. Please bonds the TSTP_P, RSTP_N and PRTD[7:0] with test point on PCB (can be soldered and
probed) as you can, then KB can do some IC testing job on PCB. Neither VDD nor GND connection is
necessary for TSTP_P. The following figure is an example (Testing point with through hole).
4. LV3 must small than 9.0 Volt. Otherwise IC may breakdown.
K. Updated Record
Version
Date
Section
Original Content
New Content
V3.2
Dec 14,2001
B, H
2.2V (VDD operation voltage)
2.4V
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